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Searched refs:qdma (Results 1 – 14 of 14) sorted by relevance

/drivers/net/ethernet/airoha/
A Dairoha_eth.c41 struct airoha_qdma *qdma = irq_bank->qdma; in airoha_qdma_set_irqmask() local
554 struct airoha_qdma *qdma = q->qdma; in airoha_qdma_fill_rx_queue() local
619 struct airoha_qdma *qdma = q->qdma; in airoha_qdma_rx_process() local
767 q->qdma = qdma; in airoha_qdma_init_rx_queue()
852 qdma = irq_q->qdma; in airoha_qdma_tx_napi_poll()
961 q->qdma = qdma; in airoha_qdma_init_tx_queue()
1010 irq_q->qdma = qdma; in airoha_qdma_tx_irq_init()
1065 int id = qdma - &eth->qdma[0]; in airoha_qdma_init_hfwd_queues()
1318 int i, id = qdma - &eth->qdma[0]; in airoha_qdma_init_irq_banks()
1326 irq_bank->qdma = qdma; in airoha_qdma_init_irq_banks()
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A Dairoha_eth.h177 struct airoha_qdma *qdma; member
197 struct airoha_qdma *qdma; member
496 struct airoha_qdma *qdma; member
519 struct airoha_qdma *qdma; member
570 struct airoha_qdma qdma[AIROHA_MAX_NUM_QDMA]; member
589 #define airoha_qdma_rr(qdma, offset) \ argument
590 airoha_rr((qdma)->regs, (offset))
591 #define airoha_qdma_wr(qdma, offset, val) \ argument
592 airoha_wr((qdma)->regs, (offset), (val))
596 airoha_rmw((qdma)->regs, (offset), 0, (val))
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A Dairoha_ppe.c899 struct airoha_eth *eth = port->qdma->eth; in airoha_ppe_flow_offload_replace()
1099 struct airoha_eth *eth = port->qdma->eth; in airoha_ppe_flow_offload_destroy()
1145 struct airoha_eth *eth = port->qdma->eth; in airoha_ppe_flow_offload_stats()
1249 struct airoha_eth *eth = port->qdma->eth; in airoha_ppe_setup_tc_block_cb()
1283 struct airoha_eth *eth = port->qdma->eth; in airoha_ppe_init_upd_mem()
/drivers/dma/amd/qdma/
A DMakefile3 obj-$(CONFIG_AMD_QDMA) += amd-qdma.o
5 amd-qdma-$(CONFIG_AMD_QDMA) := qdma.o qdma-comm-regs.o
/drivers/dma/
A Dfsl-qdma.c187 struct fsl_qdma_engine *qdma; member
291 static u32 qdma_readl(struct fsl_qdma_engine *qdma, void __iomem *addr) in qdma_readl() argument
293 return FSL_DMA_IN(qdma, addr, 32); in qdma_readl()
296 static void qdma_writel(struct fsl_qdma_engine *qdma, u32 val, in qdma_writel() argument
299 FSL_DMA_OUT(qdma, addr, val, 32); in qdma_writel()
316 struct fsl_qdma_engine *fsl_qdma = fsl_chan->qdma; in fsl_qdma_free_chan_resources()
999 reg = qdma_readl(fsl_chan->qdma, block + FSL_QDMA_BCQSR(fsl_queue->id)); in fsl_qdma_enqueue_desc()
1015 reg = qdma_readl(fsl_chan->qdma, block + FSL_QDMA_BCQMR(fsl_queue->id)); in fsl_qdma_enqueue_desc()
1017 qdma_writel(fsl_chan->qdma, reg, block + FSL_QDMA_BCQMR(fsl_queue->id)); in fsl_qdma_enqueue_desc()
1073 struct fsl_qdma_engine *fsl_qdma = fsl_chan->qdma; in fsl_qdma_alloc_chan_resources()
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A DMakefile41 obj-$(CONFIG_FSL_QDMA) += fsl-qdma.o
86 obj-$(CONFIG_FSL_DPAA2_QDMA) += fsl-dpaa2-qdma/
A DKconfig241 The qdma driver only work on SoCs with a DPAA hardware block.
773 source "drivers/dma/fsl-dpaa2-qdma/Kconfig"
/drivers/crypto/hisilicon/
A Dqm.c1052 addr = (u32 *)(qp->qdma.va + qp->qdma.size) - offset; in qm_set_qp_disable()
2898 qdma = &qm->qp_array[i].qdma; in hisi_qp_memory_uninit()
2899 dma_free_coherent(dev, qdma->size, qdma->va, qdma->dma); in hisi_qp_memory_uninit()
2921 qp->qdma.va = dma_alloc_coherent(dev, dma_size, &qp->qdma.dma, in hisi_qp_memory_init()
2923 if (!qp->qdma.va) in hisi_qp_memory_init()
3040 if (qm->qdma.va) { in hisi_qm_memory_uninit()
3043 qm->qdma.va, qm->qdma.dma); in hisi_qm_memory_uninit()
3315 memset(qp->qdma.va, 0, qp->qdma.size); in qm_clear_queues()
3318 memset(qm->qdma.va, 0, qm->qdma.size); in qm_clear_queues()
5551 qm->qdma.va = dma_alloc_coherent(dev, qm->qdma.size, &qm->qdma.dma, in hisi_qm_memory_init()
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/drivers/net/ethernet/mediatek/
A Dmtk_eth_soc.c61 .qdma = {
127 .qdma = {
178 .qdma = {
2450 dma = mtk_r32(eth, reg_map->qdma.drx_ptr); in mtk_poll_tx_qdma()
2484 mtk_w32(eth, cpu, reg_map->qdma.crx_ptr); in mtk_poll_tx_qdma()
2700 soc->reg_map->qdma.crx_ptr); in mtk_tx_alloc()
2880 reg_map->qdma.rst_idx); in mtk_rx_alloc()
3208 reg = eth->soc->reg_map->qdma.glo_cfg; in mtk_dma_busy_wait()
3460 val = mtk_r32(eth, reg_map->qdma.glo_cfg); in mtk_start_dma()
3471 mtk_w32(eth, val, reg_map->qdma.glo_cfg); in mtk_start_dma()
[all …]
A Dmtk_eth_soc.h1178 } qdma; member
/drivers/dma/fsl-dpaa2-qdma/
A DMakefile3 obj-$(CONFIG_FSL_DPAA2_QDMA) += dpaa2-qdma.o dpdmai.o
A Ddpaa2-qdma.c32 struct dpaa2_qdma_engine *dpaa2_qdma = dpaa2_chan->qdma; in dpaa2_qdma_alloc_chan_resources()
68 struct dpaa2_qdma_engine *dpaa2_qdma = dpaa2_chan->qdma; in dpaa2_qdma_free_chan_resources()
94 struct dpaa2_qdma_priv *qdma_priv = dpaa2_chan->qdma->priv; in dpaa2_qdma_request_desc()
250 dpaa2_qdma = dpaa2_chan->qdma; in dpaa2_qdma_prep_memcpy()
644 dpaa2_chan->qdma = dpaa2_qdma; in dpaa2_dpdmai_init_channels()
A Ddpaa2-qdma.h71 struct dpaa2_qdma_engine *qdma; member
/drivers/dma/amd/
A DMakefile5 obj-$(CONFIG_AMD_QDMA) += qdma/

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