Searched refs:qls (Results 1 – 2 of 2) sorted by relevance
| /drivers/net/ethernet/mellanox/mlx5/core/ |
| A D | dpll.c | 199 void *priv, unsigned long *qls, in mlx5_dpll_clock_quality_level_get() argument
220 __set_bit(DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_PRC, qls); in mlx5_dpll_clock_quality_level_get()
223 __set_bit(DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_SSU_A, qls); in mlx5_dpll_clock_quality_level_get()
226 __set_bit(DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_SSU_B, qls); in mlx5_dpll_clock_quality_level_get()
229 __set_bit(DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_EEC1, qls); in mlx5_dpll_clock_quality_level_get()
232 __set_bit(DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_PRTC, qls); in mlx5_dpll_clock_quality_level_get()
235 __set_bit(DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_EPRTC, qls); in mlx5_dpll_clock_quality_level_get()
238 __set_bit(DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_EEEC, qls); in mlx5_dpll_clock_quality_level_get()
241 __set_bit(DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_EPRC, qls); in mlx5_dpll_clock_quality_level_get()
|
| /drivers/dpll/ |
| A D | dpll_netlink.c | 215 DECLARE_BITMAP(qls, DPLL_CLOCK_QUALITY_LEVEL_MAX) = { 0 }; in dpll_msg_add_clock_quality_level()
221 ret = ops->clock_quality_level_get(dpll, dpll_priv(dpll), qls, extack); in dpll_msg_add_clock_quality_level()
224 for_each_set_bit(ql, qls, DPLL_CLOCK_QUALITY_LEVEL_MAX) in dpll_msg_add_clock_quality_level()
|
Completed in 9 milliseconds