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Searched refs:qpc (Results 1 – 16 of 16) sorted by relevance

/drivers/net/ethernet/mellanox/mlx5/core/fpga/
A Dconn.c561 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); in mlx5_fpga_conn_create_qp()
563 MLX5_SET(qpc, qpc, log_page_size, in mlx5_fpga_conn_create_qp()
565 MLX5_SET(qpc, qpc, fre, 1); in mlx5_fpga_conn_create_qp()
566 MLX5_SET(qpc, qpc, rlky, 1); in mlx5_fpga_conn_create_qp()
567 MLX5_SET(qpc, qpc, st, MLX5_QP_ST_RC); in mlx5_fpga_conn_create_qp()
681 MLX5_SET(qpc, qpc, st, MLX5_QP_ST_RC); in mlx5_fpga_conn_init_qp()
710 MLX5_SET(qpc, qpc, next_rcv_psn, in mlx5_fpga_conn_rtr_qp()
742 MLX5_SET(qpc, qpc, log_ack_req_freq, 8); in mlx5_fpga_conn_rts_qp()
743 MLX5_SET(qpc, qpc, min_rnr_nak, 0x12); in mlx5_fpga_conn_rts_qp()
745 MLX5_SET(qpc, qpc, next_send_psn, in mlx5_fpga_conn_rts_qp()
[all …]
/drivers/infiniband/hw/mlx5/
A Dqp.c1166 MLX5_SET(qpc, qpc, fre, 1); in _create_kernel_qp()
1167 MLX5_SET(qpc, qpc, rlky, 1); in _create_kernel_qp()
2033 MLX5_SET(qpc, qpc, no_sq, 1); in create_xrc_tgt_qp()
2176 MLX5_SET(qpc, qpc, cqn_snd, in create_dci()
2180 MLX5_SET(qpc, qpc, cqn_rcv, in create_dci()
2327 MLX5_SET(qpc, qpc, cs_res, in create_user_qp()
2348 MLX5_SET(qpc, qpc, no_sq, 1); in create_user_qp()
3399 MLX5_SET(qpc, qpc, rae, 1); in set_qpc_atomic_flags()
4998 if (MLX5_GET(qpc, qpc, rre)) in query_qp_attr()
5000 if (MLX5_GET(qpc, qpc, rwe)) in query_qp_attr()
[all …]
A Dqpc.c404 u32 opt_param_mask, void *qpc, in modify_qp_mbox_alloc() argument
424 memcpy(MLX5_ADDR_OF(typ##_in, in, qpc), _qpc, \ in modify_qp_mbox_alloc()
446 opt_param_mask, qpc, uid); in modify_qp_mbox_alloc()
453 opt_param_mask, qpc, uid); in modify_qp_mbox_alloc()
460 opt_param_mask, qpc, uid); in modify_qp_mbox_alloc()
467 opt_param_mask, qpc, uid); in modify_qp_mbox_alloc()
474 opt_param_mask, qpc, uid); in modify_qp_mbox_alloc()
480 opt_param_mask, qpc, uid); in modify_qp_mbox_alloc()
486 opt_param_mask, qpc, uid); in modify_qp_mbox_alloc()
496 void *qpc, struct mlx5_core_qp *qp, u32 *ece) in mlx5_core_qp_modify() argument
[all …]
A DMakefile21 qpc.o \
A Dqp.h29 void *qpc, struct mlx5_core_qp *qp, u32 *ece);
A Ddevx.c751 void *qpc; in devx_set_umem_valid() local
753 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); in devx_set_umem_valid()
754 MLX5_SET(qpc, qpc, dbr_umem_valid, 1); in devx_set_umem_valid()
A Dmlx5_ib.h48 #define MLX5_USER_ASSIGNED_UIDX_MASK __mlx5_mask(qpc, user_index)
/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/
A Ddr_send.c305 MLX5_SET(qpc, qpc, st, MLX5_QP_ST_RC); in dr_create_rc_qp()
308 MLX5_SET(qpc, qpc, pd, attr->pdn); in dr_create_rc_qp()
310 MLX5_SET(qpc, qpc, log_page_size, in dr_create_rc_qp()
312 MLX5_SET(qpc, qpc, fre, 1); in dr_create_rc_qp()
313 MLX5_SET(qpc, qpc, rlky, 1); in dr_create_rc_qp()
314 MLX5_SET(qpc, qpc, cqn_snd, attr->cqn); in dr_create_rc_qp()
315 MLX5_SET(qpc, qpc, cqn_rcv, attr->cqn); in dr_create_rc_qp()
916 MLX5_SET(qpc, qpc, rre, 1); in dr_modify_qp_rst2init()
917 MLX5_SET(qpc, qpc, rwe, 1); in dr_modify_qp_rst2init()
957 MLX5_SET(qpc, qpc, mtu, attr->mtu); in dr_cmd_modify_qp_init2rtr()
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/drivers/vfio/pci/mlx5/
A Dcmd.c1266 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); in mlx5vf_create_rc_qp()
1267 MLX5_SET(qpc, qpc, st, MLX5_QP_ST_RC); in mlx5vf_create_rc_qp()
1269 MLX5_SET(qpc, qpc, pd, tracker->pdn); in mlx5vf_create_rc_qp()
1271 MLX5_SET(qpc, qpc, log_page_size, in mlx5vf_create_rc_qp()
1275 MLX5_SET(qpc, qpc, user_index, 0xFFFFFF); in mlx5vf_create_rc_qp()
1276 MLX5_SET(qpc, qpc, no_sq, 1); in mlx5vf_create_rc_qp()
1340 MLX5_SET(qpc, qpc, rre, 1); in mlx5vf_activate_qp()
1341 MLX5_SET(qpc, qpc, rwe, 1); in mlx5vf_activate_qp()
1361 MLX5_SET(qpc, qpc, mtu, IB_MTU_4096); in mlx5vf_activate_qp()
1366 MLX5_SET(qpc, qpc, min_rnr_nak, 1); in mlx5vf_activate_qp()
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/drivers/net/ethernet/mellanox/mlx5/core/
A Ddebugfs.c311 u32 *qpc; in qp_read_field() local
326 qpc = MLX5_ADDR_OF(query_qp_out, out, qpc); in qp_read_field()
332 state = MLX5_GET(qpc, qpc, state); in qp_read_field()
337 param = (unsigned long)mlx5_qp_type_str(MLX5_GET(qpc, qpc, st)); in qp_read_field()
341 switch (MLX5_GET(qpc, qpc, mtu)) { in qp_read_field()
362 param = 1 << MLX5_GET(qpc, qpc, log_rq_size); in qp_read_field()
365 param = 1 << (MLX5_GET(qpc, qpc, log_rq_stride) + 4); in qp_read_field()
368 if (!MLX5_GET(qpc, qpc, no_sq)) in qp_read_field()
369 param = 1 << MLX5_GET(qpc, qpc, log_sq_size); in qp_read_field()
372 param = MLX5_GET(qpc, qpc, log_page_size) + 12; in qp_read_field()
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A Dwq.c100 void *qpc, struct mlx5_wq_qp *wq, in mlx5_wq_qp_create() argument
103 u8 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride) + 4; in mlx5_wq_qp_create()
104 u8 log_rq_sz = MLX5_GET(qpc, qpc, log_rq_size); in mlx5_wq_qp_create()
106 u8 log_sq_sz = MLX5_GET(qpc, qpc, log_sq_size); in mlx5_wq_qp_create()
A Dwq.h86 void *qpc, struct mlx5_wq_qp *wq,
/drivers/net/ethernet/mellanox/mlx5/core/ipoib/
A Dipoib.c211 u32 *qpc; in mlx5i_init_underlay_qp() local
213 qpc = MLX5_ADDR_OF(rst2init_qp_in, in, qpc); in mlx5i_init_underlay_qp()
215 MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); in mlx5i_init_underlay_qp()
216 MLX5_SET(qpc, qpc, primary_address_path.pkey_index, in mlx5i_init_underlay_qp()
219 MLX5_SET(qpc, qpc, q_key, IB_DEFAULT_Q_KEY); in mlx5i_init_underlay_qp()
280 void *qpc; in mlx5i_create_underlay_qp() local
287 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); in mlx5i_create_underlay_qp()
289 MLX5_SET(qpc, qpc, st, MLX5_QP_ST_UD); in mlx5i_create_underlay_qp()
290 MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); in mlx5i_create_underlay_qp()
291 MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, in mlx5i_create_underlay_qp()
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/drivers/vdpa/mlx5/net/
A Dmlx5_vnet.c382 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); in qp_prepare()
389 MLX5_SET(qpc, qpc, no_sq, 1); in qp_prepare()
393 MLX5_SET(qpc, qpc, st, MLX5_QP_ST_RC); in qp_prepare()
399 MLX5_SET(qpc, qpc, no_sq, 1); in qp_prepare()
449 MLX5_SET(qpc, qpc, st, MLX5_QP_ST_RC); in qp_create()
1069 MLX5_SET(qpc, qpc, remote_qpn, rqpn); in alloc_inout()
1070 MLX5_SET(qpc, qpc, rwe, 1); in alloc_inout()
1087 MLX5_SET(qpc, qpc, log_msg_max, 30); in alloc_inout()
1088 MLX5_SET(qpc, qpc, remote_qpn, rqpn); in alloc_inout()
1106 MLX5_SET(qpc, qpc, retry_count, 7); in alloc_inout()
[all …]
/drivers/net/ethernet/mellanox/mlx4/
A Dresource_tracker.c793 qpc->pri_path.vlan_control &= in update_vport_qp_param()
797 qpc->pri_path.vlan_control |= in update_vport_qp_param()
810 qpc->pri_path.vlan_control |= in update_vport_qp_param()
816 qpc->pri_path.vlan_control |= in update_vport_qp_param()
822 qpc->pri_path.vlan_control |= in update_vport_qp_param()
841 qpc->pri_path.grh_mylmc = (0x80 & qpc->pri_path.grh_mylmc) + vp_oper->mac_idx; in update_vport_qp_param()
2967 int rcqn = qp_get_rcqn(qpc); in mlx4_RST2INIT_QP_wrapper()
2968 int scqn = qp_get_scqn(qpc); in mlx4_RST2INIT_QP_wrapper()
3038 qp->param3 = qpc->param3; in mlx4_RST2INIT_QP_wrapper()
3794 qpc->alt_path.sched_queue = in adjust_qp_sched_queue()
[all …]
/drivers/infiniband/hw/hns/
A Dhns_roce_restrack.c100 struct hns_roce_v2_qp_context qpc; in hns_roce_fill_res_qp_entry_raw() member
108 ret = hr_dev->hw->query_qpc(hr_dev, hr_qp->qpn, &context.qpc); in hns_roce_fill_res_qp_entry_raw()

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