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Searched refs:r0 (Results 1 – 25 of 55) sorted by relevance

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/drivers/memory/
A Dti-emif-sram-pm.S50 ldr r1, [r0, #EMIF_SDRAM_CONFIG]
56 ldr r1, [r0, #EMIF_SDRAM_TIMING_1]
59 ldr r1, [r0, #EMIF_SDRAM_TIMING_2]
62 ldr r1, [r0, #EMIF_SDRAM_TIMING_3]
74 ldr r1, [r0, #EMIF_DDR_PHY_CTRL_1]
77 ldr r1, [r0, #EMIF_COS_CONFIG]
89 ldr r1, [r0, #EMIF_OCP_CONFIG]
117 add r3, r0, #EMIF_EXT_PHY_CTRL_1
169 str r1, [r0, #EMIF_COS_CONFIG]
181 str r1, [r0, #EMIF_OCP_CONFIG]
[all …]
/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/
A Dmacros.fuc194 */ mov $r0 ior /*
197 */ clear b32 $r0
200 */ mov $r0 ior /*
202 */ clear b32 $r0
207 */ mov $r0 ior /*
210 */ clear b32 $r0
215 */ clear b32 $r0
236 */ clear b32 $r0
251 */ clear b32 $r0
257 */ clear b32 $r0
[all …]
A Dkernel.fuc51 // $r0 - zero
68 // $r0 - zero
96 // $r0 - zero
117 // $r0 - zero
177 push $r0
178 clear b32 $r0
198 st b32 D[$r0 + #time_next] $r0
239 pop $r0
248 // $r0 - zero
282 // $r0 - zero
[all …]
A Dmemx.fuc82 // $r0 - zero
126 // $r0 - zero
170 // $r0 - zero
208 // $r0 - zero
222 // $r0 - zero
241 // $r0 - zero
258 // $r0 - zero
270 // $r0 - zero
367 // $r0 - zero
408 // $r0 - zero
[all …]
A Di2c_.fuc82 // $r0 - zero
205 // $r0 - zero
220 // $r0 - zero
310 // $r0 - zero
390 // $r0 - zero
/drivers/gpu/drm/nouveau/nvkm/engine/sec/fuc/
A Dg98.fuc0s100 clear b32 $r0
107 mov $sp $r0
145 mov $xdbase $r0
159 xdst $r0 $r2
180 xdld $r0 $r2
320 st b32 D[$r0 + #swap + 0x4] $r0
442 xdst $r0 $r4
445 xdst $r0 $r4
506 xdld $r0 $r4
648 xdst $r0 $r9
[all …]
/drivers/scsi/arm/
A Dacornscsi-io.S23 bic r0, r0, #3
29 ldmia r0!, {r3, r4, r5, r6}
34 ldmia r0!, {r5, r6, r7, ip}
45 ldmia r0!, {r3, r4, r5, r6}
56 ldmia r0!, {r3, r4}
64 ldr r3, [r0], #4
77 bic r0, r0, #3
90 stmia r0!, {r3, r4, r5, r6}
125 stmia r0!, {r3, r4}
131 strb r3, [r0], #1
[all …]
/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/
A Dgpc.fuc125 clear b32 $r0
156 st b32 D[$r0 + #tpc_mask] $r3
160 st b32 D[$r0 + #gpc_id] $r2
185 st b32 D[$r0 + #unk_mask] $r4
326 push $r0
336 clear b32 $r0
363 pop $r0
372 ld b32 $r14 D[$r0 + #gpc_id]
433 ld b32 $r12 D[$r0 + #gpc_id]
447 ld b32 $r12 D[$r0 + #gpc_id]
[all …]
A Dhub.fuc70 clear b32 $r0
71 mov $xdbase $r0
106 sub b32 $r3 $r0 1
123 st b32 D[$r0 + #rop_count] $r1
310 push $r0
320 clear b32 $r0
385 pop $r0
486 mov $xtargets $r0
518 xdld $r0 $r1
587 st b32 D[$r0 + #chan_mmio_count] $r0
[all …]
/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/
A Dcom.fuc137 clear b32 $r0
138 mov $sp $r0
188 mov $xdbase $r0
229 mov b32 $r4 $r0
234 xdst $r0 $r4
237 xdld $r0 $r4
345 iowr I[$r0] $r2
687 push $r0
689 mov $r0 0x800
690 shl b32 $r0 6
[all …]
/drivers/ata/pata_parport/
A Dbpck.c54 t2(4); h = r0(); in bpck_read_regr()
173 buf[i] = r0(); in bpck_read_block()
218 o0 = r0(); in bpck_probe_unit()
237 pi->saved_r0 = r0(); in bpck_connect()
285 pi->saved_r0 = r0(); in bpck_force_spp()
326 buf[i] = r0(); in bpck_test_proto()
438 w2(0x2c); i = r0(); w0(255-i); r = r0(); w0(i); in bpck_test_port()
446 i = r0(); in bpck_test_port()
448 r = r0(); in bpck_test_port()
456 r = r0(); in bpck_test_port()
A Daten.c53 a = r0(); in aten_read_regr()
82 a = r0(); w2(0x20); b = r0(); in aten_read_block()
105 pi->saved_r0 = r0(); in aten_connect()
A Dfit3.c67 w2(0xec); w2(0xee); w2(0xef); a = r0(); in fit3_read_regr()
102 w2(0xef); a = r0(); in fit3_read_block()
103 w2(0xee); b = r0(); in fit3_read_block()
144 pi->saved_r0 = r0(); in fit3_connect()
A Dkbic.c52 a = r0(); w2(4); in kbic_read_regr()
88 pi->saved_r0 = r0(); in k951_connect()
109 pi->saved_r0 = r0(); in k971_connect()
167 buf[2 * k] = r0(); in kbic_read_block()
169 buf[2 * k + 1] = r0(); in kbic_read_block()
A Don26.c58 w2(0x26); a = r0(); w2(4); w2(0x26); w2(4); in on26_read_regr()
104 pi->saved_r0 = r0(); in on26_connect()
136 pi->saved_r0 = r0(); in on26_test_port()
210 w2(0x26); buf[2 * k] = r0(); in on26_read_block()
211 w2(0x24); buf[2 * k + 1] = r0(); in on26_read_block()
A Don20.c52 w2(4); w2(0x26); r = r0(); in on20_read_regr()
71 pi->saved_r0 = r0(); in on20_connect()
97 w2(4); w2(0x26); buf[k] = r0(); in on20_read_block()
A Dcomm.c50 w0(0); w2(0x26); h = r0(); w2(4); in comm_read_regr()
83 pi->saved_r0 = r0(); in comm_connect()
116 buf[i] = r0(); in comm_read_block()
A Depat.c73 a = r0(); w2(4); in epat_read_regr()
128 buf[k] = r0(); in epat_read_block()
132 buf[count - 1] = r0(); in epat_read_block()
228 pi->saved_r0 = r0(); in epat_connect()
A Ddstr.c57 w0(0); w2(0x26); a = r0(); w2(4); in dstr_read_regr()
103 pi->saved_r0 = r0(); in dstr_connect()
138 buf[k] = r0(); in dstr_read_block()
A Dfriq.c89 buf[k] = r0(); in friq_read_block_int()
168 pi->saved_r0 = r0(); in friq_connect()
186 pi->saved_r0 = r0(); in friq_test_proto()
/drivers/clk/
A Dclk-eyeq.c168 if (r0 & PCSR0_BYPASS) { in eqc_pll_parse_registers()
175 if (!(r0 & PCSR0_PLL_LOCKED)) in eqc_pll_parse_registers()
178 *mult = FIELD_GET(PCSR0_INTIN, r0); in eqc_pll_parse_registers()
179 *div = FIELD_GET(PCSR0_REF_DIV, r0); in eqc_pll_parse_registers()
180 if (r0 & PCSR0_FOUTPOSTDIV_EN) in eqc_pll_parse_registers()
181 *div *= FIELD_GET(PCSR0_POST_DIV1, r0) * FIELD_GET(PCSR0_POST_DIV2, r0); in eqc_pll_parse_registers()
184 if (r0 & PCSR0_DSM_EN) { in eqc_pll_parse_registers()
235 u32 r0, r1; in eqc_probe_init_plls() local
243 r0 = val; in eqc_probe_init_plls()
770 u32 r0, r1; in eqc_early_init() local
[all …]
A Dclk-sp7021.c313 u32 r0, r1, r2; in plltv_set_rate() local
315 r0 = BIT(clk->bp_bit + 16); in plltv_set_rate()
316 r0 |= HWM_FIELD_PREP(MASK_SEL_FRA, clk->p[SEL_FRA]); in plltv_set_rate()
317 r0 |= HWM_FIELD_PREP(MASK_SDM_MOD, clk->p[SDM_MOD]); in plltv_set_rate()
318 r0 |= HWM_FIELD_PREP(MASK_PH_SEL, clk->p[PH_SEL]); in plltv_set_rate()
319 r0 |= HWM_FIELD_PREP(MASK_NFRA, clk->p[NFRA]); in plltv_set_rate()
327 writel(r0, clk->reg); in plltv_set_rate()
460 unsigned long r0, r1; in sp_pll_recalc_rate() local
463 r0 = ret * (pp[1] + pp[2]) / pp[0]; in sp_pll_recalc_rate()
465 ret = (r0 - r1) / m; in sp_pll_recalc_rate()
/drivers/media/tuners/
A Dtda18271-maps.c896 u8 r0; member
901 { .d = 0x00, .r0 = 60, .r1 = 92 },
902 { .d = 0x01, .r0 = 62, .r1 = 94 },
903 { .d = 0x02, .r0 = 66, .r1 = 98 },
904 { .d = 0x03, .r0 = 64, .r1 = 96 },
905 { .d = 0x04, .r0 = 74, .r1 = 106 },
906 { .d = 0x05, .r0 = 72, .r1 = 104 },
907 { .d = 0x06, .r0 = 68, .r1 = 100 },
908 { .d = 0x07, .r0 = 70, .r1 = 102 },
909 { .d = 0x08, .r0 = 90, .r1 = 122 },
[all …]
/drivers/pinctrl/mediatek/
A Dpinctrl-mtk-common-v2.c659 int err, r0, r1; in mtk_pinconf_bias_set_pupd_r1_r0() local
663 r0 = 0; in mtk_pinconf_bias_set_pupd_r1_r0()
666 r0 = 1; in mtk_pinconf_bias_set_pupd_r1_r0()
669 r0 = 0; in mtk_pinconf_bias_set_pupd_r1_r0()
672 r0 = 1; in mtk_pinconf_bias_set_pupd_r1_r0()
684 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R0, r0); in mtk_pinconf_bias_set_pupd_r1_r0()
956 int err, r0, r1; in mtk_pinconf_bias_get_pupd_r1_r0() local
972 if ((r1 == 0) && (r0 == 0)) in mtk_pinconf_bias_get_pupd_r1_r0()
974 else if ((r1 == 0) && (r0 == 1)) in mtk_pinconf_bias_get_pupd_r1_r0()
976 else if ((r1 == 1) && (r0 == 0)) in mtk_pinconf_bias_get_pupd_r1_r0()
[all …]
/drivers/firmware/
A Dtrusted_foundations.c38 register u32 r0 asm("r0") = type; in tf_generic_smc()
53 : "r" (r0), "r" (r1), "r" (r2) in tf_generic_smc()

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