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Searched refs:raw_reg_write (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/i915/
A Di915_irq.c444 raw_reg_write(regs, SDEIER, 0); in ilk_irq_handler()
451 raw_reg_write(regs, GTIIR, gt_iir); in ilk_irq_handler()
461 raw_reg_write(regs, DEIIR, de_iir); in ilk_irq_handler()
472 raw_reg_write(regs, GEN6_PMIIR, pm_iir); in ilk_irq_handler()
478 raw_reg_write(regs, DEIER, de_ier); in ilk_irq_handler()
480 raw_reg_write(regs, SDEIER, sde_ier); in ilk_irq_handler()
492 raw_reg_write(regs, GEN8_MASTER_IRQ, 0); in gen8_master_intr_disable()
543 raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, 0); in gen11_master_intr_disable()
600 raw_reg_write(regs, DG1_MSTR_TILE_INTR, 0); in dg1_master_intr_disable()
607 raw_reg_write(regs, DG1_MSTR_TILE_INTR, val); in dg1_master_intr_disable()
[all …]
A Dintel_uncore.h521 #define raw_reg_write(base, reg, value) \ macro
/drivers/gpu/drm/i915/gt/
A Dintel_gt_irq.c40 raw_reg_write(regs, GEN11_IIR_REG_SELECTOR(bank), BIT(bit)); in gen11_gt_engine_identity()
58 raw_reg_write(regs, GEN11_INTR_IDENTITY_REG(bank), in gen11_gt_engine_identity()
166 raw_reg_write(regs, GEN11_GT_INTR_DW(bank), intr_dw); in gen11_gt_bank_handler()
205 raw_reg_write(regs, GEN11_GT_INTR_DW(bank), BIT(bit)); in gen11_gt_reset_one_iir()
417 raw_reg_write(regs, GEN8_GT_IIR(0), iir); in gen8_gt_irq_handler()
428 raw_reg_write(regs, GEN8_GT_IIR(1), iir); in gen8_gt_irq_handler()
437 raw_reg_write(regs, GEN8_GT_IIR(3), iir); in gen8_gt_irq_handler()
446 raw_reg_write(regs, GEN8_GT_IIR(2), iir); in gen8_gt_irq_handler()

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