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Searched refs:rc_model_size (Results 1 – 15 of 15) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dsc/
A Drc_calc_dpi.c55 to->rc_model_size = from->rc_model_size; in copy_pps_fields()
89 dsc_cfg->rc_model_size = rc->rc_model_size; in copy_rc_to_cfg()
106 …dsc_params->pps.initial_scale_value = 8 * rc->rc_model_size / (rc->rc_model_size - rc->initial_ful… in dscc_compute_dsc_parameters()
/drivers/gpu/drm/display/
A Ddrm_dsc_helper.c219 pps_payload->rc_model_size = cpu_to_be16(dsc_cfg->rc_model_size); in drm_dsc_pps_payload_pack()
284 if (!vdsc_cfg->rc_model_size) in drm_dsc_set_const_params()
285 vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST; in drm_dsc_set_const_params()
1372 vdsc_cfg->final_offset = vdsc_cfg->rc_model_size - in drm_dsc_compute_rc_parameters()
1376 if (vdsc_cfg->final_offset >= vdsc_cfg->rc_model_size) { in drm_dsc_compute_rc_parameters()
1381 final_scale = (vdsc_cfg->rc_model_size * 8) / in drm_dsc_compute_rc_parameters()
1382 (vdsc_cfg->rc_model_size - vdsc_cfg->final_offset); in drm_dsc_compute_rc_parameters()
1398 vdsc_cfg->slice_bpg_offset = DIV_ROUND_UP(((vdsc_cfg->rc_model_size - in drm_dsc_compute_rc_parameters()
1428 rbs_min = vdsc_cfg->rc_model_size - vdsc_cfg->initial_offset + in drm_dsc_compute_rc_parameters()
1462 return 8 * dsc->rc_model_size / (dsc->rc_model_size - dsc->initial_offset); in drm_dsc_initial_scale_value()
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/drivers/gpu/drm/amd/display/dc/dml/dsc/
A Drc_calc_fpu.h49 int rc_model_size; member
A Drc_calc_fpu.c240 rc->rc_model_size = 8192; in _do_calc_rc_params()
/drivers/gpu/drm/amd/display/dc/dsc/dcn20/
A Ddcn20_dsc.c318 DC_LOG_DSC("\trc_model_size %d", pps->rc_model_size); in dsc_log_pps()
339 rc->rc_model_size = override->rc_model_size; in dsc_override_rc_params()
552 reg_vals->pps.rc_model_size = 8192; in dsc_init_reg_values()
677 RC_MODEL_SIZE, reg_vals->pps.rc_model_size); in dsc_write_to_registers()
/drivers/gpu/drm/i915/display/
A Dintel_vdsc_regs.h163 #define DSC_PPS9_RC_MODEL_SIZE(rc_model_size) REG_FIELD_PREP(DSC_PPS9_RC_MODEL_SIZE_MASK, \ argument
164 rc_model_size)
A Dintel_vdsc.c369 vdsc_cfg->initial_scale_value = (vdsc_cfg->rc_model_size << 3) / in intel_dsc_compute_params()
370 (vdsc_cfg->rc_model_size - vdsc_cfg->initial_offset); in intel_dsc_compute_params()
532 pps_val = DSC_PPS9_RC_MODEL_SIZE(vdsc_cfg->rc_model_size) | in intel_dsc_pps_configure()
953 vdsc_cfg->rc_model_size = REG_FIELD_GET(DSC_PPS9_RC_MODEL_SIZE_MASK, pps_temp); in intel_dsc_get_pps_config()
A Dicl_dsi.c1612 vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST; in gen11_dsi_dsc_compute_config()
A Dintel_bios.c3514 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size, in fill_dsc()
A Dintel_dp.c1895 vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST; in intel_dp_dsc_compute_params()
A Dintel_display.c5408 PIPE_CONF_CHECK_I(dsc.config.rc_model_size); in intel_pipe_config_compare()
/drivers/gpu/drm/msm/disp/dpu1/
A Ddpu_hw_dsc.c117 data = dsc->rc_model_size; in dpu_hw_dsc_config()
A Ddpu_hw_dsc_1_2.c211 (dsc->rc_model_size) & 0xffff); in dpu_hw_dsc_config_1_2()
/drivers/gpu/drm/amd/display/dc/
A Ddc_hw_types.h840 int32_t rc_model_size; member
/drivers/gpu/drm/amd/display/dc/dsc/dcn401/
A Ddcn401_dsc.c299 RC_MODEL_SIZE, reg_vals->pps.rc_model_size); in dsc_write_to_registers()

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