Searched refs:rc_range_params (Results 1 – 7 of 7) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/dsc/dcn401/ |
| A D | dcn401_dsc.c | 329 RANGE_MIN_QP0, reg_vals->pps.rc_range_params[0].range_min_qp, in dsc_write_to_registers() 330 RANGE_MAX_QP0, reg_vals->pps.rc_range_params[0].range_max_qp, in dsc_write_to_registers() 334 RANGE_MIN_QP1, reg_vals->pps.rc_range_params[1].range_min_qp, in dsc_write_to_registers() 335 RANGE_MAX_QP1, reg_vals->pps.rc_range_params[1].range_max_qp, in dsc_write_to_registers() 337 RANGE_MIN_QP2, reg_vals->pps.rc_range_params[2].range_min_qp, in dsc_write_to_registers() 338 RANGE_MAX_QP2, reg_vals->pps.rc_range_params[2].range_max_qp, in dsc_write_to_registers() 342 RANGE_MIN_QP3, reg_vals->pps.rc_range_params[3].range_min_qp, in dsc_write_to_registers() 343 RANGE_MAX_QP3, reg_vals->pps.rc_range_params[3].range_max_qp, in dsc_write_to_registers() 345 RANGE_MIN_QP4, reg_vals->pps.rc_range_params[4].range_min_qp, in dsc_write_to_registers() 346 RANGE_MAX_QP4, reg_vals->pps.rc_range_params[4].range_max_qp, in dsc_write_to_registers() [all …]
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| /drivers/gpu/drm/amd/display/dc/dsc/dcn20/ |
| A D | dcn20_dsc.c | 707 RANGE_MIN_QP0, reg_vals->pps.rc_range_params[0].range_min_qp, in dsc_write_to_registers() 708 RANGE_MAX_QP0, reg_vals->pps.rc_range_params[0].range_max_qp, in dsc_write_to_registers() 712 RANGE_MIN_QP1, reg_vals->pps.rc_range_params[1].range_min_qp, in dsc_write_to_registers() 713 RANGE_MAX_QP1, reg_vals->pps.rc_range_params[1].range_max_qp, in dsc_write_to_registers() 715 RANGE_MIN_QP2, reg_vals->pps.rc_range_params[2].range_min_qp, in dsc_write_to_registers() 716 RANGE_MAX_QP2, reg_vals->pps.rc_range_params[2].range_max_qp, in dsc_write_to_registers() 720 RANGE_MIN_QP3, reg_vals->pps.rc_range_params[3].range_min_qp, in dsc_write_to_registers() 721 RANGE_MAX_QP3, reg_vals->pps.rc_range_params[3].range_max_qp, in dsc_write_to_registers() 723 RANGE_MIN_QP4, reg_vals->pps.rc_range_params[4].range_min_qp, in dsc_write_to_registers() 724 RANGE_MAX_QP4, reg_vals->pps.rc_range_params[4].range_max_qp, in dsc_write_to_registers() [all …]
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| /drivers/gpu/drm/amd/display/dc/dsc/ |
| A D | rc_calc_dpi.c | 54 memcpy(&to->rc_range_params, &from->rc_range_params, sizeof(from->rc_range_params)); in copy_pps_fields() 84 dsc_cfg->rc_range_params[i].range_min_qp = rc->qp_min[i]; in copy_rc_to_cfg() 85 dsc_cfg->rc_range_params[i].range_max_qp = rc->qp_max[i]; in copy_rc_to_cfg() 87 dsc_cfg->rc_range_params[i].range_bpg_offset = 0x3f & rc->ofs[i]; in copy_rc_to_cfg()
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| /drivers/gpu/drm/display/ |
| A D | drm_dsc_helper.c | 248 cpu_to_be16((dsc_cfg->rc_range_params[i].range_min_qp << in drm_dsc_pps_payload_pack() 250 (dsc_cfg->rc_range_params[i].range_max_qp << in drm_dsc_pps_payload_pack() 252 (dsc_cfg->rc_range_params[i].range_bpg_offset)); in drm_dsc_pps_payload_pack() 1286 vdsc_cfg->rc_range_params[i].range_min_qp = in drm_dsc_setup_rc_params() 1287 rc_params->rc_range_params[i].range_min_qp; in drm_dsc_setup_rc_params() 1288 vdsc_cfg->rc_range_params[i].range_max_qp = in drm_dsc_setup_rc_params() 1289 rc_params->rc_range_params[i].range_max_qp; in drm_dsc_setup_rc_params() 1294 vdsc_cfg->rc_range_params[i].range_bpg_offset = in drm_dsc_setup_rc_params() 1295 rc_params->rc_range_params[i].range_bpg_offset & in drm_dsc_setup_rc_params() 1521 const struct drm_dsc_rc_range_parameters *rp = cfg->rc_range_params; in drm_dsc_dump_config_rc_params() [all …]
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| /drivers/gpu/drm/i915/display/ |
| A D | intel_vdsc.c | 63 vdsc_cfg->rc_range_params[buf].range_min_qp = in intel_vdsc_set_min_max_qp() 65 vdsc_cfg->rc_range_params[buf].range_max_qp = in intel_vdsc_set_min_max_qp() 186 vdsc_cfg->rc_range_params[buf_i].range_bpg_offset = in calculate_rc_params() 234 vdsc_cfg->rc_range_params[buf_i].range_bpg_offset = in calculate_rc_params() 616 (u32)(((vdsc_cfg->rc_range_params[i].range_bpg_offset << in intel_dsc_pps_configure() 618 (vdsc_cfg->rc_range_params[i].range_max_qp << in intel_dsc_pps_configure() 620 (vdsc_cfg->rc_range_params[i].range_min_qp << in intel_dsc_pps_configure()
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| /drivers/gpu/drm/msm/disp/dpu1/ |
| A D | dpu_hw_dsc.c | 131 struct drm_dsc_rc_range_parameters *rc = dsc->rc_range_params; in dpu_hw_dsc_config_thresh()
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| A D | dpu_hw_dsc_1_2.c | 255 rc = dsc->rc_range_params; in dpu_hw_dsc_config_thresh_1_2()
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