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Searched refs:rd32 (Results 1 – 25 of 102) sorted by relevance

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/drivers/net/ethernet/intel/igc/
A Digc_mac.c238 rd32(IGC_MPC); in igc_clear_hw_cntrs_base()
239 rd32(IGC_SCC); in igc_clear_hw_cntrs_base()
241 rd32(IGC_MCC); in igc_clear_hw_cntrs_base()
245 rd32(IGC_DC); in igc_clear_hw_cntrs_base()
261 rd32(IGC_RUC); in igc_clear_hw_cntrs_base()
262 rd32(IGC_RFC); in igc_clear_hw_cntrs_base()
263 rd32(IGC_ROC); in igc_clear_hw_cntrs_base()
264 rd32(IGC_RJC); in igc_clear_hw_cntrs_base()
269 rd32(IGC_TPR); in igc_clear_hw_cntrs_base()
270 rd32(IGC_TPT); in igc_clear_hw_cntrs_base()
[all …]
A Digc_i225.c49 swsm = rd32(IGC_SWSM); in igc_get_hw_semaphore_i225()
65 swsm = rd32(IGC_SWSM); in igc_get_hw_semaphore_i225()
82 swsm = rd32(IGC_SWSM); in igc_get_hw_semaphore_i225()
253 rd32(IGC_SRWR)) { in igc_write_nvm_srwr()
357 reg = rd32(IGC_EECD); in igc_pool_flash_update_done_i225()
464 eec = rd32(IGC_EECD); in igc_get_flash_presence_i225()
512 eeer = rd32(IGC_EEER); in igc_set_eee_i225()
547 rd32(IGC_IPCNFG); in igc_set_eee_i225()
548 rd32(IGC_EEER); in igc_set_eee_i225()
576 ltrc = rd32(IGC_LTRC) | in igc_set_ltr_i225()
[all …]
A Digc_ptp.c31 nsec = rd32(IGC_SYSTIML); in igc_ptp_read()
32 sec = rd32(IGC_SYSTIMH); in igc_ptp_read()
178 ctrl = rd32(IGC_CTRL); in igc_pin_perout()
224 ctrl = rd32(IGC_CTRL); in igc_pin_extts()
507 val = rd32(IGC_RXPBS); in igc_ptp_disable_rx_timestamp()
518 val = rd32(IGC_RXPBS); in igc_ptp_enable_rx_timestamp()
607 rd32(IGC_TXSTMPL); in igc_ptp_enable_tx_timestamp()
608 rd32(IGC_TXSTMPH); in igc_ptp_enable_tx_timestamp()
709 rd32(IGC_TXSTMPH_0); in igc_ptp_tx_hang()
807 rd32(IGC_TXSTMPH); in igc_ptp_tx_hwtstamp()
[all …]
A Digc_base.c40 ctrl = rd32(IGC_CTRL); in igc_reset_hw_base()
56 rd32(IGC_ICR); in igc_reset_hw_base()
68 u32 eecd = rd32(IGC_EECD); in igc_init_nvm_params_base()
116 ctrl = rd32(IGC_CTRL); in igc_setup_copper_link_base()
342 rfctl = rd32(IGC_RFCTL); in igc_rx_fifo_flush_base()
351 rxdctl[i] = rd32(IGC_RXDCTL(i)); in igc_rx_fifo_flush_base()
374 rlpml = rd32(IGC_RLPML); in igc_rx_fifo_flush_base()
377 rctl = rd32(IGC_RCTL); in igc_rx_fifo_flush_base()
398 rd32(IGC_ROC); in igc_rx_fifo_flush_base()
399 rd32(IGC_RNBC); in igc_rx_fifo_flush_base()
[all …]
A Digc_dump.c54 regs[n] = rd32(IGC_RDLEN(n)); in igc_regdump()
58 regs[n] = rd32(IGC_RDH(n)); in igc_regdump()
62 regs[n] = rd32(IGC_RDT(n)); in igc_regdump()
70 regs[n] = rd32(IGC_RDBAL(n)); in igc_regdump()
74 regs[n] = rd32(IGC_RDBAH(n)); in igc_regdump()
78 regs[n] = rd32(IGC_TDBAL(n)); in igc_regdump()
82 regs[n] = rd32(IGC_TDBAH(n)); in igc_regdump()
86 regs[n] = rd32(IGC_TDLEN(n)); in igc_regdump()
90 regs[n] = rd32(IGC_TDH(n)); in igc_regdump()
94 regs[n] = rd32(IGC_TDT(n)); in igc_regdump()
[all …]
A Digc_tsn.c300 return (rd32(IGC_BASET_H) || rd32(IGC_BASET_L)) && in igc_tsn_is_taprio_activated_by_user()
309 txarb = rd32(IGC_TXARB); in igc_tsn_tx_arb()
345 u32 rxpbs = rd32(IGC_RXPBS); in igc_tsn_set_rxpbsize()
372 tqavctrl = rd32(IGC_TQAVCTRL); in igc_tsn_disable_offload()
416 retxctl = rd32(IGC_RETX_CTL); in igc_tsn_set_retx_qbvfullthreshold()
583 tqavcc = rd32(IGC_TQAVCC(i)); in igc_tsn_enable_offload()
622 nsec = rd32(IGC_SYSTIML); in igc_tsn_enable_offload()
623 sec = rd32(IGC_SYSTIMH); in igc_tsn_enable_offload()
639 if (!(rd32(IGC_BASET_H) || rd32(IGC_BASET_L))) in igc_tsn_enable_offload()
642 nsec = rd32(IGC_SYSTIML); in igc_tsn_enable_offload()
[all …]
A Digc_ethtool.c183 regs_buff[0] = rd32(IGC_CTRL); in igc_ethtool_get_regs()
186 regs_buff[3] = rd32(IGC_MDIC); in igc_ethtool_get_regs()
190 regs_buff[5] = rd32(IGC_EECD); in igc_ethtool_get_regs()
196 regs_buff[6] = rd32(IGC_EICS); in igc_ethtool_get_regs()
197 regs_buff[7] = rd32(IGC_EICS); in igc_ethtool_get_regs()
198 regs_buff[8] = rd32(IGC_EIMS); in igc_ethtool_get_regs()
199 regs_buff[9] = rd32(IGC_EIMC); in igc_ethtool_get_regs()
205 regs_buff[12] = rd32(IGC_ICS); in igc_ethtool_get_regs()
1191 u32 mrqc = rd32(IGC_MRQC); in igc_ethtool_set_rxfh_fields()
1737 eeer = rd32(IGC_EEER); in igc_ethtool_get_eee()
[all …]
A Digc_diag.c45 before = rd32(reg); in reg_pattern_test()
47 val = rd32(reg); in reg_pattern_test()
67 before = rd32(reg); in reg_set_and_check()
69 val = rd32(reg); in reg_set_and_check()
95 before = rd32(IGC_STATUS); in igc_reg_test()
98 after = rd32(IGC_STATUS) & toggle; in igc_reg_test()
A Digc_main.c838 rctl = rd32(IGC_RCTL); in igc_setup_rctl()
889 tctl = rd32(IGC_TCTL); in igc_setup_tctl()
1865 ctrl = rd32(IGC_CTRL); in igc_vlan_mode()
3640 wufc = rd32(IGC_WUFC); in igc_write_flex_filter_ll()
3735 wufc = rd32(IGC_WUFC); in igc_find_avail_flex_filter_slot()
3756 wufc = rd32(IGC_WUFC); in igc_flex_filter_in_use()
3872 wufc = rd32(IGC_WUFC); in igc_del_flex_filter()
5133 rd32(IGC_ICR); in igc_up()
5230 mpc = rd32(IGC_MPC); in igc_update_stats()
6240 rd32(IGC_ICR); in __igc_open()
[all …]
A Digc_nvm.c23 reg = rd32(IGC_EERD); in igc_poll_eerd_eewr_done()
25 reg = rd32(IGC_EEWR); in igc_poll_eerd_eewr_done()
72 data[i] = (rd32(IGC_EERD) >> IGC_NVM_RW_REG_DATA); in igc_read_nvm_eerd()
89 rar_high = rd32(IGC_RAH(0)); in igc_read_mac_addr()
90 rar_low = rd32(IGC_RAL(0)); in igc_read_mac_addr()
/drivers/net/ethernet/intel/igb/
A De1000_mac.c562 rd32(E1000_MPC); in igb_clear_hw_cntrs_base()
563 rd32(E1000_SCC); in igb_clear_hw_cntrs_base()
565 rd32(E1000_MCC); in igb_clear_hw_cntrs_base()
568 rd32(E1000_DC); in igb_clear_hw_cntrs_base()
569 rd32(E1000_SEC); in igb_clear_hw_cntrs_base()
585 rd32(E1000_RUC); in igb_clear_hw_cntrs_base()
586 rd32(E1000_RFC); in igb_clear_hw_cntrs_base()
587 rd32(E1000_ROC); in igb_clear_hw_cntrs_base()
588 rd32(E1000_RJC); in igb_clear_hw_cntrs_base()
593 rd32(E1000_TPR); in igb_clear_hw_cntrs_base()
[all …]
A De1000_82575.c1495 rd32(E1000_ICR); in igb_reset_hw_82575()
1881 rd32(E1000_PRC64); in igb_clear_hw_cntrs_82575()
1887 rd32(E1000_PTC64); in igb_clear_hw_cntrs_82575()
1896 rd32(E1000_TNCRS); in igb_clear_hw_cntrs_82575()
1898 rd32(E1000_TSCTC); in igb_clear_hw_cntrs_82575()
1905 rd32(E1000_IAC); in igb_clear_hw_cntrs_82575()
2006 rd32(E1000_ROC); in igb_rx_fifo_flush_82575()
2007 rd32(E1000_RNBC); in igb_rx_fifo_flush_82575()
2008 rd32(E1000_MPC); in igb_rx_fifo_flush_82575()
2314 rd32(E1000_ICR); in igb_reset_hw_82580()
[all …]
A Digb_ethtool.c147 0 : rd32(E1000_STATUS); in igb_get_link_ksettings()
1227 val = rd32(reg) & mask; in reg_pattern_test()
1247 val = rd32(reg); in reg_set_and_check()
1308 before = rd32(E1000_STATUS); in igb_reg_test()
1686 reg = rd32(E1000_CTRL_EXT); in igb_setup_loopback_test()
1707 reg = rd32(E1000_RCTL); in igb_setup_loopback_test()
1713 reg = rd32(E1000_CTRL); in igb_setup_loopback_test()
1722 reg = rd32(E1000_CONNSW); in igb_setup_loopback_test()
1775 rctl = rd32(E1000_RCTL); in igb_loopback_cleanup()
2701 etqf = rd32(E1000_ETQF(i)); in igb_rxnfc_write_etype_filter()
[all …]
A Digb_ptp.c83 lo = rd32(E1000_SYSTIML); in igb_ptp_read_82576()
84 hi = rd32(E1000_SYSTIMH); in igb_ptp_read_82576()
104 rd32(E1000_SYSTIMR); in igb_ptp_read_82580()
105 lo = rd32(E1000_SYSTIML); in igb_ptp_read_82580()
125 rd32(E1000_SYSTIMR); in igb_ptp_read_i210()
300 rd32(E1000_SYSTIMR); in igb_ptp_gettimex_82580()
326 rd32(E1000_SYSTIMR); in igb_ptp_gettimex_i210()
583 rd32(E1000_SYSTIMR); in igb_ptp_feature_enable_82580()
825 rd32(E1000_TXSTMPH); in igb_ptp_tx_work()
890 rd32(E1000_RXSTMPH); in igb_ptp_rx_hang()
[all …]
A De1000_i210.c30 swsm = rd32(E1000_SWSM); in igb_get_hw_semaphore_i210()
46 swsm = rd32(E1000_SWSM); in igb_get_hw_semaphore_i210()
63 swsm = rd32(E1000_SWSM); in igb_get_hw_semaphore_i210()
131 swfw_sync = rd32(E1000_SW_FW_SYNC); in igb_acquire_swfw_sync_i210()
170 swfw_sync = rd32(E1000_SW_FW_SYNC); in igb_release_swfw_sync_i210()
254 rd32(E1000_SRWR)) { in igb_write_nvm_srwr()
635 reg = rd32(E1000_EECD); in igb_pool_flash_update_done_i210()
656 eec = rd32(E1000_EECD); in igb_get_flash_presence_i210()
834 wuc = rd32(E1000_WUC); in igb_pll_workaround_i210()
835 mdicnfg = rd32(E1000_MDICNFG); in igb_pll_workaround_i210()
[all …]
A Digb_main.c2146 rd32(E1000_TSICR); in igb_up()
2147 rd32(E1000_ICR); in igb_up()
2184 rctl = rd32(E1000_RCTL); in igb_down()
2194 tctl = rd32(E1000_TCTL); in igb_down()
4204 rd32(E1000_TSICR); in __igb_open()
4205 rd32(E1000_ICR); in __igb_open()
4702 val = rd32(reg); in igb_set_vf_vlan_strip()
6841 mpc = rd32(E1000_MPC); in igb_update_stats()
6938 reg = rd32(E1000_MANC); in igb_update_stats()
6967 rd32(E1000_SYSTIMR); in igb_perout()
[all …]
A De1000_nvm.c53 u32 eecd = rd32(E1000_EECD); in igb_shift_out_eec_bits()
98 eecd = rd32(E1000_EECD); in igb_shift_in_eec_bits()
107 eecd = rd32(E1000_EECD); in igb_shift_in_eec_bits()
135 reg = rd32(E1000_EERD); in igb_poll_eerd_eewr_done()
137 reg = rd32(E1000_EEWR); in igb_poll_eerd_eewr_done()
160 u32 eecd = rd32(E1000_EECD); in igb_acquire_nvm()
166 eecd = rd32(E1000_EECD); in igb_acquire_nvm()
172 eecd = rd32(E1000_EECD); in igb_acquire_nvm()
195 u32 eecd = rd32(E1000_EECD); in igb_standby_nvm()
220 eecd = rd32(E1000_EECD); in e1000_stop_nvm()
[all …]
/drivers/net/fjes/
A Dfjes_ethtool.c177 regs_buff[1] = rd32(XSCT_MAX_EP); in fjes_get_regs()
180 regs_buff[4] = rd32(XSCT_DCTL); in fjes_get_regs()
183 regs_buff[8] = rd32(XSCT_CR); in fjes_get_regs()
184 regs_buff[9] = rd32(XSCT_CS); in fjes_get_regs()
188 regs_buff[13] = rd32(XSCT_REQBL); in fjes_get_regs()
189 regs_buff[14] = rd32(XSCT_REQBAL); in fjes_get_regs()
197 regs_buff[32] = rd32(XSCT_IS); in fjes_get_regs()
198 regs_buff[33] = rd32(XSCT_IMS); in fjes_get_regs()
199 regs_buff[34] = rd32(XSCT_IMC); in fjes_get_regs()
200 regs_buff[35] = rd32(XSCT_IG); in fjes_get_regs()
[all …]
/drivers/net/ethernet/wangxun/libwx/
A Dwx_hw.c42 return (u16)rd32(wx, WX_MSCC); in wx_phy_read_reg_mdi()
194 *data = rd32(wx, WX_SPI_DATA); in wx_flash_read_dword()
205 if (!(rd32(hw, WX_SPI_STATUS) & in wx_check_flash_load()
236 fwsm = rd32(wx, WX_MIS_ST); in wx_mng_present()
319 buf[0] = rd32(wx, WX_MNG_MBOX); in wx_host_interface_command_s()
653 value = rd32(wx, reg); in wx_read_ee_hostif_buffer()
2810 rd32(wx, WX_RDM_PKT_CNT); in wx_clear_hw_cntrs()
2811 rd32(wx, WX_TDM_PKT_CNT); in wx_clear_hw_cntrs()
2814 rd32(wx, WX_RDM_DRP_PKT); in wx_clear_hw_cntrs()
2825 rd32(wx, WX_RDB_LXONTXC); in wx_clear_hw_cntrs()
[all …]
A Dwx_sriov.c225 u32 vmolr = rd32(wx, WX_PSR_VM_L2CTL(vf)); in wx_set_vmolr()
271 reg = rd32(wx, WX_RDM_PF_QDE(n)); in wx_write_qde()
303 reg_cur_tx = rd32(wx, WX_TDM_VF_TE(index)); in wx_set_vf_rx_tx()
456 u32 vmolr = rd32(wx, WX_PSR_VM_L2CTL(vf)); in wx_set_vf_multicasts()
488 vfre = rd32(wx, WX_RDM_VF_RE(index)); in wx_set_vf_lpe()
512 vlvf = rd32(wx, WX_PSR_VLAN_SWC); in wx_find_vlvf_entry()
599 vlvf = rd32(wx, WX_PSR_VLAN_SWC); in wx_set_vf_vlan_msg()
604 bits = rd32(wx, WX_PSR_VLAN_SWC_VM_L); in wx_set_vf_vlan_msg()
610 bits = rd32(wx, WX_PSR_VLAN_SWC_VM_H); in wx_set_vf_vlan_msg()
612 bits |= rd32(wx, WX_PSR_VLAN_SWC_VM_L); in wx_set_vf_vlan_msg()
[all …]
/drivers/net/ethernet/meta/fbnic/
A Dfbnic_csr.c73 *(data++) = rd32(fbd, FBNIC_RPC_TCAM_ACT(i, j)); in fbnic_csr_get_regs_rpc_ram()
79 *(data++) = rd32(fbd, FBNIC_RPC_TCAM_MACDA(i, j)); in fbnic_csr_get_regs_rpc_ram()
85 *(data++) = rd32(fbd, FBNIC_RPC_TCAM_OUTER_IPSRC(i, j)); in fbnic_csr_get_regs_rpc_ram()
91 *(data++) = rd32(fbd, FBNIC_RPC_TCAM_OUTER_IPDST(i, j)); in fbnic_csr_get_regs_rpc_ram()
97 *(data++) = rd32(fbd, FBNIC_RPC_TCAM_IPSRC(i, j)); in fbnic_csr_get_regs_rpc_ram()
103 *(data++) = rd32(fbd, FBNIC_RPC_TCAM_IPDST(i, j)); in fbnic_csr_get_regs_rpc_ram()
109 *(data++) = rd32(fbd, FBNIC_RPC_RSS_TBL(i, j)); in fbnic_csr_get_regs_rpc_ram()
129 *(data++) = rd32(fbd, j); in fbnic_csr_get_regs()
A Dfbnic_mac.c14 u32 val = rd32(fbd, offset); in fbnic_init_readrq()
30 u32 val = rd32(fbd, offset); in fbnic_init_mps()
175 rx_enable = !!(rd32(fbd, FBNIC_RPC_RMI_CONFIG) & in fbnic_mac_init_rxb()
189 rd32(fbd, FBNIC_RXB_PBUF_CFG(i))); in fbnic_mac_init_rxb()
420 rxb_pause_ctrl = rd32(fbd, FBNIC_RXB_PAUSE_DROP_CTRL); in fbnic_mac_tx_pause_config()
431 u32 pcs_intr_mask = rd32(fbd, FBNIC_SIG_PCS_INTR_STS); in fbnic_pcs_get_link_event_asic()
466 pcs_status = rd32(fbd, FBNIC_SIG_PCS_OUT0); in fbnic_mac_get_pcs_link_status()
508 rd32(fbd, FBNIC_SIG_PCS_OUT1)); in fbnic_mac_get_pcs_link_status()
602 mac_ctrl = rd32(fbd, FBNIC_SIG_MAC_IN0); in fbnic_mac_link_down_asic()
621 mac_ctrl = rd32(fbd, FBNIC_SIG_MAC_IN0); in fbnic_mac_link_up_asic()
/drivers/net/ethernet/intel/i40e/
A Di40e_ptp.c163 lo = rd32(hw, I40E_PRTTSYN_EVNT_L(0)); in i40e_ptp_extts0_work()
164 hi = rd32(hw, I40E_PRTTSYN_EVNT_H(0)); in i40e_ptp_extts0_work()
237 rd32(&pf->hw, I40E_PRTTSYN_TXTIME_L); in i40_ptp_reset_timing_events()
238 rd32(&pf->hw, I40E_PRTTSYN_TXTIME_H); in i40_ptp_reset_timing_events()
290 lo = rd32(hw, I40E_PRTTSYN_TIME_L); in i40e_ptp_read()
292 hi = rd32(hw, I40E_PRTTSYN_TIME_H); in i40e_ptp_read()
1255 rd32(hw, I40E_PRTTSYN_STAT_0); in i40e_ptp_set_timestamp_mode()
1256 rd32(hw, I40E_PRTTSYN_TXTIME_H); in i40e_ptp_set_timestamp_mode()
1257 rd32(hw, I40E_PRTTSYN_RXTIME_H(0)); in i40e_ptp_set_timestamp_mode()
1258 rd32(hw, I40E_PRTTSYN_RXTIME_H(1)); in i40e_ptp_set_timestamp_mode()
[all …]
A Di40e_dcb.c24 reg = rd32(hw, I40E_PRTDCB_GENS); in i40e_get_dcbx_status()
1353 reg = rd32(hw, I40E_PRTDCB_RPPMC); in i40e_dcb_hw_rx_cmd_monitor_config()
1391 reg = rd32(hw, I40E_PRTDCB_MFLCN); in i40e_dcb_hw_pfc_config()
1455 reg = rd32(hw, I40E_PRTDCB_RUP); in i40e_dcb_hw_pfc_config()
1460 reg = rd32(hw, I40E_PRTDCB_TDPMC); in i40e_dcb_hw_pfc_config()
1468 reg = rd32(hw, I40E_PRTDCB_TCPMC); in i40e_dcb_hw_pfc_config()
1657 reg = rd32(hw, I40E_PRTRPB_SLW); in i40e_dcb_hw_rx_pb_config()
1692 reg = rd32(hw, I40E_PRTRPB_SHW); in i40e_dcb_hw_rx_pb_config()
1734 reg = rd32(hw, I40E_PRTRPB_SPS); in i40e_dcb_hw_rx_pb_config()
1743 reg = rd32(hw, I40E_PRTRPB_SLW); in i40e_dcb_hw_rx_pb_config()
[all …]
/drivers/net/ethernet/wangxun/txgbe/
A Dtxgbe_aml.c25 status = rd32(wx, WX_GPIO_INTSTATUS); in txgbe_gpio_init_aml()
39 status = rd32(wx, WX_GPIO_INTSTATUS); in txgbe_gpio_irq_handler_aml()
128 status = rd32(wx, TXGBE_CFG_PORT_ST); in txgbe_get_phy_link()
145 gpio = rd32(wx, WX_GPIO_EXT); in txgbe_set_phy_link()
217 gpio = rd32(wx, WX_GPIO_EXT); in txgbe_identify_sfp()
269 wdg = rd32(wx, WX_MAC_WDG_TIMEOUT); in txgbe_reconfig_mac()
270 fc = rd32(wx, WX_MAC_RX_FLOW_CTRL); in txgbe_reconfig_mac()
299 txcfg = rd32(wx, TXGBE_AML_MAC_TX_CFG); in txgbe_mac_link_up_aml()

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