Searched refs:rd_enable (Results 1 – 25 of 33) sorted by relevance
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| /drivers/gpu/drm/msm/disp/dpu1/catalog/ |
| A D | dpu_6_5_qcm2290.h | 112 {.rd_enable = 1, .wr_enable = 1},
113 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_6_3_sm6115.h | 119 {.rd_enable = 1, .wr_enable = 1},
120 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_6_9_sm6375.h | 128 {.rd_enable = 1, .wr_enable = 1},
129 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_1_15_msm8917.h | 150 {.rd_enable = 1, .wr_enable = 1},
151 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_1_14_msm8937.h | 171 {.rd_enable = 1, .wr_enable = 1},
172 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_1_16_msm8953.h | 178 {.rd_enable = 1, .wr_enable = 1},
179 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_5_4_sm6125.h | 189 {.rd_enable = 1, .wr_enable = 1},
190 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_6_2_sc7180.h | 183 {.rd_enable = 1, .wr_enable = 1},
184 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_3_3_sdm630.h | 186 {.rd_enable = 1, .wr_enable = 1},
187 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_6_4_sm6350.h | 199 {.rd_enable = 1, .wr_enable = 1},
200 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_5_3_sm6150.h | 218 {.rd_enable = 1, .wr_enable = 1},
219 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_7_2_sc7280.h | 223 {.rd_enable = 1, .wr_enable = 1},
224 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_3_2_sdm660.h | 246 {.rd_enable = 1, .wr_enable = 1},
247 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_1_7_msm8996.h | 292 {.rd_enable = 1, .wr_enable = 1},
293 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_3_0_msm8998.h | 282 {.rd_enable = 1, .wr_enable = 1},
283 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_5_2_sm7150.h | 277 {.rd_enable = 1, .wr_enable = 1},
278 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_4_0_sdm845.h | 297 {.rd_enable = 1, .wr_enable = 1},
298 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_5_0_sm8150.h | 349 {.rd_enable = 1, .wr_enable = 1},
350 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_6_0_sm8250.h | 348 {.rd_enable = 1, .wr_enable = 1},
349 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_7_0_sm8350.h | 360 {.rd_enable = 1, .wr_enable = 1},
361 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_9_0_sm8550.h | 368 {.rd_enable = 1, .wr_enable = 1},
369 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_9_1_sar2130p.h | 368 {.rd_enable = 0, .wr_enable = 0},
369 {.rd_enable = 0, .wr_enable = 0}
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| A D | dpu_10_0_sm8650.h | 411 {.rd_enable = 1, .wr_enable = 1},
412 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_8_0_sc8280xp.h | 391 {.rd_enable = 1, .wr_enable = 1},
392 {.rd_enable = 1, .wr_enable = 0}
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| A D | dpu_8_1_sm8450.h | 373 {.rd_enable = 1, .wr_enable = 1},
374 {.rd_enable = 1, .wr_enable = 0}
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Completed in 29 milliseconds
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