| /drivers/fpga/ |
| A D | dfl-fme-main.c | 37 v = readq(base + FME_HDR_CAP); in ports_num_show() 57 v = readq(base + FME_HDR_BITSTREAM_ID); in bitstream_id_show() 76 v = readq(base + FME_HDR_BITSTREAM_MD); in bitstream_metadata_show() 91 v = readq(base + FME_HDR_CAP); in cache_size_show() 107 v = readq(base + FME_HDR_CAP); in fabric_version_show() 123 v = readq(base + FME_HDR_CAP); in socket_id_show() 214 u64 v = readq(base + FME_THERM_CAP); in fme_thermal_throttle_support() 391 v = readq(feature->ioaddr + FME_PWR_STATUS); in power_hwmon_read() 395 v = readq(feature->ioaddr + FME_PWR_THRESHOLD); in power_hwmon_read() 399 v = readq(feature->ioaddr + FME_PWR_THRESHOLD); in power_hwmon_read() [all …]
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| A D | dfl-fme-mgr.c | 97 pr_status = readq(fme_pr + FME_PR_STS); in fme_mgr_pr_error_handle() 101 pr_error = readq(fme_pr + FME_PR_ERR); in fme_mgr_pr_error_handle() 123 pr_ctrl = readq(fme_pr + FME_PR_CTRL); in fme_mgr_write_init() 134 pr_ctrl = readq(fme_pr + FME_PR_CTRL); in fme_mgr_write_init() 157 pr_ctrl = readq(fme_pr + FME_PR_CTRL); in fme_mgr_write_init() 176 pr_ctrl = readq(fme_pr + FME_PR_CTRL); in fme_mgr_write() 188 pr_status = readq(fme_pr + FME_PR_STS); in fme_mgr_write() 199 pr_status = readq(fme_pr + FME_PR_STS); in fme_mgr_write() 228 pr_ctrl = readq(fme_pr + FME_PR_CTRL); in fme_mgr_write_complete() 272 id->id_l = readq(fme_pr + FME_PR_INTFC_ID_L); in fme_mgr_get_compat_id() [all …]
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| A D | dfl-fme-error.c | 52 value = readq(base + PCIE0_ERROR); in pcie0_errors_show() 75 v = readq(base + PCIE0_ERROR); in pcie0_errors_store() 97 value = readq(base + PCIE1_ERROR); in pcie1_errors_show() 120 v = readq(base + PCIE1_ERROR); in pcie1_errors_store() 141 (unsigned long long)readq(base + RAS_NONFAT_ERROR)); in nonfatal_errors_show() 168 v = readq(base + RAS_ERROR_INJECT); in inject_errors_show() 193 v = readq(base + RAS_ERROR_INJECT); in inject_errors_store() 213 value = readq(base + FME_ERROR); in fme_errors_show() 236 v = readq(base + FME_ERROR); in fme_errors_store() 260 value = readq(base + FME_FIRST_ERROR); in first_error_show() [all …]
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| A D | dfl-afu-error.c | 75 v = readq(base_hdr + PORT_HDR_STS); in afu_port_err_clear() 90 v = readq(base_err + PORT_ERROR); in afu_port_err_clear() 95 v = readq(base_err + PORT_FIRST_ERROR); in afu_port_err_clear() 124 error = readq(base + PORT_ERROR); in errors_show() 155 error = readq(base + PORT_FIRST_ERROR); in first_error_show() 173 req0 = readq(base + PORT_MALFORMED_REQ0); in first_malformed_req_show() 174 req1 = readq(base + PORT_MALFORMED_REQ1); in first_malformed_req_show()
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| A D | dfl-afu-main.c | 51 v = readq(base + PORT_HDR_CTRL); in __afu_port_enable() 89 v = readq(base + PORT_HDR_CTRL); in __afu_port_disable() 173 v = readq(base + PORT_HDR_CTRL); in ltr_show() 194 v = readq(base + PORT_HDR_CTRL); in ltr_store() 214 v = readq(base + PORT_HDR_STS); in ap1_event_show() 252 v = readq(base + PORT_HDR_STS); in ap2_event_show() 289 v = readq(base + PORT_HDR_STS); in power_state_show() 349 userclk_freqsts = readq(base + PORT_HDR_USRCLK_STS0); in userclk_freqsts_show() 367 userclk_freqcntrsts = readq(base + PORT_HDR_USRCLK_STS1); in userclk_freqcntrsts_show() 474 guidl = readq(base + GUID_L); in afu_id_show() [all …]
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| /drivers/net/ethernet/mellanox/mlxbf_gige/ |
| A D | mlxbf_gige_rx.c | 19 data = readq(base + MLXBF_GIGE_RX_MAC_FILTER_GENERAL); in mlxbf_gige_enable_multicast_rx() 29 data = readq(base + MLXBF_GIGE_RX_MAC_FILTER_GENERAL); in mlxbf_gige_disable_multicast_rx() 41 control = readq(base + MLXBF_GIGE_CONTROL); in mlxbf_gige_enable_mac_rx_filter() 53 control = readq(base + MLXBF_GIGE_CONTROL); in mlxbf_gige_disable_mac_rx_filter() 74 *dmac = readq(base + MLXBF_GIGE_RX_MAC_FILTER + in mlxbf_gige_get_mac_rx_filter() 85 control = readq(base + MLXBF_GIGE_CONTROL); in mlxbf_gige_enable_promisc() 103 control = readq(base + MLXBF_GIGE_CONTROL); in mlxbf_gige_disable_promisc() 173 data = readq(priv->base + MLXBF_GIGE_RX); in mlxbf_gige_rx_init() 189 data = readq(priv->base + MLXBF_GIGE_INT_MASK); in mlxbf_gige_rx_init() 194 data = readq(priv->base + MLXBF_GIGE_RX_DMA); in mlxbf_gige_rx_init() [all …]
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| A D | mlxbf_gige_main.c | 96 p->rx_din_dropped_pkts += readq(priv->base + in mlxbf_gige_cache_stats() 98 p->rx_filter_passed_pkts += readq(priv->base + in mlxbf_gige_cache_stats() 100 p->rx_filter_discard_pkts += readq(priv->base + in mlxbf_gige_cache_stats() 111 control = readq(priv->base + MLXBF_GIGE_CONTROL); in mlxbf_gige_clean_port() 123 control = readq(priv->base + MLXBF_GIGE_CONTROL); in mlxbf_gige_clean_port() 139 control = readq(priv->base + MLXBF_GIGE_CONTROL); in mlxbf_gige_open() 271 readq(priv->base + MLXBF_GIGE_RX_DIN_DROP_COUNTER); in mlxbf_gige_get_stats64() 425 priv->hw_version = readq(base + MLXBF_GIGE_VERSION); in mlxbf_gige_probe()
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| /drivers/char/hw_random/ |
| A D | cn10k-rng.c | 87 status = readq(rng->reg_base + RNM_PF_EBG_HEALTH); in check_rng_health() 110 *value = readq(rng->reg_base + RNM_PF_TRNG_DAT); in cn10k_read_trng() 113 status = readq(rng->reg_base + RNM_PF_TRNG_RES); in cn10k_read_trng() 119 *value = readq(rng->reg_base + RNM_PF_RANDOM); in cn10k_read_trng() 125 upper = readq(rng->reg_base + RNM_PF_RANDOM); in cn10k_read_trng() 126 lower = readq(rng->reg_base + RNM_PF_RANDOM); in cn10k_read_trng() 128 upper = readq(rng->reg_base + RNM_PF_RANDOM); in cn10k_read_trng() 130 lower = readq(rng->reg_base + RNM_PF_RANDOM); in cn10k_read_trng()
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| /drivers/gpio/ |
| A D | gpio-mlxbf.c | 95 gs->csave_regs.scratchpad = readq(gs->base + MLXBF_GPIO_SCRATCHPAD); in mlxbf_gpio_suspend() 97 readq(gs->base + MLXBF_GPIO_PAD_CONTROL_FIRST_WORD); in mlxbf_gpio_suspend() 99 readq(gs->base + MLXBF_GPIO_PAD_CONTROL_1_FIRST_WORD); in mlxbf_gpio_suspend() 101 readq(gs->base + MLXBF_GPIO_PAD_CONTROL_2_FIRST_WORD); in mlxbf_gpio_suspend() 103 readq(gs->base + MLXBF_GPIO_PAD_CONTROL_3_FIRST_WORD); in mlxbf_gpio_suspend() 104 gs->csave_regs.pin_dir_i = readq(gs->base + MLXBF_GPIO_PIN_DIR_I); in mlxbf_gpio_suspend() 105 gs->csave_regs.pin_dir_o = readq(gs->base + MLXBF_GPIO_PIN_DIR_O); in mlxbf_gpio_suspend()
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| /drivers/net/ethernet/marvell/octeontx2/af/ |
| A D | ptp.c | 130 ptp_clock_hi = readq(ptp->reg_base + PTP_CLOCK_HI); in ptp_reset_thresh() 160 nsec = readq(ptp->reg_base + PTP_CLOCK_HI); in read_ptp_tstmp_sec_nsec() 164 nsec = readq(ptp->reg_base + PTP_CLOCK_HI); in read_ptp_tstmp_sec_nsec() 174 return readq(ptp->reg_base + PTP_CLOCK_HI); in read_ptp_tstmp_nsec() 269 regval = readq(ptp->reg_base + PTP_CLOCK_CFG); in ptp_atomic_update() 305 regval = readq(ptp->reg_base + PTP_CLOCK_CFG); in ptp_atomic_adjtime() 398 clock_cfg = readq(ptp->reg_base + PTP_CLOCK_CFG); in ptp_start() 416 clock_cfg = readq(ptp->reg_base + PTP_CLOCK_CFG); in ptp_start() 438 *clk = readq(ptp->reg_base + PTP_TIMESTAMP); in ptp_get_tstmp() 471 clock_cfg = readq(ptp->reg_base + PTP_CLOCK_CFG); in ptp_pps_on() [all …]
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| /drivers/net/ethernet/netronome/nfp/ |
| A D | nfp_net_repr.c | 65 stats->tx_bytes = readq(mem + NFP_MAC_STATS_TX_OUT_OCTETS); in nfp_repr_phy_port_get_stats64() 66 stats->tx_dropped = readq(mem + NFP_MAC_STATS_TX_OUT_ERRORS); in nfp_repr_phy_port_get_stats64() 68 stats->rx_packets = readq(mem + NFP_MAC_STATS_RX_FRAMES_RECEIVED_OK); in nfp_repr_phy_port_get_stats64() 69 stats->rx_bytes = readq(mem + NFP_MAC_STATS_RX_IN_OCTETS); in nfp_repr_phy_port_get_stats64() 70 stats->rx_dropped = readq(mem + NFP_MAC_STATS_RX_IN_ERRORS); in nfp_repr_phy_port_get_stats64() 80 stats->tx_packets = readq(port->vnic + NFP_NET_CFG_STATS_RX_FRAMES); in nfp_repr_vnic_get_stats64() 81 stats->tx_bytes = readq(port->vnic + NFP_NET_CFG_STATS_RX_OCTETS); in nfp_repr_vnic_get_stats64() 82 stats->tx_dropped = readq(port->vnic + NFP_NET_CFG_STATS_RX_DISCARDS); in nfp_repr_vnic_get_stats64() 84 stats->rx_packets = readq(port->vnic + NFP_NET_CFG_STATS_TX_FRAMES); in nfp_repr_vnic_get_stats64() 85 stats->rx_bytes = readq(port->vnic + NFP_NET_CFG_STATS_TX_OCTETS); in nfp_repr_vnic_get_stats64() [all …]
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| /drivers/crypto/marvell/octeontx/ |
| A D | otx_cptvf_main.c | 349 vqx_ctl.u = readq(cptvf->reg_base + OTX_CPT_VQX_CTL(0)); in cptvf_write_vq_ctl() 358 vqx_dbell.u = readq(cptvf->reg_base + OTX_CPT_VQX_DOORBELL(0)); in otx_cptvf_write_vq_doorbell() 367 vqx_inprg.u = readq(cptvf->reg_base + OTX_CPT_VQX_INPROG(0)); in cptvf_write_vq_inprog() 376 vqx_dwait.u = readq(cptvf->reg_base + OTX_CPT_VQX_DONE_WAIT(0)); in cptvf_write_vq_done_numwait() 385 vqx_dwait.u = readq(cptvf->reg_base + OTX_CPT_VQX_DONE_WAIT(0)); in cptvf_read_vq_done_numwait() 393 vqx_dwait.u = readq(cptvf->reg_base + OTX_CPT_VQX_DONE_WAIT(0)); in cptvf_write_vq_done_timewait() 403 vqx_dwait.u = readq(cptvf->reg_base + OTX_CPT_VQX_DONE_WAIT(0)); in cptvf_read_vq_done_timewait() 441 vqx_misc_int.u = readq(cptvf->reg_base + OTX_CPT_VQX_MISC_INT(0)); in cptvf_clear_dovf_intr() 451 vqx_misc_int.u = readq(cptvf->reg_base + OTX_CPT_VQX_MISC_INT(0)); in cptvf_clear_irde_intr() 489 return readq(cptvf->reg_base + OTX_CPT_VQX_MISC_INT(0)); in cptvf_read_vf_misc_intr_status() [all …]
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| A D | otx_cptpf_mbox.c | 117 pf_qx_ctl.u = readq(cpt->reg_base + OTX_CPT_PF_QX_CTL(vf)); in otx_cpt_cfg_qlen_for_vf() 130 pf_qx_ctl.u = readq(cpt->reg_base + OTX_CPT_PF_QX_CTL(vf)); in otx_cpt_cfg_vq_priority() 160 pf_qx_ctl.u = readq(cpt->reg_base + OTX_CPT_PF_QX_CTL(q)); in otx_cpt_bind_vq_to_grp() 187 mbx.msg = readq(cpt->reg_base + OTX_CPT_PF_VFX_MBOXX(vf, 0)); in otx_cpt_handle_mbox_intr() 188 mbx.data = readq(cpt->reg_base + OTX_CPT_PF_VFX_MBOXX(vf, 1)); in otx_cpt_handle_mbox_intr() 245 intr = readq(cpt->reg_base + OTX_CPT_PF_MBOX_INTX(0)); in otx_cpt_mbox_intr_handler()
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| /drivers/edac/ |
| A D | thunderx_edac.c | 322 u64 lmc_int = readq(lmc->regs + LMC_INT); in thunderx_lmc_int_read() 349 readq(lmc->regs + LMC_CHAR_MASK0); in inject_ecc_fn() 350 readq(lmc->regs + LMC_CHAR_MASK2); in inject_ecc_fn() 351 readq(lmc->regs + LMC_ECC_PARITY_TEST); in inject_ecc_fn() 551 ctx->reg_int = readq(lmc->regs + LMC_INT); in thunderx_lmc_err_isr() 552 ctx->reg_fadr = readq(lmc->regs + LMC_FADR); in thunderx_lmc_err_isr() 696 lmc_config = readq(lmc->regs + LMC_CONFIG); in thunderx_lmc_probe() 771 lmc_int = readq(lmc->regs + LMC_INT); in thunderx_lmc_probe() 1084 readq(ocx->regs + OCX_LNE_INT(lane)); in thunderx_ocx_com_isr() 1441 reg = readq(ocx->regs + OCX_LNE_INT(i)); in thunderx_ocx_probe() [all …]
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| /drivers/net/ethernet/neterion/ |
| A D | s2io.c | 1014 val64 = readq(&bar0->pci_mode); in s2io_verify_pci_mode() 1050 val64 = readq(&bar0->pci_mode); in s2io_print_pci_mode() 1240 val64 = readq(&bar0->mac_cfg); in init_nic() 1733 val64 = readq(&bar0->mac_cfg); in init_nic() 1739 val64 = readq(&bar0->mac_cfg); in init_nic() 1743 val64 = readq(&bar0->mac_cfg); in init_nic() 1842 temp64 = readq(addr); in do_s2io_write_bits() 3348 val64 = readq(addr); in wait_for_cmd_complete() 3781 readq(&bar0->rx_mat); in s2io_enable_msi_x() 4343 val64 = readq(addr); in do_s2io_chk_alarm_bit() [all …]
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| /drivers/bluetooth/ |
| A D | hci_vhci.c | 38 struct sk_buff_head readq; member 60 skb_queue_purge(&data->readq); in vhci_close_dev() 69 skb_queue_purge(&data->readq); in vhci_flush() 80 skb_queue_tail(&data->readq, skb); in vhci_send_frame() 459 skb_queue_head(&data->readq, skb); in __vhci_create_device() 579 skb = skb_dequeue(&data->readq); in vhci_read() 583 skb_queue_head(&data->readq, skb); in vhci_read() 595 !skb_queue_empty(&data->readq)); in vhci_read() 617 if (!skb_queue_empty(&data->readq)) in vhci_poll() 639 skb_queue_head_init(&data->readq); in vhci_open() [all …]
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| /drivers/char/ |
| A D | hpet.c | 58 #define read_counter(MC) readq(MC) 413 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { in hpet_release() 416 v = readq(&timer->hpet_config); in hpet_release() 498 v = readq(&timer->hpet_config); in hpet_ioctl_ieon() 581 v = readq(&timer->hpet_config); in hpet_ioctl_common() 603 v = readq(&timer->hpet_config); in hpet_ioctl_common() 611 v = readq(&timer->hpet_config); in hpet_ioctl_common() 617 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { in hpet_ioctl_common() 618 v = readq(&timer->hpet_config); in hpet_ioctl_common() 843 cap = readq(&hpet->hpet_cap); in hpet_alloc() [all …]
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| /drivers/thermal/intel/int340x_thermal/ |
| A D | processor_thermal_power_floor.c | 42 status = readq(proc_priv->mmio_base + SOC_WT_RES_INT_STATUS_OFFSET); in proc_thermal_read_power_floor_status() 94 int_status = readq(proc_priv->mmio_base + SOC_WT_RES_INT_STATUS_OFFSET); in proc_thermal_check_power_floor_intr() 117 status = readq(proc_priv->mmio_base + SOC_WT_RES_INT_STATUS_OFFSET); in proc_thermal_power_floor_intr_callback()
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| /drivers/mmc/host/ |
| A D | cavium.c | 169 emm_switch = readq(host->base + MIO_EMM_SWITCH(host)); in check_switch_errors() 219 rsp_sts = readq(host->base + MIO_EMM_RSP_STS(host)); in do_switch() 255 emm_switch = readq(slot->host->base + MIO_EMM_SWITCH(host)); in cvm_mmc_reset_bus() 260 wdog = readq(slot->host->base + MIO_EMM_WDOG(host)); in cvm_mmc_reset_bus() 317 dat = readq(host->base + MIO_EMM_BUF_DAT(host)); in do_read() 348 rsp_lo = readq(host->base + MIO_EMM_RSP_LO(host)); in set_cmd_response() 361 rsp_hi = readq(host->base + MIO_EMM_RSP_HI(host)); in set_cmd_response() 428 emm_dma = readq(host->base + MIO_EMM_DMA(host)); in cleanup_dma() 448 emm_int = readq(host->base + MIO_EMM_INT(host)); in cvm_mmc_interrupt() 458 rsp_sts = readq(host->base + MIO_EMM_RSP_STS(host)); in cvm_mmc_interrupt() [all …]
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| /drivers/spi/ |
| A D | spi-altera-dfl.c | 59 while ((readq(base + INDIRECT_ADDR) & INDIRECT_RD) && in indirect_bus_reg_read() 68 v = readq(base + INDIRECT_RD_DATA); in indirect_bus_reg_read() 85 while ((readq(base + INDIRECT_ADDR) & INDIRECT_WR) && in indirect_bus_reg_write() 111 v = readq(base + SPI_CORE_PARAMETER); in config_spi_host()
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| /drivers/platform/x86/intel/uncore-frequency/ |
| A D | uncore-frequency-tpmi.c | 94 control = readq(cluster_info->cluster_base + UNCORE_CONTROL_INDEX); in read_control_freq() 114 ctrl = readq(cluster_info->cluster_base + UNCORE_CONTROL_INDEX); in read_eff_lat_ctrl() 231 control = readq(cluster_info->cluster_base + UNCORE_CONTROL_INDEX); in write_eff_lat_ctrl() 273 control = readq(cluster_info->cluster_base + UNCORE_CONTROL_INDEX); in write_control_freq() 347 status = readq((u8 __iomem *)cluster_info->cluster_base + UNCORE_STATUS_INDEX); in uncore_read_freq() 368 status = readq((u8 __iomem *)cluster_info->cluster_base + UNCORE_STATUS_INDEX); in uncore_set_agent_type() 550 header = readq(pd_info->uncore_base); in uncore_probe() 588 cluster_offset = readq(pd_info->uncore_base + in uncore_probe()
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| /drivers/net/ethernet/cavium/common/ |
| A D | cavium_ptp.c | 48 ret = CLOCK_BASE_RATE * ((readq(base + RST_BOOT) >> 33) & 0x3f); in ptp_cavium_clock_get() 217 return readq(clock->reg_base + PTP_CLOCK_HI); in cavium_ptp_cc_read() 274 clock_cfg = readq(clock->reg_base + PTP_CLOCK_CFG); in cavium_ptp_probe() 291 clock_cfg = readq(clock->reg_base + PTP_CLOCK_CFG); in cavium_ptp_probe() 320 clock_cfg = readq(clock->reg_base + PTP_CLOCK_CFG); in cavium_ptp_remove()
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| /drivers/rpmsg/ |
| A D | rpmsg_char.c | 71 wait_queue_head_t readq; member 92 wake_up_interruptible(&eptdev->readq); in rpmsg_chrdev_eptdev_destroy() 118 wake_up_interruptible(&eptdev->readq); in rpmsg_ept_cb() 130 wake_up_interruptible(&eptdev->readq); in rpmsg_ept_flow_cb() 223 if (wait_event_interruptible(eptdev->readq, in rpmsg_eptdev_read_iter() 301 poll_wait(filp, &eptdev->readq, wait); in rpmsg_eptdev_poll() 423 init_waitqueue_head(&eptdev->readq); in rpmsg_chrdev_eptdev_alloc()
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| /drivers/net/ethernet/marvell/octeon_ep/ |
| A D | octep_ctrl_mbox.c | 86 magic_num = readq(OCTEP_CTRL_MBOX_INFO_MAGIC_NUM(mbox->barmem)); in octep_ctrl_mbox_init() 92 status = readq(OCTEP_CTRL_MBOX_INFO_FW_STATUS(mbox->barmem)); in octep_ctrl_mbox_init() 98 fw_versions = readq(OCTEP_CTRL_MBOX_INFO_FW_VERSION(mbox->barmem)); in octep_ctrl_mbox_init() 170 if (readq(OCTEP_CTRL_MBOX_INFO_FW_STATUS(mbox->barmem)) != OCTEP_CTRL_MBOX_STATUS_READY) in octep_ctrl_mbox_send() 232 if (readq(OCTEP_CTRL_MBOX_INFO_FW_STATUS(mbox->barmem)) != OCTEP_CTRL_MBOX_STATUS_READY) in octep_ctrl_mbox_recv()
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| /drivers/platform/x86/intel/speed_select_if/ |
| A D | isst_tpmi_core.c | 347 *((u64 *)&pd_info->feature_offsets) = readq(pd_info->sst_base + in sst_add_perf_profiles() 351 perf_level_offsets = readq(pd_info->sst_base + pd_info->sst_header.pp_offset + in sst_add_perf_profiles() 372 *((u64 *)&pd_info->sst_header) = readq(pd_info->sst_base); in sst_main() 569 val = readq(power_domain_info->sst_base + power_domain_info->sst_header.cp_offset +\ 581 val = readq(power_domain_info->sst_base +\ 759 val = readq(power_domain_info->sst_base + in isst_if_clos_assoc() 809 val = readq(power_domain_info->sst_base +\ 822 val = readq(power_domain_info->sst_base +\ 1002 val = readq(power_domain_info->sst_base +\ 1734 power_domain_info->saved_sst_cp_control = readq(cp_base + SST_CP_CONTROL_OFFSET); in tpmi_sst_dev_suspend() [all …]
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