| /drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| A D | display_rq_dlg_calc_32.c | 220 double refcyc_per_req_delivery_pre_l; in dml32_rq_dlg_get_dlg_reg() local
408 …refcyc_per_req_delivery_pre_l = get_refcyc_per_req_delivery_pre_l_in_us(mode_lib, e2e_pipe_param, … in dml32_rq_dlg_get_dlg_reg()
412 …t("DML_DLG: %s: refcyc_per_req_delivery_pre_l = %3.2f\n", __func__, refcyc_per_req_delivery_pre_l); in dml32_rq_dlg_get_dlg_reg()
532 …ttu_regs->refcyc_per_req_delivery_pre_l = (unsigned int) (refcyc_per_req_delivery_pre_l * dml_pow(… in dml32_rq_dlg_get_dlg_reg()
555 ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13)); in dml32_rq_dlg_get_dlg_reg()
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| /drivers/gpu/drm/amd/display/dc/dml2/ |
| A D | dml_display_rq_dlg_calc.c | 241 dml_float_t refcyc_per_req_delivery_pre_l; in dml_rq_dlg_get_dlg_reg() local
386 …refcyc_per_req_delivery_pre_l = dml_get_refcyc_per_req_delivery_pre_l_in_us(mode_lib, pipe_idx) * … in dml_rq_dlg_get_dlg_reg()
389 …t("DML_DLG: %s: refcyc_per_req_delivery_pre_l = %3.2f\n", __func__, refcyc_per_req_delivery_pre_l); in dml_rq_dlg_get_dlg_reg()
482 …disp_ttu_regs->refcyc_per_req_delivery_pre_l = (dml_uint_t)(refcyc_per_req_delivery_pre_l * dml_… in dml_rq_dlg_get_dlg_reg()
504 ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13)); in dml_rq_dlg_get_dlg_reg()
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| A D | dml2_translation_helper.c | 1513 out->ttu_regs.refcyc_per_req_delivery_pre_l = disp_ttu_regs->refcyc_per_req_delivery_pre_l; in dml2_update_pipe_ctx_dchub_regs()
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| A D | display_mode_util.c | 308 dml_print("DML: refcyc_per_req_delivery_pre_l = 0x%x\n", ttu_regs->refcyc_per_req_delivery_pre_l); in dml_print_ttu_regs_st()
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| A D | display_mode_core_structs.h | 1989 dml_uint_t refcyc_per_req_delivery_pre_l; member
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| /drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| A D | display_rq_dlg_calc_20.c | 896 double refcyc_per_req_delivery_pre_l; in dml20_rq_dlg_get_dlg_params() local
1181 refcyc_per_req_delivery_pre_l = 0.; in dml20_rq_dlg_get_dlg_params()
1276 refcyc_per_req_delivery_pre_l = get_refcyc_per_delivery(mode_lib, in dml20_rq_dlg_get_dlg_params()
1299 refcyc_per_req_delivery_pre_l); in dml20_rq_dlg_get_dlg_params()
1304 ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13)); in dml20_rq_dlg_get_dlg_params()
1492 disp_ttu_regs->refcyc_per_req_delivery_pre_l = (unsigned int) (refcyc_per_req_delivery_pre_l in dml20_rq_dlg_get_dlg_params()
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| A D | display_rq_dlg_calc_20v2.c | 896 double refcyc_per_req_delivery_pre_l; in dml20v2_rq_dlg_get_dlg_params() local
1182 refcyc_per_req_delivery_pre_l = 0.; in dml20v2_rq_dlg_get_dlg_params()
1277 refcyc_per_req_delivery_pre_l = get_refcyc_per_delivery(mode_lib, in dml20v2_rq_dlg_get_dlg_params()
1300 refcyc_per_req_delivery_pre_l); in dml20v2_rq_dlg_get_dlg_params()
1305 ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13)); in dml20v2_rq_dlg_get_dlg_params()
1493 disp_ttu_regs->refcyc_per_req_delivery_pre_l = (unsigned int) (refcyc_per_req_delivery_pre_l in dml20v2_rq_dlg_get_dlg_params()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| A D | display_rq_dlg_calc_21.c | 942 double refcyc_per_req_delivery_pre_l; in dml_rq_dlg_get_dlg_params() local
1233 refcyc_per_req_delivery_pre_l = 0.; in dml_rq_dlg_get_dlg_params()
1336 refcyc_per_req_delivery_pre_l = get_refcyc_per_delivery( in dml_rq_dlg_get_dlg_params()
1362 refcyc_per_req_delivery_pre_l); in dml_rq_dlg_get_dlg_params()
1368 ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13)); in dml_rq_dlg_get_dlg_params()
1600 disp_ttu_regs->refcyc_per_req_delivery_pre_l = (unsigned int) (refcyc_per_req_delivery_pre_l in dml_rq_dlg_get_dlg_params()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| A D | display_rq_dlg_calc_30.c | 1008 double refcyc_per_req_delivery_pre_l = 0; in dml_rq_dlg_get_dlg_params() local
1337 refcyc_per_req_delivery_pre_l = 0.; in dml_rq_dlg_get_dlg_params()
1447 refcyc_per_req_delivery_pre_l = get_refcyc_per_delivery(mode_lib, in dml_rq_dlg_get_dlg_params()
1470 refcyc_per_req_delivery_pre_l); in dml_rq_dlg_get_dlg_params()
1475 ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13)); in dml_rq_dlg_get_dlg_params()
1689 disp_ttu_regs->refcyc_per_req_delivery_pre_l = (unsigned int)(refcyc_per_req_delivery_pre_l in dml_rq_dlg_get_dlg_params()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| A D | display_rq_dlg_calc_31.c | 942 double refcyc_per_req_delivery_pre_l; in dml_rq_dlg_get_dlg_params() local
1182 refcyc_per_req_delivery_pre_l = 0.; in dml_rq_dlg_get_dlg_params()
1286 refcyc_per_req_delivery_pre_l = get_refcyc_per_delivery( in dml_rq_dlg_get_dlg_params()
1310 …t("DML_DLG: %s: refcyc_per_req_delivery_pre_l = %3.2f\n", __func__, refcyc_per_req_delivery_pre_l); in dml_rq_dlg_get_dlg_params()
1318 …ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13)); ASSERT(refcyc_per_req_delivery_l < dml_pow… in dml_rq_dlg_get_dlg_params()
1513 …disp_ttu_regs->refcyc_per_req_delivery_pre_l = (unsigned int) (refcyc_per_req_delivery_pre_l * dml… in dml_rq_dlg_get_dlg_params()
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| /drivers/gpu/drm/amd/display/dc/dml/ |
| A D | dml1_display_rq_dlg_calc.c | 1117 double refcyc_per_req_delivery_pre_l; in dml1_rq_dlg_get_dlg_params() local
1635 refcyc_per_req_delivery_pre_l = 0.; in dml1_rq_dlg_get_dlg_params()
1742 refcyc_per_req_delivery_pre_l = get_refcyc_per_delivery( in dml1_rq_dlg_get_dlg_params()
1764 refcyc_per_req_delivery_pre_l); in dml1_rq_dlg_get_dlg_params()
1770 disp_ttu_regs->refcyc_per_req_delivery_pre_l = (unsigned int) (refcyc_per_req_delivery_pre_l in dml1_rq_dlg_get_dlg_params()
1775 ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13)); in dml1_rq_dlg_get_dlg_params()
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| A D | display_rq_dlg_helpers.c | 335 ttu_regs->refcyc_per_req_delivery_pre_l); in print__ttu_regs_st()
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| A D | display_mode_structs.h | 684 unsigned int refcyc_per_req_delivery_pre_l; member
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| /drivers/gpu/drm/amd/display/dc/hubp/dcn21/ |
| A D | dcn21_hubp.c | 510 REFCYC_PER_REQ_DELIVERY_PRE, &ttu_attr.refcyc_per_req_delivery_pre_l); in hubp21_validate_dml_output()
550 if (ttu_attr.refcyc_per_req_delivery_pre_l != dml_ttu_attr->refcyc_per_req_delivery_pre_l) in hubp21_validate_dml_output()
552 dml_ttu_attr->refcyc_per_req_delivery_pre_l, ttu_attr.refcyc_per_req_delivery_pre_l); in hubp21_validate_dml_output()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| A D | display_rq_dlg_calc_314.c | 1027 double refcyc_per_req_delivery_pre_l; in dml_rq_dlg_get_dlg_params() local
1270 refcyc_per_req_delivery_pre_l = 0.; in dml_rq_dlg_get_dlg_params()
1374 refcyc_per_req_delivery_pre_l = get_refcyc_per_delivery( in dml_rq_dlg_get_dlg_params()
1398 …t("DML_DLG: %s: refcyc_per_req_delivery_pre_l = %3.2f\n", __func__, refcyc_per_req_delivery_pre_l); in dml_rq_dlg_get_dlg_params()
1406 …ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13)); ASSERT(refcyc_per_req_delivery_l < dml_pow… in dml_rq_dlg_get_dlg_params()
1601 …disp_ttu_regs->refcyc_per_req_delivery_pre_l = (unsigned int) (refcyc_per_req_delivery_pre_l * dml… in dml_rq_dlg_get_dlg_params()
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| /drivers/gpu/drm/amd/display/dc/hubp/dcn20/ |
| A D | dcn20_hubp.c | 283 ttu_attr->refcyc_per_req_delivery_pre_l); in hubp2_setup_interdependent()
1260 &ttu_attr->refcyc_per_req_delivery_pre_l); in hubp2_read_state_common()
1619 REFCYC_PER_REQ_DELIVERY_PRE, &ttu_attr.refcyc_per_req_delivery_pre_l); in hubp2_validate_dml_output()
1659 if (ttu_attr.refcyc_per_req_delivery_pre_l != dml_ttu_attr->refcyc_per_req_delivery_pre_l) in hubp2_validate_dml_output()
1661 dml_ttu_attr->refcyc_per_req_delivery_pre_l, ttu_attr.refcyc_per_req_delivery_pre_l); in hubp2_validate_dml_output()
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| /drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/ |
| A D | dml_top_dchub_registers.h | 70 uint32_t refcyc_per_req_delivery_pre_l; member
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| /drivers/gpu/drm/amd/display/dc/hubp/dcn401/ |
| A D | dcn401_hubp.c | 359 pipe_regs->ttu_regs.refcyc_per_req_delivery_pre_l); in hubp401_setup_interdependent()
915 &ttu_attr->refcyc_per_req_delivery_pre_l); in hubp401_read_state()
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| /drivers/gpu/drm/amd/display/dc/hubp/dcn10/ |
| A D | dcn10_hubp.c | 739 ttu_attr->refcyc_per_req_delivery_pre_l); in hubp1_setup_interdependent()
1029 &ttu_attr->refcyc_per_req_delivery_pre_l); in hubp1_read_state_common()
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| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| A D | dcn10_hw_sequencer_debug.c | 313 …ttu_regs->qos_level_flip, ttu_regs->refcyc_per_req_delivery_pre_l, ttu_regs->refcyc_per_req_delive… in dcn10_get_ttu_states()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| A D | dcn401_hwseq.c | 2585 || (old_ttu_regs.refcyc_per_req_delivery_pre_l != new_ttu_regs->refcyc_per_req_delivery_pre_l) in dcn401_detect_pipe_changes()
2603 old_ttu_regs.refcyc_per_req_delivery_pre_l = new_ttu_regs->refcyc_per_req_delivery_pre_l; in dcn401_detect_pipe_changes()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| A D | dcn20_hwseq.c | 1629 old_ttu_attr.refcyc_per_req_delivery_pre_l != new_ttu_attr->refcyc_per_req_delivery_pre_l || in dcn20_detect_pipe_changes()
1647 old_ttu_attr.refcyc_per_req_delivery_pre_l = new_ttu_attr->refcyc_per_req_delivery_pre_l; in dcn20_detect_pipe_changes()
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| /drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| A D | dml2_core_shared_types.h | 1614 double refcyc_per_req_delivery_pre_l; member
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| A D | dml2_core_dcn4_calcs.c | 12501 …l->refcyc_per_req_delivery_pre_l = mode_lib->mp.DisplayPipeRequestDeliveryTimeLumaPrefetch[mode_li… in rq_dlg_get_dlg_reg()
12504 …DML_DLG: %s: refcyc_per_req_delivery_pre_l = %3.2f\n", __func__, l->refcyc_per_req_delivery_pre_l); in rq_dlg_get_dlg_reg()
12590 …disp_ttu_regs->refcyc_per_req_delivery_pre_l = (unsigned int)(l->refcyc_per_req_delivery_pre_l * m… in rq_dlg_get_dlg_reg()
12606 DML_ASSERT(l->refcyc_per_req_delivery_pre_l < math_pow(2, 13)); in rq_dlg_get_dlg_reg()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| A D | dcn10_hwseq.c | 428 …ttu_regs->qos_level_flip, ttu_regs->refcyc_per_req_delivery_pre_l, ttu_regs->refcyc_per_req_delive… in dcn10_log_hubp_states()
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