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Searched refs:reg0 (Results 1 – 25 of 61) sorted by relevance

123

/drivers/media/dvb-frontends/
A Da8293.c29 u8 reg0, reg1; in a8293_set_voltage_slew() local
106 reg0 |= A8293_FLAG_ODT; in a8293_set_voltage_slew()
111 dev->reg[0] = reg0; in a8293_set_voltage_slew()
117 reg0 |= A8293_FLAG_ODT; in a8293_set_voltage_slew()
121 dev->reg[0] = reg0; in a8293_set_voltage_slew()
148 u8 reg0, reg1; in a8293_set_voltage_noslew() local
156 reg0 = 0x10; in a8293_set_voltage_noslew()
160 reg0 = 0x31; in a8293_set_voltage_noslew()
164 reg0 = 0x38; in a8293_set_voltage_noslew()
170 if (reg0 != dev->reg[0]) { in a8293_set_voltage_noslew()
[all …]
A Dves1820.c30 u8 reg0; member
84 reg0 |= state->reg0 & 0x62; in ves1820_setup_reg0()
87 if (!state->config->invert) reg0 |= 0x20; in ves1820_setup_reg0()
88 else reg0 &= ~0x20; in ves1820_setup_reg0()
90 if (!state->config->invert) reg0 &= ~0x20; in ves1820_setup_reg0()
91 else reg0 |= 0x20; in ves1820_setup_reg0()
94 ves1820_writereg(state, 0x00, reg0 & 0xfe); in ves1820_setup_reg0()
95 ves1820_writereg(state, 0x00, reg0 | 0x01); in ves1820_setup_reg0()
97 state->reg0 = reg0; in ves1820_setup_reg0()
324 p->modulation = ((state->reg0 >> 2) & 7) + QAM_16; in ves1820_get_frontend()
[all …]
A Dtda10021.c31 u8 reg0; member
119 static int tda10021_setup_reg0(struct tda10021_state *state, u8 reg0, in tda10021_setup_reg0() argument
122 reg0 |= state->reg0 & 0x63; in tda10021_setup_reg0()
125 reg0 &= ~0x20; in tda10021_setup_reg0()
127 reg0 |= 0x20; in tda10021_setup_reg0()
129 _tda10021_writereg (state, 0x00, reg0 & 0xfe); in tda10021_setup_reg0()
130 _tda10021_writereg (state, 0x00, reg0 | 0x01); in tda10021_setup_reg0()
132 state->reg0 = reg0; in tda10021_setup_reg0()
404 …p->inversion = ((state->reg0 & 0x20) == 0x20) ^ (state->config->invert != 0) ? INVERSION_ON : INVE… in tda10021_get_frontend()
405 p->modulation = ((state->reg0 >> 2) & 7) + QAM_16; in tda10021_get_frontend()
[all …]
A Dtua6100.c43 u8 reg0[] = { 0x00, 0x00 }; in tua6100_sleep() local
44 struct i2c_msg msg = { .addr = priv->i2c_address, .flags = 0, .buf = reg0, .len = 2 }; in tua6100_sleep()
63 u8 reg0[] = { 0x00, 0x00 }; in tua6100_set_params() local
66 struct i2c_msg msg0 = { .addr = priv->i2c_address, .flags = 0, .buf = reg0, .len = 2 }; in tua6100_set_params()
76 reg0[1] = 0x03; in tua6100_set_params()
78 reg0[1] = 0x07; in tua6100_set_params()
A Dtda10023.c38 u8 reg0; member
144 static int tda10023_setup_reg0 (struct tda10023_state* state, u8 reg0) in tda10023_setup_reg0() argument
146 reg0 |= state->reg0 & 0x63; in tda10023_setup_reg0()
148 tda10023_writereg (state, 0x00, reg0 & 0xfe); in tda10023_setup_reg0()
149 tda10023_writereg (state, 0x00, reg0 | 0x01); in tda10023_setup_reg0()
151 state->reg0 = reg0; in tda10023_setup_reg0()
466 p->modulation = ((state->reg0 >> 2) & 7) + QAM_16; in tda10023_get_frontend()
529 state->reg0 = REG0_INIT_VAL; in tda10023_attach()
A Dm88rs2000.c241 u8 reg0, reg1; in m88rs2000_send_diseqc_burst() local
245 reg0 = m88rs2000_readreg(state, 0xb1); in m88rs2000_send_diseqc_burst()
249 m88rs2000_writereg(state, 0xb1, reg0); in m88rs2000_send_diseqc_burst()
259 u8 reg0, reg1; in m88rs2000_set_tone() local
261 reg0 = m88rs2000_readreg(state, 0xb1); in m88rs2000_set_tone()
268 reg0 |= 0x4; in m88rs2000_set_tone()
269 reg0 &= 0xbc; in m88rs2000_set_tone()
278 m88rs2000_writereg(state, 0xb1, reg0); in m88rs2000_set_tone()
A Dstv6110.c384 u8 reg0[] = { 0x00, 0x07, 0x11, 0xdc, 0x85, 0x17, 0x01, 0xe6, 0x1e }; in stv6110_attach() local
390 .buf = reg0, in stv6110_attach()
397 reg0[2] &= ~0xc0; in stv6110_attach()
398 reg0[2] |= (config->clk_div << 6); in stv6110_attach()
421 memcpy(&priv->regs, &reg0[1], 8); in stv6110_attach()
/drivers/gpu/drm/gma500/
A Dintel_gmbus.c262 GMBUS_REG_WRITE(GMBUS0 + reg_offset, bus->reg0); in gmbus_xfer()
350 bus->reg0 & 0xff, bus->adapter.name); in gmbus_xfer()
354 bus->force_bit = intel_gpio_create(dev_priv, bus->reg0 & 0xff); in gmbus_xfer()
428 bus->reg0 = i | GMBUS_RATE_100KHZ; in gma_intel_setup_gmbus()
458 bus->reg0 = (bus->reg0 & ~(0x3 << 8)) | (speed << 8); in gma_intel_gmbus_set_speed()
469 bus->reg0 & 0xff); in gma_intel_gmbus_force_bit()
/drivers/net/ethernet/marvell/octeon_ep/
A Doctep_cnxk_pf.c405 u64 reg0; in octep_poll_pfvf_mailbox_cnxk_pf() local
407 reg0 = octep_read_csr64(oct, CNXK_SDP_EPF_MBOX_RINT(0)); in octep_poll_pfvf_mailbox_cnxk_pf()
408 if (reg0) { in octep_poll_pfvf_mailbox_cnxk_pf()
413 if (!(reg0 & (0x1UL << vf_mbox_queue))) in octep_poll_pfvf_mailbox_cnxk_pf()
422 if (reg0) in octep_poll_pfvf_mailbox_cnxk_pf()
438 u64 reg0; in octep_poll_oei_cnxk_pf() local
441 reg0 = octep_read_csr64(oct, CNXK_SDP_EPF_OEI_RINT); in octep_poll_oei_cnxk_pf()
442 if (reg0) { in octep_poll_oei_cnxk_pf()
443 octep_write_csr64(oct, CNXK_SDP_EPF_OEI_RINT, reg0); in octep_poll_oei_cnxk_pf()
444 if (reg0 & CNXK_SDP_EPF_OEI_RINT_DATA_BIT_MBOX) in octep_poll_oei_cnxk_pf()
[all …]
A Doctep_cn9k_pf.c376 u64 reg0, reg1; in octep_poll_pfvf_mailbox() local
378 reg0 = octep_read_csr64(oct, CN93_SDP_EPF_MBOX_RINT(0)); in octep_poll_pfvf_mailbox()
380 if (reg0 || reg1) { in octep_poll_pfvf_mailbox()
387 if (!(reg0 & (0x1UL << vf_mbox_queue))) in octep_poll_pfvf_mailbox()
400 if (reg0) in octep_poll_pfvf_mailbox()
401 octep_write_csr64(oct, CN93_SDP_EPF_MBOX_RINT(0), reg0); in octep_poll_pfvf_mailbox()
/drivers/net/wireless/ath/ath10k/
A Dspectral.c71 u32 reg0, reg1; in ath10k_spectral_process_fft() local
82 reg0 = __le32_to_cpu(fftr->reg0); in ath10k_spectral_process_fft()
119 fft_sample->max_index = MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX); in ath10k_spectral_process_fft()
122 total_gain_db = MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB); in ath10k_spectral_process_fft()
123 base_pwr_db = MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB); in ath10k_spectral_process_fft()
132 chain_idx = MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX); in ath10k_spectral_process_fft()
/drivers/net/ethernet/8390/
A Dwd.c261 int reg0 = inb(ioaddr); in wd_probe1() local
262 if (reg0 == 0xff || reg0 == 0) { in wd_probe1()
271 dev->mem_start = ((reg0&0x3f) << 13) + (high_addr_bits << 19); in wd_probe1()
378 ei_status.reg0 = ((dev->mem_start>>13) & 0x3f) | WD_MEMENB; in wd_open()
383 outb(ei_status.reg0, ioaddr); /* WD_CMDREG */ in wd_open()
493 outb(ei_status.reg0 & ~WD_MEMENB, wd_cmdreg); in wd_close()
A Dne2k-pci.c100 #define ne2k_flags reg0
222 int irq, reg0, chip_idx = ent->driver_data; in ne2k_pci_init_one() local
248 reg0 = inb(ioaddr); in ne2k_pci_init_one()
249 if (reg0 == 0xFF) in ne2k_pci_init_one()
263 outb(reg0, ioaddr); in ne2k_pci_init_one()
A Dne.c298 int reg0, ret; in ne_probe1() local
305 reg0 = inb_p(ioaddr); in ne_probe1()
306 if (reg0 == 0xFF) { in ne_probe1()
320 outb_p(reg0, ioaddr); in ne_probe1()
A Dax88796.c121 int reg0; in ax_initial_check() local
124 reg0 = ei_inb(ioaddr); in ax_initial_check()
125 if (reg0 == 0xFF) in ax_initial_check()
134 ei_outb(reg0, ioaddr); in ax_initial_check()
/drivers/pci/controller/
A Dpcie-altera.c144 u32 reg0; member
226 cra_writel(pcie, tlp_rp_regdata->reg0, RP_TX_REG0); in tlp_write_tx()
231 static void s10_tlp_write_tx(struct altera_pcie *pcie, u32 reg0, u32 ctrl) in s10_tlp_write_tx() argument
233 cra_writel(pcie, reg0, RP_TX_REG0); in s10_tlp_write_tx()
258 u32 reg0, reg1; in tlp_read_packet() local
268 reg0 = cra_readl(pcie, RP_RXCPL_REG0); in tlp_read_packet()
281 *value = reg0; in tlp_read_packet()
344 tlp_rp_regdata.reg0 = headers[0]; in tlp_write_packet()
350 tlp_rp_regdata.reg0 = headers[2]; in tlp_write_packet()
355 tlp_rp_regdata.reg0 = data; in tlp_write_packet()
[all …]
/drivers/tee/optee/
A Doptee_private.h373 static inline void *reg_pair_to_ptr(u32 reg0, u32 reg1) in reg_pair_to_ptr() argument
375 return (void *)(unsigned long)(((u64)reg0 << 32) | reg1); in reg_pair_to_ptr()
378 static inline void reg_pair_from_64(u32 *reg0, u32 *reg1, u64 val) in reg_pair_from_64() argument
380 *reg0 = val >> 32; in reg_pair_from_64()
/drivers/media/cec/platform/meson/
A Dao-cec-g12a.c229 u32 reg0, reg1; in meson_ao_cec_g12a_dualdiv_clk_recalc_rate() local
231 regmap_read(dualdiv_clk->regmap, CECB_CLK_CNTL_REG0, &reg0); in meson_ao_cec_g12a_dualdiv_clk_recalc_rate()
237 if (reg0 & CECB_CLK_CNTL_DUAL_EN) { in meson_ao_cec_g12a_dualdiv_clk_recalc_rate()
240 n1 = FIELD_GET(CECB_CLK_CNTL_N1, reg0) + 1; in meson_ao_cec_g12a_dualdiv_clk_recalc_rate()
241 n2 = FIELD_GET(CECB_CLK_CNTL_N2, reg0) + 1; in meson_ao_cec_g12a_dualdiv_clk_recalc_rate()
255 n1 = FIELD_GET(CECB_CLK_CNTL_N1, reg0) + 1; in meson_ao_cec_g12a_dualdiv_clk_recalc_rate()
/drivers/media/platform/ti/cal/
A Dcal-camerarx.c153 unsigned int reg0, reg1; in cal_camerarx_config() local
166 reg0 = camerarx_read(phy, CAL_CSI2_PHY_REG0); in cal_camerarx_config()
167 cal_set_field(&reg0, CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_DISABLE, in cal_camerarx_config()
169 cal_set_field(&reg0, ths_term, CAL_CSI2_PHY_REG0_THS_TERM_MASK); in cal_camerarx_config()
170 cal_set_field(&reg0, ths_settle, CAL_CSI2_PHY_REG0_THS_SETTLE_MASK); in cal_camerarx_config()
172 phy_dbg(1, phy, "CSI2_%d_REG0 = 0x%08x\n", phy->instance, reg0); in cal_camerarx_config()
173 camerarx_write(phy, CAL_CSI2_PHY_REG0, reg0); in cal_camerarx_config()
/drivers/net/ethernet/netronome/nfp/bpf/
A Dverifier.c314 const struct bpf_reg_state *reg0 = cur_regs(env) + BPF_REG_0; in nfp_bpf_check_exit() local
320 if (!(reg0->type == SCALAR_VALUE && tnum_is_const(reg0->var_off))) { in nfp_bpf_check_exit()
323 tnum_strn(tn_buf, sizeof(tn_buf), reg0->var_off); in nfp_bpf_check_exit()
325 reg0->type, tn_buf); in nfp_bpf_check_exit()
329 imm = reg0->var_off.value; in nfp_bpf_check_exit()
335 reg0->type, imm); in nfp_bpf_check_exit()
/drivers/gpu/drm/i915/display/
A Dintel_gmbus.c49 u32 reg0; member
640 intel_de_write_fw(display, GMBUS0(display), gmbus0_source | bus->reg0); in do_gmbus_xfer()
646 gmbus0_source | bus->reg0); in do_gmbus_xfer()
650 gmbus0_source | bus->reg0, 0); in do_gmbus_xfer()
736 bus->adapter.name, bus->reg0 & 0xff); in do_gmbus_xfer()
920 bus->reg0 = pin | GMBUS_RATE_100KHZ; in intel_gmbus_setup()
/drivers/net/ethernet/qlogic/qed/
A Dqed_hsi.h653 __le32 reg0; member
777 __le32 reg0; member
1635 __le32 reg0; member
1673 __le32 reg0; member
3437 __le32 reg0; member
3610 __le32 reg0; member
3692 __le32 reg0; member
4559 __le32 reg0; member
4599 __le32 reg0; member
5507 __le32 reg0; member
[all …]
/drivers/net/ethernet/adaptec/
A Dstarfire.c1057 u16 reg0; in check_duplex() local
1070 reg0 = mdio_read(dev, np->phys[0], MII_BMCR); in check_duplex()
1073 reg0 |= BMCR_ANENABLE | BMCR_ANRESTART; in check_duplex()
1075 reg0 &= ~(BMCR_ANENABLE | BMCR_ANRESTART); in check_duplex()
1077 reg0 |= BMCR_SPEED100; in check_duplex()
1079 reg0 |= BMCR_FULLDPLX; in check_duplex()
1085 mdio_write(dev, np->phys[0], MII_BMCR, reg0); in check_duplex()
1612 u16 reg0, reg1, reg4, reg5; in netdev_media_change() local
1625 if (reg0 & BMCR_ANENABLE) { in netdev_media_change()
1644 if (reg0 & BMCR_SPEED100) in netdev_media_change()
[all …]
/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_mes.h309 uint32_t reg0; member
397 uint32_t reg0, uint32_t reg1,
/drivers/media/i2c/
A Dov9650.c858 u8 reg0, reg1, reg2; in __g_volatile_ctrl() local
868 ret = ov965x_read(ov965x, REG_GAIN, &reg0); in __g_volatile_ctrl()
874 gain = ((reg1 >> 6) << 8) | reg0; in __g_volatile_ctrl()
882 ret = ov965x_read(ov965x, REG_COM1, &reg0); in __g_volatile_ctrl()
892 (reg0 & 0x3); in __g_volatile_ctrl()

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