Searched refs:regIH_CLK_CTRL (Results 1 – 7 of 7) sorted by relevance
| /drivers/gpu/drm/amd/amdgpu/ |
| A D | ih_v6_0.c | 683 def = data = RREG32_SOC15(OSSSYS, 0, regIH_CLK_CTRL); in ih_v6_0_update_clockgating_state()
696 WREG32_SOC15(OSSSYS, 0, regIH_CLK_CTRL, data); in ih_v6_0_update_clockgating_state()
779 if (!RREG32_SOC15(OSSSYS, 0, regIH_CLK_CTRL)) in ih_v6_0_get_clockgating_state()
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| A D | ih_v6_1.c | 658 def = data = RREG32_SOC15(OSSSYS, 0, regIH_CLK_CTRL); in ih_v6_1_update_clockgating_state()
671 WREG32_SOC15(OSSSYS, 0, regIH_CLK_CTRL, data); in ih_v6_1_update_clockgating_state()
756 if (!RREG32_SOC15(OSSSYS, 0, regIH_CLK_CTRL)) in ih_v6_1_get_clockgating_state()
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| A D | ih_v7_0.c | 648 def = data = RREG32_SOC15(OSSSYS, 0, regIH_CLK_CTRL); in ih_v7_0_update_clockgating_state()
661 WREG32_SOC15(OSSSYS, 0, regIH_CLK_CTRL, data); in ih_v7_0_update_clockgating_state()
746 if (!RREG32_SOC15(OSSSYS, 0, regIH_CLK_CTRL)) in ih_v7_0_get_clockgating_state()
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| /drivers/gpu/drm/amd/include/asic_reg/oss/ |
| A D | osssys_4_4_2_offset.h | 190 #define regIH_CLK_CTRL … macro
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| A D | osssys_6_0_0_offset.h | 192 #define regIH_CLK_CTRL … macro
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| A D | osssys_6_1_0_offset.h | 148 #define regIH_CLK_CTRL … macro
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| A D | osssys_7_0_0_offset.h | 148 #define regIH_CLK_CTRL … macro
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