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Searched refs:reg_ctrl (Results 1 – 22 of 22) sorted by relevance

/drivers/clk/spacemit/
A Dccu_mix.h72 .reg_ctrl = _reg_ctrl, \
89 .reg_ctrl = _reg_ctrl, \
99 .reg_ctrl = _reg_ctrl, \
110 .reg_ctrl = _reg_ctrl, \
126 .reg_ctrl = _reg_ctrl, \
138 .reg_ctrl = _reg_ctrl, \
151 .reg_ctrl = _reg_ctrl, \
165 .reg_ctrl = _reg_ctrl, \
186 .reg_ctrl = _reg_ctrl, \
199 .reg_ctrl = _reg_ctrl, \
A Dccu_common.h19 u32 reg_ctrl; member
A Dccu_ddn.h30 .reg_ctrl = _reg_ctrl, \
/drivers/net/can/flexcan/
A Dflexcan-core.c610 priv->write(reg_ctrl, &regs->ctrl); in flexcan_error_irq_enable()
618 priv->write(reg_ctrl, &regs->ctrl); in flexcan_error_irq_disable()
984 u32 reg_ctrl, reg_id, reg_iflag1; in flexcan_mailbox_read() local
1020 if (reg_ctrl & FLEXCAN_MB_CNT_EDL) in flexcan_mailbox_read()
1030 *timestamp = reg_ctrl << 16; in flexcan_mailbox_read()
1033 if (reg_ctrl & FLEXCAN_MB_CNT_IDE) in flexcan_mailbox_read()
1050 if (reg_ctrl & FLEXCAN_MB_CNT_ESI) in flexcan_mailbox_read()
1124 reg_ctrl << 16, NULL); in flexcan_irq()
1549 reg_ctrl &= ~FLEXCAN_CTRL_TSYN; in flexcan_chip_start()
1559 reg_ctrl |= FLEXCAN_CTRL_ERR_MSK; in flexcan_chip_start()
[all …]
/drivers/thermal/
A Dloongson2_thermal.c53 int reg_ctrl = 0; in loongson2_set_ctrl_regs() local
57 reg_ctrl = ctrl_data + HECTO; in loongson2_set_ctrl_regs()
58 reg_ctrl |= enable ? 0x100 : 0; in loongson2_set_ctrl_regs()
59 writew(reg_ctrl, data->ctrl_reg + ctrl_reg + reg_off); in loongson2_set_ctrl_regs()
/drivers/media/pci/cx23885/
A Dcx23885-i2c.c84 cx_write(bus->reg_ctrl, bus->i2c_period | (1 << 2)); in i2c_sendbytes()
107 cx_write(bus->reg_ctrl, ctrl); in i2c_sendbytes()
129 cx_write(bus->reg_ctrl, ctrl); in i2c_sendbytes()
163 cx_write(bus->reg_ctrl, bus->i2c_period | (1 << 2) | 1); in i2c_readbytes()
189 cx_write(bus->reg_ctrl, ctrl); in i2c_readbytes()
A Dcx23885.h242 u32 reg_ctrl; member
A Dcx23885-core.c949 dev->i2c_bus[0].reg_ctrl = I2C1_CTRL; in cx23885_dev_setup()
959 dev->i2c_bus[1].reg_ctrl = I2C2_CTRL; in cx23885_dev_setup()
969 dev->i2c_bus[2].reg_ctrl = I2C3_CTRL; in cx23885_dev_setup()
/drivers/media/pci/cx25821/
A Dcx25821-i2c.c83 cx_write(bus->reg_ctrl, bus->i2c_period | (1 << 2)); in i2c_sendbytes()
108 cx_write(bus->reg_ctrl, ctrl); in i2c_sendbytes()
134 cx_write(bus->reg_ctrl, ctrl); in i2c_sendbytes()
174 cx_write(bus->reg_ctrl, bus->i2c_period | (1 << 2) | 1); in i2c_readbytes()
199 cx_write(bus->reg_ctrl, ctrl); in i2c_readbytes()
A Dcx25821.h149 u32 reg_ctrl; member
A Dcx25821-core.c884 dev->i2c_bus[0].reg_ctrl = I2C1_CTRL; in cx25821_dev_setup()
/drivers/gpu/drm/tiny/
A Darcpgu.c124 u32 reg_ctrl; in arc_pgu_set_pxl_fmt() local
134 reg_ctrl = arc_pgu_read(arcpgu, ARCPGU_REG_CTRL); in arc_pgu_set_pxl_fmt()
136 reg_ctrl &= ~ARCPGU_MODE_XRGB8888; in arc_pgu_set_pxl_fmt()
138 reg_ctrl |= ARCPGU_MODE_XRGB8888; in arc_pgu_set_pxl_fmt()
139 arc_pgu_write(arcpgu, ARCPGU_REG_CTRL, reg_ctrl); in arc_pgu_set_pxl_fmt()
/drivers/spi/
A Dspi-ath79.c43 u32 reg_ctrl; member
90 sp->reg_ctrl = ath79_spi_rr(sp, AR71XX_SPI_REG_CTRL); in ath79_spi_enable()
103 ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, sp->reg_ctrl); in ath79_spi_disable()
/drivers/gpu/drm/hisilicon/kirin/
A Dkirin_drm_ade.c351 u32 reg_ctrl, reg_addr, reg_size, reg_stride, reg_space, reg_en; in ade_rdma_dump_regs() local
354 reg_ctrl = RD_CH_CTRL(ch); in ade_rdma_dump_regs()
363 val = readl(base + reg_ctrl); in ade_rdma_dump_regs()
553 u32 reg_ctrl, reg_addr, reg_size, reg_stride, reg_space, reg_en; in ade_rdma_set() local
564 reg_ctrl = RD_CH_CTRL(ch); in ade_rdma_set()
574 writel((fmt << 16) & 0x1f0000, base + reg_ctrl); in ade_rdma_set()
/drivers/misc/lis3lv02d/
A Dlis3lv02d.h267 int (*reg_ctrl) (struct lis3lv02d *lis3, bool state); member
A Dlis3lv02d.c393 if (lis3->reg_ctrl) in lis3lv02d_poweroff()
397 if (lis3->reg_ctrl) in lis3lv02d_poweroff()
398 lis3->reg_ctrl(lis3, LIS3_REG_OFF); in lis3lv02d_poweroff()
436 if (lis3->reg_ctrl) in lis3lv02d_poweron()
A Dlis3lv02d_i2c.c153 lis3_dev.reg_ctrl = lis3_reg_ctrl; in lis3lv02d_i2c_probe()
/drivers/net/wireless/ath/wcn36xx/
A Ddxe.c124 wcn->dxe_tx_l_ch.reg_ctrl = WCN36XX_DXE_REG_CTL_TX_L; in wcn36xx_dxe_alloc_ctl_blks()
125 wcn->dxe_tx_h_ch.reg_ctrl = WCN36XX_DXE_REG_CTL_TX_H; in wcn36xx_dxe_alloc_ctl_blks()
844 ch->reg_ctrl, ch->def_ctrl); in wcn36xx_dxe_tx_frame()
A Ddxe.h443 u32 reg_ctrl; member
/drivers/gpu/drm/amd/amdgpu/
A Dvi.c1057 u32 reg_ctrl; in vi_set_vce_clocks() local
1063 reg_ctrl = ixGNB_CLK3_DFS_CNTL; in vi_set_vce_clocks()
1068 reg_ctrl = ixCG_ECLK_CNTL; in vi_set_vce_clocks()
1089 tmp = RREG32_SMC(reg_ctrl); in vi_set_vce_clocks()
1092 WREG32_SMC(reg_ctrl, tmp); in vi_set_vce_clocks()
/drivers/gpu/drm/msm/dsi/
A Ddsi_host.c901 u32 reg, reg_ctrl, reg_ctrl2; in dsi_update_dsc_timing() local
943 reg_ctrl = dsi_read(msm_host, REG_DSI_COMMAND_COMPRESSION_MODE_CTRL); in dsi_update_dsc_timing()
946 reg_ctrl &= ~0xffff; in dsi_update_dsc_timing()
947 reg_ctrl |= reg; in dsi_update_dsc_timing()
952 dsi_write(msm_host, REG_DSI_COMMAND_COMPRESSION_MODE_CTRL, reg_ctrl); in dsi_update_dsc_timing()
/drivers/net/wireless/realtek/rtw89/
A Dmac.c4211 u32 reg_info, reg_ctrl; in rtw89_mac_check_packet_ctrl() local
4216 reg_ctrl = rtw89_mac_reg_by_idx(rtwdev, p->ptcl_dbg, rtwvif_link->mac_idx); in rtw89_mac_check_packet_ctrl()
4218 rtw89_write32_mask(rtwdev, reg_ctrl, B_AX_PTCL_DBG_SEL_MASK, type); in rtw89_mac_check_packet_ctrl()
4219 rtw89_write32_set(rtwdev, reg_ctrl, B_AX_PTCL_DBG_EN); in rtw89_mac_check_packet_ctrl()

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