Searched refs:reg_tbl (Results 1 – 14 of 14) sorted by relevance
| /drivers/media/platform/qcom/venus/ |
| A D | core.c | 663 .reg_tbl = msm8916_reg_preset,
695 .reg_tbl = msm8996_reg_preset,
733 .reg_tbl = msm8998_reg_preset,
787 .reg_tbl = sdm660_reg_preset,
967 .reg_tbl = sm8250_reg_preset,
1029 .reg_tbl = sm7280_reg_preset,
|
| A D | core.h | 69 const struct reg_val *reg_tbl; member
|
| A D | hfi_venus.c | 370 const struct reg_val *tbl = res->reg_tbl; in venus_set_registers()
|
| /drivers/net/ethernet/qlogic/qlcnic/ |
| A D | qlcnic_hw.h | 39 readl(((a)->ahw->pci_base0) + ((a)->ahw->reg_tbl[addr]))
43 writel(value, ((a)->ahw->pci_base0) + ((a)->ahw->reg_tbl[addr]))
|
| A D | qlcnic.h | 530 u32 *reg_tbl; member
|
| A D | qlcnic_83xx_hw.c | 263 ahw->reg_tbl = (u32 *)qlcnic_83xx_reg_tbl; in qlcnic_83xx_register_map()
3616 sizeof(*adapter->ahw->reg_tbl)); in qlcnic_83xx_get_regs_len()
|
| A D | qlcnic_sriov_common.c | 666 ahw->reg_tbl = (u32 *)qlcnic_83xx_reg_tbl; in qlcnic_sriov_vf_register_map()
|
| A D | qlcnic_main.c | 2456 ahw->reg_tbl = (u32 *) qlcnic_reg_tbl; in qlcnic_probe()
|
| /drivers/scsi/qla4xxx/ |
| A D | ql4_def.h | 817 uint32_t *reg_tbl; member
1057 return ha->isp_ops->rd_reg_direct(ha, ha->reg_tbl[crb_reg]); in qla4_8xxx_rd_direct()
1064 ha->isp_ops->wr_reg_direct(ha, ha->reg_tbl[crb_reg], value); in qla4_8xxx_wr_direct()
|
| A D | ql4_83xx.c | 453 ha->reg_tbl[QLA8XXX_CRB_DEV_PART_INFO]); in qla4_83xx_can_perform_reset()
455 drv_active = qla4_83xx_rd_reg(ha, ha->reg_tbl[QLA8XXX_CRB_DRV_ACTIVE]); in qla4_83xx_can_perform_reset()
|
| A D | ql4_os.c | 8663 ha->reg_tbl = (uint32_t *) qla4_82xx_reg_tbl; in qla4xxx_probe_adapter()
8675 ha->reg_tbl = (uint32_t *)qla4_83xx_reg_tbl; in qla4xxx_probe_adapter()
|
| /drivers/net/ethernet/broadcom/bnx2x/ |
| A D | bnx2x_ethtool.c | 2240 } reg_tbl[] = { in bnx2x_test_registers() local
2352 for (i = 0; reg_tbl[i].offset0 != 0xffffffff; i++) { in bnx2x_test_registers()
2354 if (!(hw & reg_tbl[i].hw)) in bnx2x_test_registers()
2357 offset = reg_tbl[i].offset0 + port*reg_tbl[i].offset1; in bnx2x_test_registers()
2358 mask = reg_tbl[i].mask; in bnx2x_test_registers()
|
| /drivers/net/ethernet/broadcom/ |
| A D | bnx2.c | 5557 } reg_tbl[] = { in bnx2_test_registers() local
5671 for (i = 0; reg_tbl[i].offset != 0xffff; i++) { in bnx2_test_registers()
5673 u16 flags = reg_tbl[i].flags; in bnx2_test_registers()
5678 offset = (u32) reg_tbl[i].offset; in bnx2_test_registers()
5679 rw_mask = reg_tbl[i].rw_mask; in bnx2_test_registers()
5680 ro_mask = reg_tbl[i].ro_mask; in bnx2_test_registers()
|
| A D | tg3.c | 13191 } reg_tbl[] = { in tg3_test_registers() local
13334 for (i = 0; reg_tbl[i].offset != 0xffff; i++) { in tg3_test_registers()
13335 if (is_5705 && (reg_tbl[i].flags & TG3_FL_NOT_5705)) in tg3_test_registers()
13338 if (!is_5705 && (reg_tbl[i].flags & TG3_FL_5705)) in tg3_test_registers()
13342 (reg_tbl[i].flags & TG3_FL_NOT_5788)) in tg3_test_registers()
13345 if (is_5750 && (reg_tbl[i].flags & TG3_FL_NOT_5750)) in tg3_test_registers()
13348 offset = (u32) reg_tbl[i].offset; in tg3_test_registers()
13349 read_mask = reg_tbl[i].read_mask; in tg3_test_registers()
13350 write_mask = reg_tbl[i].write_mask; in tg3_test_registers()
|
Completed in 107 milliseconds