| /drivers/media/spi/ |
| A D | gs1662.c | 54 u16 reg_value; member 258 int reg_value; in gs_s_dv_timings() local 264 if (reg_value == 0x0) in gs_s_dv_timings() 288 u16 reg_value, i; in gs_query_dv_timings() local 303 if (reg_value) in gs_query_dv_timings() 312 if (!(reg_value & MASK_H_LOCK) || !(reg_value & MASK_V_LOCK)) in gs_query_dv_timings() 342 int reg_value; in gs_s_stream() local 362 u16 reg_value, i; in gs_g_input_status() local 372 if (reg_value) in gs_g_input_status() 385 if (!(reg_value & MASK_H_LOCK)) in gs_g_input_status() [all …]
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| /drivers/media/dvb-frontends/cxd2880/ |
| A D | cxd2880_tnrdmd_dvbt_mon.c | 392 u16 *reg_value) in dvbt_read_snr_reg() argument 439 if (reg_value == 0) in dvbt_calc_snr() 442 if (reg_value > 4996) in dvbt_calc_snr() 443 reg_value = 4996; in dvbt_calc_snr() 445 *snr = intlog10(reg_value) - intlog10(5350 - reg_value); in dvbt_calc_snr() 454 u16 reg_value = 0; in cxd2880_tnrdmd_dvbt_mon_snr() local 493 u16 reg_value = 0; in cxd2880_tnrdmd_dvbt_mon_snr_diver() local 517 reg_value = 0; in cxd2880_tnrdmd_dvbt_mon_snr_diver() 519 reg_value = 0; in cxd2880_tnrdmd_dvbt_mon_snr_diver() 530 reg_value = 0; in cxd2880_tnrdmd_dvbt_mon_snr_diver() [all …]
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| A D | cxd2880_tnrdmd_dvbt2_mon.c | 1228 u16 *reg_value) in dvbt2_read_snr_reg() argument 1286 if (reg_value == 0) in dvbt2_calc_snr() 1289 if (reg_value > 10876) in dvbt2_calc_snr() 1290 reg_value = 10876; in dvbt2_calc_snr() 1292 *snr = intlog10(reg_value) - intlog10(12600 - reg_value); in dvbt2_calc_snr() 1301 u16 reg_value = 0; in cxd2880_tnrdmd_dvbt2_mon_snr() local 1340 u16 reg_value = 0; in cxd2880_tnrdmd_dvbt2_mon_snr_diver() local 1364 reg_value = 0; in cxd2880_tnrdmd_dvbt2_mon_snr_diver() 1366 reg_value = 0; in cxd2880_tnrdmd_dvbt2_mon_snr_diver() 1377 reg_value = 0; in cxd2880_tnrdmd_dvbt2_mon_snr_diver() [all …]
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| A D | cxd2880_io.c | 49 const struct cxd2880_reg_value reg_value[], in cxd2880_io_write_multi_regs() argument 59 ret = io->write_reg(io, tgt, reg_value[i].addr, in cxd2880_io_write_multi_regs() 60 reg_value[i].value); in cxd2880_io_write_multi_regs()
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| /drivers/gpu/drm/amd/display/dc/ |
| A D | dm_services.h | 89 uint32_t reg_value, in get_reg_field_value_ex() argument 93 return (mask & reg_value) >> shift; in get_reg_field_value_ex() 96 #define get_reg_field_value(reg_value, reg_name, reg_field)\ argument 98 (reg_value),\ 103 uint32_t reg_value, in set_reg_field_value_ex() argument 109 return (reg_value & ~mask) | (mask & (value << shift)); in set_reg_field_value_ex() 113 (reg_value) = set_reg_field_value_ex(\ 114 (reg_value),\ 167 (reg_value),\ 172 (reg_value) = set_reg_field_value_ex(\ [all …]
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| /drivers/gpu/drm/xe/ |
| A D | xe_survivability_mode.c | 61 static u32 aux_history_offset(u32 reg_value) in aux_history_offset() argument 63 return REG_FIELD_GET(AUXINFO_HISTORY_OFFSET, reg_value); in aux_history_offset() 79 u32 id = 0, reg_value; in populate_survivability_info() local 85 reg_value = info[id].value; in populate_survivability_info() 87 if (reg_value & HISTORY_TRACKING) { in populate_survivability_info() 91 if (reg_value & OVERFLOW_SUPPORT) { in populate_survivability_info() 92 id = REG_FIELD_GET(OVERFLOW_REG_OFFSET, reg_value); in populate_survivability_info() 97 if (reg_value & AUXINFO_SUPPORT) { in populate_survivability_info() 98 id = REG_FIELD_GET(AUXINFO_REG_OFFSET, reg_value); in populate_survivability_info() 100 for (index = 0; id && reg_value; index++, reg_value = info[id].value, in populate_survivability_info() [all …]
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| /drivers/clk/ |
| A D | clk-max9485.c | 36 u8 reg_value; member 80 u8 reg_value; member 96 drvdata->reg_value &= ~mask; in max9485_update_bits() 97 drvdata->reg_value |= value; in max9485_update_bits() 101 mask, value, drvdata->reg_value); in max9485_update_bits() 104 &drvdata->reg_value, in max9485_update_bits() 105 sizeof(drvdata->reg_value)); in max9485_update_bits() 144 entry->reg_value); in max9485_clkout_set_rate() 156 if (val == entry->reg_value) in max9485_clkout_recalc_rate() 291 sizeof(drvdata->reg_value)); in max9485_i2c_probe() [all …]
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| /drivers/gpu/drm/hisilicon/hibmc/dp/ |
| A D | dp_comm.h | 46 #define dp_field_modify(reg_value, mask, val) \ argument 48 (reg_value) &= ~(mask); \ 49 (reg_value) |= FIELD_PREP(mask, val); \ 57 u32 reg_value = readl(addr); \ 58 dp_field_modify(reg_value, mask, val); \ 59 writel(reg_value, addr); \
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| /drivers/net/phy/ |
| A D | open_alliance_helpers.c | 33 int oa_1000bt1_get_ethtool_cable_result_code(u16 reg_value) in oa_1000bt1_get_ethtool_cable_result_code() argument 35 u8 tdr_status = FIELD_GET(OA_1000BT1_HDD_TDR_STATUS_MASK, reg_value); in oa_1000bt1_get_ethtool_cable_result_code() 36 u8 dist_val = FIELD_GET(OA_1000BT1_HDD_TDR_DISTANCE_MASK, reg_value); in oa_1000bt1_get_ethtool_cable_result_code() 68 int oa_1000bt1_get_tdr_distance(u16 reg_value) in oa_1000bt1_get_tdr_distance() argument 70 u8 dist_val = FIELD_GET(OA_1000BT1_HDD_TDR_DISTANCE_MASK, reg_value); in oa_1000bt1_get_tdr_distance()
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| /drivers/media/dvb-frontends/ |
| A D | stv6111.c | 32 u16 reg_value; member 533 int table_size, u16 reg_value) in table_lookup() argument 542 if (reg_value <= table[0].reg_value) { in table_lookup() 544 } else if (reg_value >= table[imax].reg_value) { in table_lookup() 549 if ((table[imin].reg_value <= reg_value) && in table_lookup() 550 (reg_value <= table[i].reg_value)) in table_lookup() 555 reg_diff = table[imax].reg_value - table[imin].reg_value; in table_lookup() 558 gain += ((s32)(reg_value - table[imin].reg_value) * in table_lookup()
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| /drivers/hwtracing/coresight/ |
| A D | coresight-cti-core.c | 344 u32 reg_value; in cti_channel_trig_op() local 378 reg_value |= chan_bitmask; in cti_channel_trig_op() 380 reg_value &= ~chan_bitmask; in cti_channel_trig_op() 401 u32 reg_value; in cti_channel_gate_op() local 410 reg_value = config->ctigate; in cti_channel_gate_op() 413 reg_value |= chan_bitmask; in cti_channel_gate_op() 417 reg_value &= ~chan_bitmask; in cti_channel_gate_op() 425 config->ctigate = reg_value; in cti_channel_gate_op() 439 u32 reg_value; in cti_channel_setop() local 459 reg_value = chan_bitmask; in cti_channel_setop() [all …]
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| /drivers/power/supply/ |
| A D | ab8500_fg.c | 1839 u8 reg_value; in ab8500_fg_check_hw_failure_work() local 1850 ®_value); in ab8500_fg_check_hw_failure_work() 2576 u8 reg_value; in ab8505_powercut_flagtime_read() local 2626 u8 reg_value; in ab8505_powercut_maxtime_read() local 2677 u8 reg_value; in ab8505_powercut_restart_read() local 2728 u8 reg_value; in ab8505_powercut_timer_read() local 2751 u8 reg_value; in ab8505_powercut_restart_counter_read() local 2774 u8 reg_value; in ab8505_powercut_read() local 2823 u8 reg_value; in ab8505_powercut_flag_read() local 2846 u8 reg_value; in ab8505_powercut_debounce_read() local [all …]
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| /drivers/gpu/drm/amd/amdgpu/ |
| A D | sdma_v4_4.c | 201 uint32_t reg_value = 0; in sdma_v4_4_query_ras_error_count_by_instance() local 205 reg_value = RREG32(reg_offset); in sdma_v4_4_query_ras_error_count_by_instance() 207 if (reg_value) in sdma_v4_4_query_ras_error_count_by_instance() 208 sdma_v4_4_get_ras_error_count(adev, regSDMA0_EDC_COUNTER, reg_value, in sdma_v4_4_query_ras_error_count_by_instance() 212 reg_value = RREG32(reg_offset); in sdma_v4_4_query_ras_error_count_by_instance() 214 if (reg_value) in sdma_v4_4_query_ras_error_count_by_instance() 215 sdma_v4_4_get_ras_error_count(adev, regSDMA0_EDC_COUNTER2, reg_value, in sdma_v4_4_query_ras_error_count_by_instance()
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| A D | umc_v6_7.c | 64 uint64_t reg_value; in umc_v6_7_query_error_status_helper() local 75 reg_value = RREG64_PCIE((mc_umc_addr + umc_reg_offset) * 4); in umc_v6_7_query_error_status_helper() 76 if (reg_value) in umc_v6_7_query_error_status_helper() 77 dev_info(adev->dev, "MCA IPID 0x%llx, umc_reg_offset 0x%x\n", reg_value, umc_reg_offset); in umc_v6_7_query_error_status_helper() 82 reg_value = RREG64_PCIE((mc_umc_addr + umc_reg_offset) * 4); in umc_v6_7_query_error_status_helper() 83 if (reg_value) in umc_v6_7_query_error_status_helper() 84 dev_info(adev->dev, "MCA SYND 0x%llx, umc_reg_offset 0x%x\n", reg_value, umc_reg_offset); in umc_v6_7_query_error_status_helper() 89 reg_value = RREG64_PCIE((mc_umc_addr + umc_reg_offset) * 4); in umc_v6_7_query_error_status_helper() 90 if (reg_value) in umc_v6_7_query_error_status_helper() 91 dev_info(adev->dev, "MCA MISC0 0x%llx, umc_reg_offset 0x%x\n", reg_value, umc_reg_offset); in umc_v6_7_query_error_status_helper()
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| A D | mmsch_v3_0.h | 68 uint32_t reg_value; member 89 uint32_t reg_value; member 107 direct_wt.reg_value = value; \
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| A D | mmsch_v4_0.h | 80 uint32_t reg_value; member 101 uint32_t reg_value; member 119 direct_wt.reg_value = value; \
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| A D | mmsch_v5_0.h | 79 uint32_t reg_value; member 100 uint32_t reg_value; member 118 direct_wt.reg_value = value; \
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| /drivers/ata/ |
| A D | ahci_imx.c | 676 struct reg_value { struct 678 u32 reg_value; argument 683 const struct reg_value *values; 795 u32 reg_value = 0; in imx_ahci_parse_props() local 803 reg_value |= prop->set_value; in imx_ahci_parse_props() 812 reg_value |= prop->def_value; in imx_ahci_parse_props() 820 reg_value |= prop->values[j].reg_value; in imx_ahci_parse_props() 828 reg_value |= prop->def_value; in imx_ahci_parse_props() 832 return reg_value; in imx_ahci_parse_props() 887 u32 reg_value; in imx_ahci_probe() local [all …]
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| /drivers/misc/ |
| A D | xilinx_sdfec.c | 264 u32 reg_value; in update_config_from_hw() local 268 reg_value = xsdfec_regread(xsdfec, XSDFEC_ORDER_ADDR); in update_config_from_hw() 269 xsdfec->config.order = reg_value; in update_config_from_hw() 279 reg_value = xsdfec_regread(xsdfec, XSDFEC_IMR_ADDR); in update_config_from_hw() 284 (reg_value & XSDFEC_ECC_ISR_MASK) > 0; in update_config_from_hw() 438 u32 reg_value; in xsdfec_get_turbo() local 446 reg_value = xsdfec_regread(xsdfec, XSDFEC_TURBO_ADDR); in xsdfec_get_turbo() 450 turbo_params.alg = reg_value & 0x1; in xsdfec_get_turbo() 782 u32 reg_value; in xsdfec_is_active() local 788 is_active = !!(reg_value & XSDFEC_IS_ACTIVITY_SET); in xsdfec_is_active() [all …]
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| /drivers/phy/allwinner/ |
| A D | phy-sun9i-usb.c | 46 u32 bits, reg_value; in sun9i_usb_phy_passby() local 56 reg_value = readl(phy->pmu); in sun9i_usb_phy_passby() 59 reg_value |= bits; in sun9i_usb_phy_passby() 61 reg_value &= ~bits; in sun9i_usb_phy_passby() 63 writel(reg_value, phy->pmu); in sun9i_usb_phy_passby()
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| /drivers/net/ethernet/microchip/ |
| A D | lan743x_ethtool.c | 32 u32 reg_value; in lan743x_otp_power_up() local 36 if (reg_value & OTP_PWR_DN_PWRDN_N_) { in lan743x_otp_power_up() 38 reg_value &= ~OTP_PWR_DN_PWRDN_N_; in lan743x_otp_power_up() 49 u32 reg_value; in lan743x_otp_power_down() local 52 if (!(reg_value & OTP_PWR_DN_PWRDN_N_)) { in lan743x_otp_power_down() 54 reg_value |= OTP_PWR_DN_PWRDN_N_; in lan743x_otp_power_down() 219 u32 reg_value; in lan743x_hs_otp_power_up() local 222 if (reg_value & OTP_PWR_DN_PWRDN_N_) { in lan743x_hs_otp_power_up() 223 reg_value &= ~OTP_PWR_DN_PWRDN_N_; in lan743x_hs_otp_power_up() 235 u32 reg_value; in lan743x_hs_otp_power_down() local [all …]
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| /drivers/mmc/host/ |
| A D | dw_mmc-starfive.c | 45 u32 reg_value = mci_readl(host, UHS_REG_EXT); in dw_mci_starfive_set_sample_phase() local 48 reg_value &= ~STARFIVE_SMPL_PHASE; in dw_mci_starfive_set_sample_phase() 49 reg_value |= FIELD_PREP(STARFIVE_SMPL_PHASE, smpl_phase); in dw_mci_starfive_set_sample_phase() 50 mci_writel(host, UHS_REG_EXT, reg_value); in dw_mci_starfive_set_sample_phase()
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| /drivers/video/fbdev/via/ |
| A D | hw.c | 1014 int reg_value; in viafb_load_fetch_count_reg() local 1020 reg_value = IGA1_FETCH_COUNT_FORMULA(h_addr, bpp_byte); in viafb_load_fetch_count_reg() 1039 int reg_value; in viafb_load_FIFO_reg() local 1176 reg_value = in viafb_load_FIFO_reg() 1187 reg_value = in viafb_load_FIFO_reg() 1309 reg_value = in viafb_load_FIFO_reg() 1319 viafb_load_reg(reg_value, in viafb_load_FIFO_reg() 1324 reg_value = in viafb_load_FIFO_reg() 1332 viafb_load_reg(reg_value, in viafb_load_FIFO_reg() 1347 reg_value = in viafb_load_FIFO_reg() [all …]
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| A D | lcd.c | 338 int reg_value = 0; in load_lcd_scaling() local 353 reg_value = in load_lcd_scaling() 359 viafb_load_reg(reg_value, in load_lcd_scaling() 373 reg_value = in load_lcd_scaling() 380 viafb_load_reg(reg_value, in load_lcd_scaling() 385 DEBUG_MSG(KERN_INFO "Horizontal Scaling value = %d", reg_value); in load_lcd_scaling() 397 reg_value = in load_lcd_scaling() 403 viafb_load_reg(reg_value, in load_lcd_scaling() 417 reg_value = in load_lcd_scaling() 424 viafb_load_reg(reg_value, in load_lcd_scaling() [all …]
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| /drivers/clk/sophgo/ |
| A D | clk-sg2042-pll.c | 97 static inline void sg2042_pll_ctrl_decode(unsigned int reg_value, in sg2042_pll_ctrl_decode() argument 100 ctrl->fbdiv = FIELD_GET(PLLCTRL_FBDIV_MASK, reg_value); in sg2042_pll_ctrl_decode() 101 ctrl->refdiv = FIELD_GET(PLLCTRL_REFDIV_MASK, reg_value); in sg2042_pll_ctrl_decode() 102 ctrl->postdiv1 = FIELD_GET(PLLCTRL_POSTDIV1_MASK, reg_value); in sg2042_pll_ctrl_decode() 103 ctrl->postdiv2 = FIELD_GET(PLLCTRL_POSTDIV2_MASK, reg_value); in sg2042_pll_ctrl_decode() 148 static unsigned long sg2042_pll_recalc_rate(unsigned int reg_value, in sg2042_pll_recalc_rate() argument 154 sg2042_pll_ctrl_decode(reg_value, &ctrl_table); in sg2042_pll_recalc_rate()
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