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Searched refs:reg_width (Results 1 – 25 of 32) sorted by relevance

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/drivers/input/misc/
A Diqs7222.c812 int reg_width; member
826 .reg_width = 8,
834 .reg_width = 8,
842 .reg_width = 1,
850 .reg_width = 1,
857 .reg_width = 1,
864 .reg_width = 1,
871 .reg_width = 3,
880 .reg_width = 1,
887 .reg_width = 4,
[all …]
/drivers/reset/
A Dreset-simple.c34 int reg_width = sizeof(u32); in reset_simple_update() local
35 int bank = id / (reg_width * BITS_PER_BYTE); in reset_simple_update()
36 int offset = id % (reg_width * BITS_PER_BYTE); in reset_simple_update()
42 reg = readl(data->membase + (bank * reg_width)); in reset_simple_update()
47 writel(reg, data->membase + (bank * reg_width)); in reset_simple_update()
88 int reg_width = sizeof(u32); in reset_simple_status() local
89 int bank = id / (reg_width * BITS_PER_BYTE); in reset_simple_status()
90 int offset = id % (reg_width * BITS_PER_BYTE); in reset_simple_status()
93 reg = readl(data->membase + (bank * reg_width)); in reset_simple_status()
/drivers/sh/intc/
A Dhandle.c73 fn += (mr->reg_width >> 3) - 1; in _intc_mask_data()
78 (mr->reg_width - 1) - *fld_idx); in _intc_mask_data()
137 fn += (pr->reg_width >> 3) - 1; in _intc_prio_data()
140 BUG_ON(n * pr->field_width > pr->reg_width); in _intc_prio_data()
142 bit = pr->reg_width - (n * pr->field_width); in _intc_prio_data()
194 fn += (mr->reg_width >> 3) - 1; in intc_ack_data()
199 (mr->reg_width - 1) - j); in intc_ack_data()
272 fn += (sr->reg_width >> 3) - 1; in intc_get_sense_handle()
274 BUG_ON((j + 1) * sr->field_width > sr->reg_width); in intc_get_sense_handle()
276 bit = sr->reg_width - ((j + 1) * sr->field_width); in intc_get_sense_handle()
A Dbalancing.c67 fn += (mr->reg_width >> 3) - 1; in intc_dist_data()
72 (mr->reg_width - 1) - j); in intc_dist_data()
/drivers/net/pcs/
A Dpcs-xpcs-plat.c31 int reg_width; member
66 switch (pxpcs->reg_width) { in xpcs_mmio_read_reg_indirect()
97 switch (pxpcs->reg_width) { in xpcs_mmio_write_reg_indirect()
125 switch (pxpcs->reg_width) { in xpcs_mmio_read_reg_direct()
151 switch (pxpcs->reg_width) { in xpcs_mmio_write_reg_direct()
240 if (!device_property_read_u32(dev, "reg-io-width", &pxpcs->reg_width)) { in xpcs_plat_init_res()
241 if (pxpcs->reg_width != 2 && pxpcs->reg_width != 4) { in xpcs_plat_init_res()
246 pxpcs->reg_width = 2; in xpcs_plat_init_res()
260 spc_size = pxpcs->reg_width * SZ_256; in xpcs_plat_init_res()
262 spc_size = pxpcs->reg_width * SZ_2M; in xpcs_plat_init_res()
/drivers/net/wireless/broadcom/b43/
A Dbus.c64 size_t count, u16 offset, u8 reg_width) in b43_bus_bcma_block_read() argument
66 bcma_block_read(dev->bdev, buffer, count, offset, reg_width); in b43_bus_bcma_block_read()
70 size_t count, u16 offset, u8 reg_width) in b43_bus_bcma_block_write() argument
72 bcma_block_write(dev->bdev, buffer, count, offset, reg_width); in b43_bus_bcma_block_write()
167 size_t count, u16 offset, u8 reg_width) in b43_bus_ssb_block_read() argument
169 ssb_block_read(dev->sdev, buffer, count, offset, reg_width); in b43_bus_ssb_block_read()
173 size_t count, u16 offset, u8 reg_width) in b43_bus_ssb_block_write() argument
175 ssb_block_write(dev->sdev, buffer, count, offset, reg_width); in b43_bus_ssb_block_write()
A Dbus.h34 size_t count, u16 offset, u8 reg_width);
36 size_t count, u16 offset, u8 reg_width);
/drivers/input/touchscreen/
A Diqs7211.c481 int reg_width; member
507 .reg_width = 5,
528 .reg_width = 4,
549 .reg_width = 5,
567 .reg_width = 8,
579 .reg_width = 8,
621 .reg_width = 8,
631 .reg_width = 8,
727 .reg_width = 8,
747 .reg_width = 8,
[all …]
/drivers/pinctrl/renesas/
A Dgpio.c60 return sh_pfc_read_raw_reg(mem, dreg->reg_width); in gpio_read_data_reg()
69 sh_pfc_write_raw_reg(mem, dreg->reg_width, value); in gpio_write_data_reg()
81 for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) { in gpio_setup_data_reg()
82 for (bit = 0; bit < dreg->reg_width; bit++) { in gpio_setup_data_reg()
103 for (i = 0; pfc->info->data_regs[i].reg_width; ++i) in gpio_setup_data_regs()
111 for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) { in gpio_setup_data_regs()
155 pos = reg->info->reg_width - (bit + 1); in gpio_pin_set_value()
187 pos = reg->info->reg_width - (bit + 1); in gpio_pin_get()
A Dcore.c141 switch (reg_width) { in sh_pfc_read_raw_reg()
157 switch (reg_width) { in sh_pfc_write_raw_reg()
214 *posp = crp->reg_width; in sh_pfc_config_reg_helper()
237 data = sh_pfc_read_raw_reg(mapped_reg, crp->reg_width); in sh_pfc_write_config_reg()
254 unsigned int r_width = config_reg->reg_width; in sh_pfc_get_config_reg()
884 GENMASK(cfg_reg->reg_width - 1, 0)); in sh_pfc_check_cfg_reg()
888 n = (cfg_reg->reg_width / fw) << fw; in sh_pfc_check_cfg_reg()
914 if (rw != cfg_reg->reg_width) in sh_pfc_check_cfg_reg()
916 cfg_reg->reg, rw, cfg_reg->reg_width); in sh_pfc_check_cfg_reg()
1241 GENMASK(info->data_regs[i].reg_width - 1, 0)); in sh_pfc_check_info()
[all …]
A Dcore.h23 u32 sh_pfc_read_raw_reg(void __iomem *mapped_reg, unsigned int reg_width);
24 void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned int reg_width,
/drivers/dma/dw/
A Dcore.c627 unsigned int reg_width; in dwc_prep_slave_sg() local
644 reg_width = __ffs(sconfig->dst_addr_width); in dwc_prep_slave_sg()
647 | DWC_CTLL_DST_WIDTH(reg_width) in dwc_prep_slave_sg()
694 reg_width = __ffs(sconfig->src_addr_width); in dwc_prep_slave_sg()
697 | DWC_CTLL_SRC_WIDTH(reg_width) in dwc_prep_slave_sg()
803 u32 reg_width, max_width; in dwc_verify_p_buswidth() local
806 reg_width = dwc->dma_sconfig.dst_addr_width; in dwc_verify_p_buswidth()
816 reg_width = DMA_SLAVE_BUSWIDTH_1_BYTE; in dwc_verify_p_buswidth()
817 else if (!is_power_of_2(reg_width) || reg_width > max_width) in dwc_verify_p_buswidth()
835 u32 reg_width, reg_burst, mem_width; in dwc_verify_m_buswidth() local
[all …]
/drivers/tty/serial/8250/
A D8250_dfl.c56 u32 reg_width; in dfl_uart_get_params() local
91 reg_width = FIELD_GET(DFHv1_PARAM_REG_LAYOUT_WIDTH, reg_layout); in dfl_uart_get_params()
92 switch (reg_width) { in dfl_uart_get_params()
102 return dev_err_probe(dev, -EINVAL, "unsupported reg-width %u\n", reg_width); in dfl_uart_get_params()
/drivers/clk/stm32/
A Dreset-stm32.c38 int reg_width = sizeof(u32); in stm32_get_reset_line() local
39 int bank = id / (reg_width * BITS_PER_BYTE); in stm32_get_reset_line()
40 int offset = id % (reg_width * BITS_PER_BYTE); in stm32_get_reset_line()
42 line->offset = bank * reg_width; in stm32_get_reset_line()
/drivers/ssb/
A Dhost_soc.c42 size_t count, u16 offset, u8 reg_width) in ssb_host_soc_block_read() argument
50 switch (reg_width) { in ssb_host_soc_block_read()
115 size_t count, u16 offset, u8 reg_width) in ssb_host_soc_block_write() argument
123 switch (reg_width) { in ssb_host_soc_block_write()
A Dsdio.c298 size_t count, u16 offset, u8 reg_width) in ssb_sdio_block_read() argument
313 switch (reg_width) { in ssb_sdio_block_read()
337 bus->sdio_sbaddr >> 16, offset, reg_width, saved_count, error); in ssb_sdio_block_read()
405 size_t count, u16 offset, u8 reg_width) in ssb_sdio_block_write() argument
419 switch (reg_width) { in ssb_sdio_block_write()
443 bus->sdio_sbaddr >> 16, offset, reg_width, saved_count, error); in ssb_sdio_block_write()
/drivers/bcma/
A Dhost_soc.c51 size_t count, u16 offset, u8 reg_width) in bcma_host_soc_block_read() argument
55 switch (reg_width) { in bcma_host_soc_block_read()
95 size_t count, u16 offset, u8 reg_width) in bcma_host_soc_block_write() argument
99 switch (reg_width) { in bcma_host_soc_block_write()
A Dhost_pci.c83 size_t count, u16 offset, u8 reg_width) in bcma_host_pci_block_read() argument
88 switch (reg_width) { in bcma_host_pci_block_read()
107 u16 offset, u8 reg_width) in bcma_host_pci_block_write() argument
112 switch (reg_width) { in bcma_host_pci_block_write()
/drivers/dma/
A Dat_hdmac.c1261 unsigned int reg_width; in atc_prep_slave_sg() local
1289 ctrla |= FIELD_PREP(ATC_DST_WIDTH, reg_width); in atc_prep_slave_sg()
1337 ctrla |= FIELD_PREP(ATC_SRC_WIDTH, reg_width); in atc_prep_slave_sg()
1374 len >> reg_width; in atc_prep_slave_sg()
1409 if (period_len > (ATC_BTSIZE_MAX << reg_width)) in atc_dma_cyclic_check_values()
1428 unsigned int reg_width, size_t period_len, in atc_dma_cyclic_fill_desc() argument
1475 FIELD_PREP(ATC_DST_WIDTH, reg_width) | in atc_dma_cyclic_fill_desc()
1476 FIELD_PREP(ATC_SRC_WIDTH, reg_width) | in atc_dma_cyclic_fill_desc()
1477 period_len >> reg_width; in atc_dma_cyclic_fill_desc()
1502 unsigned int reg_width; in atc_prep_dma_cyclic() local
[all …]
A Dtxx9dmac.c352 sai = ds->reg_width; in txx9dmac_dostart()
356 dai = ds->reg_width; in txx9dmac_dostart()
373 sai = ds->reg_width; in txx9dmac_dostart()
377 dai = ds->reg_width; in txx9dmac_dostart()
817 BUG_ON(!ds || !ds->reg_width); in txx9dmac_prep_slave_sg()
860 sai = ds->reg_width; in txx9dmac_prep_slave_sg()
864 dai = ds->reg_width; in txx9dmac_prep_slave_sg()
1014 TXX9_DMA_CCR_XFSZ(__ffs(ds->reg_width)); in txx9dmac_alloc_chan_resources()
/drivers/gpio/
A Dgpio-htc-egpio.c295 if ((pdata->reg_width != 8) && (pdata->reg_width != 16)) in egpio_probe()
298 ei->reg_shift = fls(pdata->reg_width - 1); in egpio_probe()
301 ei->reg_mask = (1 << pdata->reg_width) - 1; in egpio_probe()
/drivers/usb/serial/
A Dxr_serial.c112 int reg_width; member
152 .reg_width = 8,
174 .reg_width = 16,
197 .reg_width = 12,
217 .reg_width = 16,
272 if (type->reg_width == 8) in xr_get_reg()
518 state = GENMASK(type->reg_width - 1, 0); in xr_break_ctl()
/drivers/dma/dw-axi-dmac/
A Ddw-axi-dmac-platform.c402 u32 reg_width, val; in dw_axi_dma_set_byte_halfword() local
409 reg_width = __ffs(chan->config.dst_addr_width); in dw_axi_dma_set_byte_halfword()
410 if (reg_width == DWAXIDMAC_TRANS_WIDTH_16) in dw_axi_dma_set_byte_halfword()
654 unsigned int reg_width; in dw_axi_dma_set_hw_desc() local
675 reg_width = __ffs(chan->config.dst_addr_width); in dw_axi_dma_set_hw_desc()
677 ctllo = reg_width << CH_CTL_L_DST_WIDTH_POS | in dw_axi_dma_set_hw_desc()
684 reg_width = __ffs(chan->config.src_addr_width); in dw_axi_dma_set_hw_desc()
686 ctllo = reg_width << CH_CTL_L_SRC_WIDTH_POS | in dw_axi_dma_set_hw_desc()
690 block_ts = len >> reg_width; in dw_axi_dma_set_hw_desc()
738 u32 data_width, reg_width, mem_width; in calculate_block_len() local
[all …]
/drivers/scsi/qla2xxx/
A Dqla_tmpl.h84 uint8_t reg_width; member
98 uint8_t reg_width; member
/drivers/pwm/
A Dpwm-mediatek.c148 u32 clkdiv = 0, cnt_period, cnt_duty, reg_width = PWMDWIDTH, in pwm_mediatek_config() local
194 reg_width = PWM45DWIDTH_FIXUP; in pwm_mediatek_config()
201 pwm_mediatek_writel(pc, pwm->hwpwm, reg_width, cnt_period - 1); in pwm_mediatek_config()

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