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Searched refs:regbase (Results 1 – 25 of 49) sorted by relevance

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/drivers/video/fbdev/
A Dwmt_ge_rops.c42 static void __iomem *regbase; variable
100 writel(pat, regbase + GE_PAT0C_OFF); in wmt_ge_fillrect()
101 writel(1, regbase + GE_COMMAND_OFF); in wmt_ge_fillrect()
103 writel(1, regbase + GE_FIRE_OFF); in wmt_ge_fillrect()
134 writel(0xcc, regbase + GE_ROPCODE_OFF); in wmt_ge_copyarea()
135 writel(1, regbase + GE_COMMAND_OFF); in wmt_ge_copyarea()
136 writel(1, regbase + GE_FIRE_OFF); in wmt_ge_copyarea()
160 if (unlikely(regbase)) { in wmt_ge_rops_probe()
166 if (regbase == NULL) { in wmt_ge_rops_probe()
171 writel(1, regbase + GE_ENABLE_OFF); in wmt_ge_rops_probe()
[all …]
A Dcirrusfb.c356 u8 __iomem *regbase; member
413 caddr_t regbase,
663 u8 __iomem *regbase = cinfo->regbase; in cirrusfb_set_par_foo() local
1865 u8 __iomem *regbase) in cirrusfb_get_memsize() argument
1953 iounmap(cinfo->regbase); in cirrusfb_zorro_unmap()
2119 cinfo->regbase = NULL; in cirrusfb_pci_register()
2257 cinfo->regbase = regbase > 16 * MB_ ? ioremap(regbase, 64 * 1024) in cirrusfb_zorro_register()
2259 if (!cinfo->regbase) { in cirrusfb_zorro_register()
2301 if (regbase > 16 * MB_) in cirrusfb_zorro_register()
2302 iounmap(cinfo->regbase); in cirrusfb_zorro_register()
[all …]
A Dwm8505fb.c38 void __iomem *regbase; member
51 writel(0, fbi->regbase + i); in wm8505fb_init_hw()
70 writel(0xf, fbi->regbase + WMT_GOVR_FHI); in wm8505fb_init_hw()
71 writel(4, fbi->regbase + WMT_GOVR_DVO_SET); in wm8505fb_init_hw()
92 writel(0, fbi->regbase + WMT_GOVR_TG); in wm8505fb_set_timing()
104 writel(1, fbi->regbase + WMT_GOVR_TG); in wm8505fb_set_timing()
146 fbi->regbase + WMT_GOVR_CONTRAST); in wm8505fb_set_par()
228 writel(var->xoffset, fbi->regbase + WMT_GOVR_XPAN); in wm8505fb_pan_display()
303 if (IS_ERR(fbi->regbase)) in wm8505fb_probe()
304 return PTR_ERR(fbi->regbase); in wm8505fb_probe()
[all …]
A Dvt8500lcdfb.c112 control0 = readl(fbi->regbase) & ~0xf; in vt8500lcd_set_par()
113 writel(0, fbi->regbase); in vt8500lcd_set_par()
114 while (readl(fbi->regbase + 0x38) & 0x10) in vt8500lcd_set_par()
126 writel(0x80000000, fbi->regbase + 0x20); in vt8500lcd_set_par()
210 | (off >> 2), fbi->regbase + 0x20); in vt8500lcd_pan_display()
264 writel(0xffffffff, fbi->regbase + 0x38); in vt8500lcd_handle_irq()
329 if (fbi->regbase == NULL) { in vt8500lcd_probe()
423 writel(readl(fbi->regbase) | 1, fbi->regbase); in vt8500lcd_probe()
436 iounmap(fbi->regbase); in vt8500lcd_probe()
450 writel(0, fbi->regbase); in vt8500lcd_remove()
[all …]
/drivers/video/fbdev/core/
A Dsvgalib.c101 vga_r(regbase, 0x3DA); in svga_set_default_atc_regs()
102 vga_w(regbase, VGA_ATT_W, 0x00); in svga_set_default_atc_regs()
106 svga_wattr(regbase, count, count); in svga_set_default_atc_regs()
115 vga_r(regbase, 0x3DA); in svga_set_default_atc_regs()
116 vga_w(regbase, VGA_ATT_W, 0x20); in svga_set_default_atc_regs()
160 vga_r(regbase, 0x3DA); in svga_set_textmode_vga_regs()
161 vga_w(regbase, VGA_ATT_W, 0x00); in svga_set_textmode_vga_regs()
166 vga_r(regbase, 0x3DA); in svga_set_textmode_vga_regs()
167 vga_w(regbase, VGA_ATT_W, 0x20); in svga_set_textmode_vga_regs()
336 vga_wcrt(regbase, 0x0E, pos >> 8); in svga_tilecursor()
[all …]
/drivers/rtc/
A Drtc-sh.c89 void __iomem *regbase; member
104 tmp = readb(rtc->regbase + RCR1); in sh_rtc_alarm()
107 writeb(tmp, rtc->regbase + RCR1); in sh_rtc_alarm()
124 tmp = readb(rtc->regbase + RCR1); in sh_rtc_alarm_irq_enable()
131 writeb(tmp, rtc->regbase + RCR1); in sh_rtc_alarm_irq_enable()
151 tmp = readb(rtc->regbase + RCR1); in sh_rtc_read_time()
203 tmp = readb(rtc->regbase + RCR2); in sh_rtc_set_time()
206 writeb(tmp, rtc->regbase + RCR2); in sh_rtc_set_time()
225 tmp = readb(rtc->regbase + RCR2); in sh_rtc_set_time()
228 writeb(tmp, rtc->regbase + RCR2); in sh_rtc_set_time()
[all …]
A Drtc-vt8500.c73 void __iomem *regbase; member
88 isr = readl(vt8500_rtc->regbase + VT8500_RTC_IS); in vt8500_rtc_irq()
89 writel(isr, vt8500_rtc->regbase + VT8500_RTC_IS); in vt8500_rtc_irq()
129 vt8500_rtc->regbase + VT8500_RTC_DS); in vt8500_rtc_set_time()
134 vt8500_rtc->regbase + VT8500_RTC_TS); in vt8500_rtc_set_time()
145 isr = readl(vt8500_rtc->regbase + VT8500_RTC_IS); in vt8500_rtc_read_alarm()
167 vt8500_rtc->regbase + VT8500_RTC_AS); in vt8500_rtc_set_alarm()
212 if (IS_ERR(vt8500_rtc->regbase)) in vt8500_rtc_probe()
213 return PTR_ERR(vt8500_rtc->regbase); in vt8500_rtc_probe()
217 vt8500_rtc->regbase + VT8500_RTC_CR); in vt8500_rtc_probe()
[all …]
/drivers/clocksource/
A Dtimer-vt8500.c41 static void __iomem *regbase; variable
46 writel(3, regbase + TIMER_CTRL_VAL); in vt8500_timer_read()
50 return readl(regbase + TIMER_COUNT_VAL); in vt8500_timer_read()
74 writel(1, regbase + TIMER_IER_VAL); in vt8500_timer_set_next_event()
81 writel(readl(regbase + TIMER_CTRL_VAL) | 1, regbase + TIMER_CTRL_VAL); in vt8500_shutdown()
82 writel(0, regbase + TIMER_IER_VAL); in vt8500_shutdown()
98 writel(0xf, regbase + TIMER_STATUS_VAL); in vt8500_timer_interrupt()
108 regbase = of_iomap(np, 0); in vt8500_timer_init()
109 if (!regbase) { in vt8500_timer_init()
122 writel(1, regbase + TIMER_CTRL_VAL); in vt8500_timer_init()
[all …]
A Dtimer-ti-dm-systimer.c365 u8 regbase; in dmtimer_systimer_setup() local
399 regbase = 0; in dmtimer_systimer_setup()
403 regbase = OMAP_TIMER_V2_FUNC_OFFSET; in dmtimer_systimer_setup()
404 t->pend = regbase + _OMAP_TIMER_WRITE_PEND_OFFSET; in dmtimer_systimer_setup()
408 t->load = regbase + _OMAP_TIMER_LOAD_OFFSET; in dmtimer_systimer_setup()
409 t->counter = regbase + _OMAP_TIMER_COUNTER_OFFSET; in dmtimer_systimer_setup()
410 t->ctrl = regbase + _OMAP_TIMER_CTRL_OFFSET; in dmtimer_systimer_setup()
411 t->wakeup = regbase + _OMAP_TIMER_WAKEUP_EN_OFFSET; in dmtimer_systimer_setup()
412 t->ifctrl = regbase + _OMAP_TIMER_IF_CTRL_OFFSET; in dmtimer_systimer_setup()
/drivers/spi/
A Dspi-rockchip-sfc.c176 void __iomem *regbase; member
242 reg = readl(sfc->regbase + SFC_IMR); in rockchip_sfc_irq_unmask()
244 writel(reg, sfc->regbase + SFC_IMR); in rockchip_sfc_irq_unmask()
252 reg = readl(sfc->regbase + SFC_IMR); in rockchip_sfc_irq_mask()
254 writel(reg, sfc->regbase + SFC_IMR); in rockchip_sfc_irq_mask()
259 writel(0, sfc->regbase + SFC_CTRL); in rockchip_sfc_init()
379 writel(cmd, sfc->regbase + SFC_CMD); in rockchip_sfc_xfer_setup()
411 writel(tmp, sfc->regbase + SFC_DATA); in rockchip_sfc_write_fifo()
596 reg = readl(sfc->regbase + SFC_RISR); in rockchip_sfc_irq_handler()
635 if (IS_ERR(sfc->regbase)) in rockchip_sfc_probe()
[all …]
A Dspi-hisi-sfc-v3xx.c77 void __iomem *regbase; member
86 writel(0, host->regbase + HISI_SFC_V3XX_INT_MASK); in hisi_sfc_v3xx_disable_int()
108 reg = readl(host->regbase + HISI_SFC_V3XX_RAW_INT_STAT); in hisi_sfc_v3xx_handle_completion()
204 from = host->regbase + HISI_SFC_V3XX_CMD_DATABUF0; in hisi_sfc_v3xx_read_databuf()
241 to = host->regbase + HISI_SFC_V3XX_CMD_DATABUF0; in hisi_sfc_v3xx_write_databuf()
312 writel(config, host->regbase + HISI_SFC_V3XX_CMD_CFG); in hisi_sfc_v3xx_start_bus()
382 reg = readl(host->regbase + HISI_SFC_V3XX_INT_STAT); in hisi_sfc_v3xx_isr()
453 host->regbase = devm_platform_ioremap_resource(pdev, 0); in hisi_sfc_v3xx_probe()
454 if (IS_ERR(host->regbase)) { in hisi_sfc_v3xx_probe()
455 ret = PTR_ERR(host->regbase); in hisi_sfc_v3xx_probe()
[all …]
/drivers/gpio/
A Dgpio-pxa.c65 void __iomem *regbase; member
164 return bank->regbase; in gpio_bank_base()
371 bank->regbase = regbase + BANK_OFF(i); in pxa_init_gpio_chip()
388 writel_relaxed(grer, c->regbase + GRER_OFFSET); in update_edge_detect()
389 writel_relaxed(gfer, c->regbase + GFER_OFFSET); in update_edge_detect()
412 gpdr = readl_relaxed(c->regbase + GPDR_OFFSET); in pxa_gpio_irq_type()
447 gedr = readl_relaxed(c->regbase + GEDR_OFFSET); in pxa_gpio_demux_handler()
449 writel_relaxed(gedr, c->regbase + GEDR_OFFSET); in pxa_gpio_demux_handler()
674 writel_relaxed(0, c->regbase + GFER_OFFSET); in pxa_gpio_probe()
675 writel_relaxed(0, c->regbase + GRER_OFFSET); in pxa_gpio_probe()
[all …]
A Dgpio-f7188x.c88 unsigned int regbase; member
182 .regbase = _regbase, \
301 dir = superio_inb(sio->addr, f7188x_gpio_dir(bank->regbase)); in f7188x_gpio_get_direction()
326 dir = superio_inb(sio->addr, f7188x_gpio_dir(bank->regbase)); in f7188x_gpio_direction_in()
332 superio_outb(sio->addr, f7188x_gpio_dir(bank->regbase), dir); in f7188x_gpio_direction_in()
351 dir = superio_inb(sio->addr, f7188x_gpio_dir(bank->regbase)); in f7188x_gpio_get()
356 data = superio_inb(sio->addr, f7188x_gpio_data_in(bank->regbase)); in f7188x_gpio_get()
383 dir = superio_inb(sio->addr, f7188x_gpio_dir(bank->regbase)); in f7188x_gpio_direction_out()
388 superio_outb(sio->addr, f7188x_gpio_dir(bank->regbase), dir); in f7188x_gpio_direction_out()
439 data = superio_inb(sio->addr, f7188x_gpio_out_mode(bank->regbase)); in f7188x_gpio_set_config()
[all …]
/drivers/comedi/drivers/
A Dcomedi_8255.c44 int dir, int port, int data, unsigned long regbase) in subdev_8255_io() argument
47 outb(data, dev->iobase + regbase + port); in subdev_8255_io()
50 return inb(dev->iobase + regbase + port); in subdev_8255_io()
56 int dir, int port, int data, unsigned long regbase) in subdev_8255_mmio() argument
59 writeb(data, dev->mmio + regbase + port); in subdev_8255_mmio()
62 return readb(dev->mmio + regbase + port); in subdev_8255_mmio()
190 unsigned long regbase) in subdev_8255_io_init() argument
192 return __subdev_8255_init(dev, s, subdev_8255_io, regbase); in subdev_8255_io_init()
209 unsigned long regbase) in subdev_8255_mm_init() argument
211 return __subdev_8255_init(dev, s, subdev_8255_mmio, regbase); in subdev_8255_mm_init()
A D8255.c107 unsigned long regbase = subdev_8255_regbase(s); in dev_8255_detach() local
109 release_region(regbase, I8255_SIZE); in dev_8255_detach()
/drivers/mtd/spi-nor/controllers/
A Dhisi-sfc.c93 void __iomem *regbase; member
187 writel(reg, host->regbase + FMC_CMD); in hisi_spi_nor_op_reg()
190 writel(reg, host->regbase + FMC_DATA_NUM); in hisi_spi_nor_op_reg()
193 writel(reg, host->regbase + FMC_OP_CFG); in hisi_spi_nor_op_reg()
197 writel(reg, host->regbase + FMC_OP); in hisi_spi_nor_op_reg()
237 reg = readl(host->regbase + FMC_CFG); in hisi_spi_nor_dma_transfer()
242 writel(reg, host->regbase + FMC_CFG); in hisi_spi_nor_dma_transfer()
256 writel(reg, host->regbase + FMC_OP_CFG); in hisi_spi_nor_dma_transfer()
263 writel(reg, host->regbase + FMC_OP_DMA); in hisi_spi_nor_dma_transfer()
435 if (IS_ERR(host->regbase)) in hisi_spi_nor_probe()
[all …]
/drivers/clk/uniphier/
A Dclk-uniphier-cpugear.c21 unsigned int regbase; member
35 gear->regbase + UNIPHIER_CLK_CPUGEAR_SET, in uniphier_clk_cpugear_set_parent()
41 gear->regbase + UNIPHIER_CLK_CPUGEAR_UPD, in uniphier_clk_cpugear_set_parent()
48 gear->regbase + UNIPHIER_CLK_CPUGEAR_UPD, in uniphier_clk_cpugear_set_parent()
61 gear->regbase + UNIPHIER_CLK_CPUGEAR_STAT, &val); in uniphier_clk_cpugear_get_parent()
96 gear->regbase = data->regbase; in uniphier_clk_register_cpugear()
/drivers/ufs/host/
A Dti-j721e-ufs.c22 void __iomem *regbase; in ti_j721e_ufs_probe() local
27 regbase = devm_platform_ioremap_resource(pdev, 0); in ti_j721e_ufs_probe()
28 if (IS_ERR(regbase)) in ti_j721e_ufs_probe()
29 return PTR_ERR(regbase); in ti_j721e_ufs_probe()
50 writel(reg, regbase + TI_UFS_SS_CTRL); in ti_j721e_ufs_probe()
/drivers/clk/socfpga/
A Dclk-gate-s10.c127 struct clk_hw *s10_register_gate(const struct stratix10_gate_clock *clks, void __iomem *regbase) in s10_register_gate() argument
139 socfpga_clk->hw.reg = regbase + clks->gate_reg; in s10_register_gate()
148 socfpga_clk->div_reg = regbase + clks->div_reg; in s10_register_gate()
156 socfpga_clk->bypass_reg = regbase + clks->bypass_reg; in s10_register_gate()
185 struct clk_hw *agilex_register_gate(const struct stratix10_gate_clock *clks, void __iomem *regbase) in agilex_register_gate() argument
197 socfpga_clk->hw.reg = regbase + clks->gate_reg; in agilex_register_gate()
206 socfpga_clk->div_reg = regbase + clks->div_reg; in agilex_register_gate()
214 socfpga_clk->bypass_reg = regbase + clks->bypass_reg; in agilex_register_gate()
A Dclk-periph-s10.c138 void __iomem *regbase) in n5x_register_periph() argument
151 periph_clk->hw.reg = regbase + clks->offset; in n5x_register_periph()
173 void __iomem *regbase) in s10_register_cnt_periph() argument
187 periph_clk->hw.reg = regbase + clks->offset; in s10_register_cnt_periph()
192 periph_clk->bypass_reg = regbase + clks->bypass_reg; in s10_register_cnt_periph()
/drivers/clk/at91/
A Dsckc.c372 void __iomem *regbase = of_iomap(np, 0); in at91sam9x5_sckc_register() local
383 if (!regbase) in at91sam9x5_sckc_register()
386 slow_rc = at91_clk_register_slow_rc_osc(regbase, "slow_rc_osc", in at91sam9x5_sckc_register()
412 slow_osc = at91_clk_register_slow_osc(regbase, "slow_osc", in at91sam9x5_sckc_register()
473 void __iomem *regbase = of_iomap(np, 0); in of_sam9x60_sckc_setup() local
484 if (!regbase) in of_sam9x60_sckc_setup()
499 slow_osc = at91_clk_register_slow_osc(regbase, "slow_osc", in of_sam9x60_sckc_setup()
588 void __iomem *regbase = of_iomap(np, 0); in of_sama5d4_sckc_setup() local
599 if (!regbase) in of_sama5d4_sckc_setup()
625 osc->sckcr = regbase; in of_sama5d4_sckc_setup()
[all …]
/drivers/pinctrl/
A Dpinctrl-at91.c57 void __iomem *regbase; member
366 return gpio_chips[bank]->regbase; in pin_to_controller()
1420 void __iomem *pio = at91_gpio->regbase; in at91_gpio_get_direction()
1434 void __iomem *pio = at91_gpio->regbase; in at91_gpio_direction_input()
1444 void __iomem *pio = at91_gpio->regbase; in at91_gpio_get()
1455 void __iomem *pio = at91_gpio->regbase; in at91_gpio_set()
1467 void __iomem *pio = at91_gpio->regbase; in at91_gpio_set_multiple()
1484 void __iomem *pio = at91_gpio->regbase; in at91_gpio_direction_output()
1711 pio = at91_gpio->regbase; in gpio_irq_handler()
1848 if (IS_ERR(at91_chip->regbase)) in at91_gpio_probe()
[all …]
/drivers/platform/x86/amd/pmf/
A Dcore.c157 return ioread32(dev->regbase + reg_offset); in amd_pmf_reg_read()
162 iowrite32(val, dev->regbase + reg_offset); in amd_pmf_reg_write()
201 rc = readx_poll_timeout(ioread32, dev->regbase + AMD_PMF_REGISTER_RESPONSE, in amd_pmf_send_cmd()
219 rc = readx_poll_timeout(ioread32, dev->regbase + AMD_PMF_REGISTER_RESPONSE, in amd_pmf_send_cmd()
462 dev->regbase = devm_ioremap(dev->dev, base_addr + AMD_PMF_BASE_ADDR_OFFSET, in amd_pmf_probe()
464 if (!dev->regbase) in amd_pmf_probe()
/drivers/iommu/
A Domap-iommu.h56 void __iomem *regbase; member
258 return __raw_readl(obj->regbase + offs); in iommu_read_reg()
263 __raw_writel(val, obj->regbase + offs); in iommu_write_reg()
/drivers/video/
A Dvgastate.c34 static inline unsigned char vga_rcrtcs(void __iomem *regbase, unsigned short iobase, in vga_rcrtcs() argument
37 vga_w(regbase, iobase + 0x4, reg); in vga_rcrtcs()
38 return vga_r(regbase, iobase + 0x5); in vga_rcrtcs()
41 static inline void vga_wcrtcs(void __iomem *regbase, unsigned short iobase, in vga_wcrtcs() argument
44 vga_w(regbase, iobase + 0x4, reg); in vga_wcrtcs()
45 vga_w(regbase, iobase + 0x5, val); in vga_wcrtcs()

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