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/drivers/clk/xilinx/
A D	clk-xlnx-clock-wizard.c	986 u32 regl, regh, edge, regld, reghd, edged, div; in clk_wzrd_register_output_clocks() local 1076 regld = (readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 21)) & in clk_wzrd_register_output_clocks() 1080 div = (regld + reghd + edged); in clk_wzrd_register_output_clocks()

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