Searched refs:regval1 (Results 1 – 3 of 3) sorted by relevance
| /drivers/clk/xilinx/ |
| A D | clk-xlnx-clock-wizard.c | 249 regval1 = readl(div_addr); in clk_wzrd_ver_dynamic_reconfig()
250 regval1 |= WZRD_CLKFBOUT_PREDIV2; in clk_wzrd_ver_dynamic_reconfig()
251 regval1 = regval1 & ~(WZRD_CLKFBOUT_EDGE | WZRD_P5EN | WZRD_P5FEDGE); in clk_wzrd_ver_dynamic_reconfig()
258 regval1 = regval1 | p5en << WZRD_P5EN_SHIFT | p5fedge << WZRD_P5FEDGE_SHIFT; in clk_wzrd_ver_dynamic_reconfig()
259 writel(regval1, div_addr); in clk_wzrd_ver_dynamic_reconfig()
456 regval1 |= WZRD_MULT_PREDIV2; in clk_wzrd_dynamic_ver_all_nolock()
458 regval1 = regval1 | WZRD_CLKFBOUT_EDGE; in clk_wzrd_dynamic_ver_all_nolock()
460 regval1 = regval1 & ~WZRD_CLKFBOUT_EDGE; in clk_wzrd_dynamic_ver_all_nolock()
481 regval1 |= WZRD_CLKFBOUT_PREDIV2; in clk_wzrd_dynamic_ver_all_nolock()
482 regval1 = regval1 & ~(WZRD_CLKFBOUT_EDGE | WZRD_P5EN | WZRD_P5FEDGE); in clk_wzrd_dynamic_ver_all_nolock()
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| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| A D | dcn10_cm_common.c | 54 const uint16_t *regval1 = &(regval[(2 * i) + 1]); in cm_helper_program_color_matrices() local
58 csc_c12, *regval1); in cm_helper_program_color_matrices()
69 uint32_t cur_csc_reg, regval0, regval1; in cm_helper_read_color_matrices() local
76 csc_c12, ®val1); in cm_helper_read_color_matrices()
79 regval[(2 * i) + 1] = regval1; in cm_helper_read_color_matrices()
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| /drivers/media/dvb-frontends/ |
| A D | lgdt3306a.c | 2095 static u8 regval1[numDumpRegs] = {0, }; variable
2116 lgdt3306a_read_reg(state, regtab[i], ®val1[i]); in lgdt3306a_DumpRegs()
2117 if (regval1[i] != regval2[i]) { in lgdt3306a_DumpRegs()
2118 lg_debug(" %04X = %02X\n", regtab[i], regval1[i]); in lgdt3306a_DumpRegs()
2119 regval2[i] = regval1[i]; in lgdt3306a_DumpRegs()
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