| /drivers/gpu/drm/radeon/ |
| A D | r600_cs.c | 969 struct radeon_bo_list *reloc; in r600_cs_check_reg() local 1294 track->db_bo = reloc->robj; in r600_cs_check_reg() 1629 struct radeon_bo_list *reloc; in r600_packet3_check() local 1673 offset = reloc->gpu_offset + in r600_packet3_check() 1714 offset = reloc->gpu_offset + in r600_packet3_check() 1766 offset = reloc->gpu_offset + in r600_packet3_check() 1900 offset = reloc->gpu_offset + in r600_packet3_check() 1972 texture = reloc->robj; in r600_packet3_check() 1980 mipmap = reloc->robj; in r600_packet3_check() 1985 reloc->tiling_flags); in r600_packet3_check() [all …]
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| A D | evergreen_cs.c | 1098 struct radeon_bo_list *reloc; in evergreen_cs_handle_reg() local 1776 struct radeon_bo_list *reloc; in evergreen_packet3_check() local 1820 offset = reloc->gpu_offset + in evergreen_packet3_check() 1866 offset = reloc->gpu_offset + in evergreen_packet3_check() 1901 offset = reloc->gpu_offset + in evergreen_packet3_check() 1929 offset = reloc->gpu_offset + in evergreen_packet3_check() 2271 offset = reloc->gpu_offset + in evergreen_packet3_check() 2293 offset = reloc->gpu_offset + in evergreen_packet3_check() 2378 texture = reloc->robj; in evergreen_packet3_check() 2399 mipmap = reloc->robj; in evergreen_packet3_check() [all …]
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| A D | r200.c | 149 struct radeon_bo_list *reloc; in r200_packet0_check() local 181 r = radeon_cs_packet_next_reloc(p, &reloc, 0); in r200_packet0_check() 188 track->zb.robj = reloc->robj; in r200_packet0_check() 191 ib[idx] = idx_value + ((u32)reloc->gpu_offset); in r200_packet0_check() 194 r = radeon_cs_packet_next_reloc(p, &reloc, 0); in r200_packet0_check() 201 track->cb[0].robj = reloc->robj; in r200_packet0_check() 213 r = radeon_cs_packet_next_reloc(p, &reloc, 0); in r200_packet0_check() 228 ib[idx] = tmp + ((u32)reloc->gpu_offset); in r200_packet0_check() 231 track->textures[i].robj = reloc->robj; in r200_packet0_check() 266 r = radeon_cs_packet_next_reloc(p, &reloc, 0); in r200_packet0_check() [all …]
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| A D | r300.c | 631 struct radeon_bo_list *reloc; in r300_packet0_check() local 665 r = radeon_cs_packet_next_reloc(p, &reloc, 0); in r300_packet0_check() 672 track->cb[i].robj = reloc->robj; in r300_packet0_check() 678 r = radeon_cs_packet_next_reloc(p, &reloc, 0); in r300_packet0_check() 685 track->zb.robj = reloc->robj; in r300_packet0_check() 707 r = radeon_cs_packet_next_reloc(p, &reloc, 0); in r300_packet0_check() 726 tmp = idx_value + ((u32)reloc->gpu_offset); in r300_packet0_check() 730 track->textures[i].robj = reloc->robj; in r300_packet0_check() 1080 r = radeon_cs_packet_next_reloc(p, &reloc, 0); in r300_packet0_check() 1129 track->aa.robj = reloc->robj; in r300_packet0_check() [all …]
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| A D | r100.c | 1296 struct radeon_bo_list *reloc; in r100_reloc_pitch_offset() local 1309 tmp += (((u32)reloc->gpu_offset) >> 10); in r100_reloc_pitch_offset() 1335 struct radeon_bo_list *reloc; in r100_packet3_load_vbpntr() local 1363 track->arrays[i + 0].robj = reloc->robj; in r100_packet3_load_vbpntr() 1373 track->arrays[i + 1].robj = reloc->robj; in r100_packet3_load_vbpntr() 1584 struct radeon_bo_list *reloc; in r100_packet0_check() local 1624 track->zb.robj = reloc->robj; in r100_packet0_check() 1637 track->cb[0].robj = reloc->robj; in r100_packet0_check() 1664 track->textures[i].robj = reloc->robj; in r100_packet0_check() 1942 struct radeon_bo_list *reloc; in r100_packet3_check() local [all …]
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| A D | radeon_cs.c | 250 struct radeon_bo_list *reloc; in radeon_cs_sync_rings() local 253 list_for_each_entry(reloc, &p->validated, list) { in radeon_cs_sync_rings() 256 resv = reloc->robj->tbo.base.resv; in radeon_cs_sync_rings() 257 r = radeon_sync_resv(p->rdev, &p->ib.sync, resv, reloc->shared); in radeon_cs_sync_rings() 421 struct radeon_bo_list *reloc; in radeon_cs_parser_fini() local 434 list_for_each_entry(reloc, &parser->validated, list) { in radeon_cs_parser_fini() 435 dma_resv_add_fence(reloc->robj->tbo.base.resv, in radeon_cs_parser_fini() 437 reloc->shared ? in radeon_cs_parser_fini()
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| A D | radeon_uvd.c | 566 struct radeon_bo_list *reloc; in radeon_uvd_cs_reloc() local 580 reloc = &p->relocs[(idx / 4)]; in radeon_uvd_cs_reloc() 581 start = reloc->gpu_offset; in radeon_uvd_cs_reloc() 582 end = start + radeon_bo_size(reloc->robj); in radeon_uvd_cs_reloc() 626 r = radeon_uvd_cs_msg(p, reloc->robj, offset, buf_sizes); in radeon_uvd_cs_reloc()
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| A D | radeon_vce.c | 473 struct radeon_bo_list *reloc; in radeon_vce_cs_reloc() local 487 reloc = &p->relocs[(idx / 4)]; in radeon_vce_cs_reloc() 488 start = reloc->gpu_offset; in radeon_vce_cs_reloc() 489 end = start + radeon_bo_size(reloc->robj); in radeon_vce_cs_reloc()
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| /drivers/gpu/drm/qxl/ |
| A D | qxl_ioctl.c | 204 struct drm_qxl_reloc reloc; in qxl_process_single_command() local 207 if (copy_from_user(&reloc, u + i, sizeof(reloc))) { in qxl_process_single_command() 214 if (reloc.reloc_type != QXL_RELOC_TYPE_BO && reloc.reloc_type != QXL_RELOC_TYPE_SURF) { in qxl_process_single_command() 215 DRM_DEBUG("unknown reloc type %d\n", reloc.reloc_type); in qxl_process_single_command() 220 reloc_info[i].type = reloc.reloc_type; in qxl_process_single_command() 222 if (reloc.dst_handle) { in qxl_process_single_command() 223 ret = qxlhw_handle_to_bo(file_priv, reloc.dst_handle, release, in qxl_process_single_command() 227 reloc_info[i].dst_offset = reloc.dst_offset; in qxl_process_single_command() 234 if (reloc.reloc_type == QXL_RELOC_TYPE_BO || reloc.src_handle) { in qxl_process_single_command() 235 ret = qxlhw_handle_to_bo(file_priv, reloc.src_handle, release, in qxl_process_single_command() [all …]
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| /drivers/gpu/host1x/ |
| A D | job.c | 158 reloc->target.bo = host1x_bo_get(reloc->target.bo); in pin_job() 159 if (!reloc->target.bo) { in pin_job() 164 bo = reloc->target.bo; in pin_job() 166 switch (reloc->flags & mask) { in pin_job() 289 reloc->target.offset) >> reloc->shift; in do_relocs() 293 if (cmdbuf != reloc->cmdbuf.bo) in do_relocs() 328 if (reloc->cmdbuf.bo != cmdbuf || reloc->cmdbuf.offset != offset) in check_reloc() 332 if (reloc->shift) in check_reloc() 343 struct host1x_reloc *reloc; member 368 fw->reloc++; in check_register() [all …]
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| /drivers/gpu/drm/i915/gem/ |
| A D | i915_gem_execbuffer.c | 1436 if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) { in eb_relocate_entry() 1440 reloc->target_handle, in eb_relocate_entry() 1441 (int) reloc->offset, in eb_relocate_entry() 1442 reloc->read_domains, in eb_relocate_entry() 1443 reloc->write_domain); in eb_relocate_entry() 1446 if (unlikely((reloc->write_domain | reloc->read_domains) in eb_relocate_entry() 1451 reloc->target_handle, in eb_relocate_entry() 1452 (int) reloc->offset, in eb_relocate_entry() 1453 reloc->read_domains, in eb_relocate_entry() 1498 (int)reloc->offset, in eb_relocate_entry() [all …]
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| /drivers/gpu/drm/i915/gt/ |
| A D | intel_renderstate.h | 18 const u32 *reloc; member 25 .reloc = gen ## _g ## _null_state_relocs, \
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| A D | intel_renderstate.c | 65 if (i * 4 == rodata->reloc[reloc_index]) { in render_state_setup() 84 if (rodata->reloc[reloc_index] != -1) { in render_state_setup()
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| /drivers/gpu/drm/tegra/ |
| A D | submit.c | 232 dma_addr_t iova = mapping->iova + buf->reloc.target_offset; in submit_write_reloc() 240 written_ptr = iova >> buf->reloc.shift; in submit_write_reloc() 242 if (buf->reloc.gather_offset_words >= bo->gather_data_words) { in submit_write_reloc() 245 buf->reloc.gather_offset_words, bo->gather_data_words); in submit_write_reloc() 249 buf->reloc.gather_offset_words = array_index_nospec(buf->reloc.gather_offset_words, in submit_write_reloc() 252 bo->gather_data[buf->reloc.gather_offset_words] = written_ptr; in submit_write_reloc()
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| A D | drm.c | 270 struct host1x_reloc *reloc; in tegra_drm_submit() local 279 reloc = &job->relocs[num_relocs]; in tegra_drm_submit() 280 obj = host1x_to_tegra_bo(reloc->cmdbuf.bo); in tegra_drm_submit() 288 if (reloc->cmdbuf.offset & 3 || in tegra_drm_submit() 289 reloc->cmdbuf.offset >= obj->gem.size) { in tegra_drm_submit() 294 obj = host1x_to_tegra_bo(reloc->target.bo); in tegra_drm_submit() 297 if (reloc->target.offset >= obj->gem.size) { in tegra_drm_submit()
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| /drivers/gpu/drm/nouveau/ |
| A D | nouveau_gem.c | 659 struct drm_nouveau_gem_pushbuf_reloc *reloc, in nouveau_gem_pushbuf_reloc_apply() argument 666 struct drm_nouveau_gem_pushbuf_reloc *r = &reloc[i]; in nouveau_gem_pushbuf_reloc_apply() 753 struct drm_nouveau_gem_pushbuf_reloc *reloc = NULL; in nouveau_gem_ioctl_pushbuf() local 835 if (!reloc) { in nouveau_gem_ioctl_pushbuf() 837 reloc = u_memcpya(req->relocs, req->nr_relocs, sizeof(*reloc)); in nouveau_gem_ioctl_pushbuf() 838 if (IS_ERR(reloc)) { in nouveau_gem_ioctl_pushbuf() 839 ret = PTR_ERR(reloc); in nouveau_gem_ioctl_pushbuf() 846 ret = nouveau_gem_pushbuf_reloc_apply(cli, req, reloc, bo); in nouveau_gem_ioctl_pushbuf() 957 if (!IS_ERR(reloc)) in nouveau_gem_ioctl_pushbuf() 958 u_free(reloc); in nouveau_gem_ioctl_pushbuf()
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| /drivers/gpu/drm/vmwgfx/ |
| A D | vmwgfx_execbuf.c | 1139 struct vmw_relocation *reloc; in vmw_translate_mob_ptr() local 1155 reloc = vmw_validation_mem_alloc(sw_context->ctx, sizeof(*reloc)); in vmw_translate_mob_ptr() 1156 if (!reloc) in vmw_translate_mob_ptr() 1159 reloc->mob_loc = id; in vmw_translate_mob_ptr() 1160 reloc->vbo = vmw_bo; in vmw_translate_mob_ptr() 1195 struct vmw_relocation *reloc; in vmw_translate_guest_ptr() local 1212 reloc = vmw_validation_mem_alloc(sw_context->ctx, sizeof(*reloc)); in vmw_translate_guest_ptr() 1213 if (!reloc) in vmw_translate_guest_ptr() 1216 reloc->location = ptr; in vmw_translate_guest_ptr() 1217 reloc->vbo = vmw_bo; in vmw_translate_guest_ptr() [all …]
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| /drivers/pci/ |
| A D | of_property.c | 55 u32 reg_num, u32 flags, bool reloc) in of_pci_set_address() argument 65 if (!reloc) { in of_pci_set_address()
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