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Searched refs:reset (Results 1 – 25 of 1458) sorted by relevance

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/drivers/accel/habanalabs/include/gaudi2/
A Dgaudi2_async_ids_map_extended.h27 int reset; member
32 { .fc_id = 0, .cpu_id = 0, .valid = 0, .msg = 0, .reset = EVENT_RESET_TYPE_NONE,
34 { .fc_id = 1, .cpu_id = 1, .valid = 0, .msg = 0, .reset = EVENT_RESET_TYPE_NONE,
36 { .fc_id = 2, .cpu_id = 2, .valid = 0, .msg = 0, .reset = EVENT_RESET_TYPE_NONE,
38 { .fc_id = 3, .cpu_id = 3, .valid = 0, .msg = 0, .reset = EVENT_RESET_TYPE_NONE,
40 { .fc_id = 4, .cpu_id = 4, .valid = 0, .msg = 0, .reset = EVENT_RESET_TYPE_NONE,
42 { .fc_id = 5, .cpu_id = 5, .valid = 0, .msg = 0, .reset = EVENT_RESET_TYPE_NONE,
44 { .fc_id = 6, .cpu_id = 6, .valid = 0, .msg = 0, .reset = EVENT_RESET_TYPE_NONE,
46 { .fc_id = 7, .cpu_id = 7, .valid = 0, .msg = 0, .reset = EVENT_RESET_TYPE_NONE,
48 { .fc_id = 8, .cpu_id = 8, .valid = 0, .msg = 0, .reset = EVENT_RESET_TYPE_NONE,
[all …]
/drivers/reset/
A DMakefile8 obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
9 obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
10 obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o
12 obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
15 obj-$(CONFIG_RESET_EYEQ) += reset-eyeq.o
16 obj-$(CONFIG_RESET_GPIO) += reset-gpio.o
17 obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o
19 obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
22 obj-$(CONFIG_RESET_K210) += reset-k210.o
23 obj-$(CONFIG_RESET_K230) += reset-k230.o
[all …]
A Dreset-sunplus.c162 sp_reset_assert(&reset->rcdev, 0); in sp_restart()
163 sp_reset_deassert(&reset->rcdev, 0); in sp_restart()
171 struct sp_reset *reset; in sp_reset_probe() local
175 reset = devm_kzalloc(dev, sizeof(*reset), GFP_KERNEL); in sp_reset_probe()
176 if (!reset) in sp_reset_probe()
180 if (IS_ERR(reset->base)) in sp_reset_probe()
181 return PTR_ERR(reset->base); in sp_reset_probe()
183 reset->rcdev.ops = &sp_reset_ops; in sp_reset_probe()
184 reset->rcdev.owner = THIS_MODULE; in sp_reset_probe()
185 reset->rcdev.of_node = dev->of_node; in sp_reset_probe()
[all …]
A DKconfig30 AR71xx SoC reset controller.
53 tristate "Broadcom STB reset controller"
70 bool "Mobileye EyeQ reset controller"
80 has multiple reset instances.
83 tristate "GPIO reset controller"
130 Say Y to control the reset signals provided by reset controller.
260 This enables a simple reset controller driver for reset lines that
283 tristate "SpacemiT reset driver"
354 called reset-tn48m.
390 source "drivers/reset/sti/Kconfig"
[all …]
A Dreset-th1520.c53 const struct th1520_reset_map *reset; in th1520_reset_assert() local
55 reset = &th1520_resets[id]; in th1520_reset_assert()
57 return regmap_update_bits(priv->map, reset->reg, reset->bit, 0); in th1520_reset_assert()
64 const struct th1520_reset_map *reset; in th1520_reset_deassert() local
66 reset = &th1520_resets[id]; in th1520_reset_deassert()
68 return regmap_update_bits(priv->map, reset->reg, reset->bit, in th1520_reset_deassert()
69 reset->bit); in th1520_reset_deassert()
A Dreset-gpio.c12 struct gpio_desc *reset; member
25 gpiod_set_value_cansleep(priv->reset, 1); in reset_gpio_assert()
35 gpiod_set_value_cansleep(priv->reset, 0); in reset_gpio_deassert()
44 return gpiod_get_value_cansleep(priv->reset); in reset_gpio_status()
80 priv->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); in reset_gpio_probe()
81 if (IS_ERR(priv->reset)) in reset_gpio_probe()
82 return dev_err_probe(dev, PTR_ERR(priv->reset), in reset_gpio_probe()
/drivers/power/reset/
A Dat91-reset.c140 : "r" (reset->ramc_base[0]), in at91_reset()
141 "r" (reset->ramc_base[1]), in at91_reset()
142 "r" (reset->rstc_base), in at91_reset()
146 "r" (reset->ramc_lpr) in at91_reset()
332 reset->rcdev.nr_resets = reset->data->n_device_reset; in at91_rcdev_init()
342 struct at91_reset *reset; in at91_reset_probe() local
346 reset = devm_kzalloc(&pdev->dev, sizeof(*reset), GFP_KERNEL); in at91_reset_probe()
347 if (!reset) in at91_reset_probe()
371 if (!reset->data) in at91_reset_probe()
375 reset->nb.priority = 192; in at91_reset_probe()
[all …]
/drivers/clk/visconti/
A Dreset.c31 spin_lock_irqsave(reset->lock, flags); in visconti_reset_assert()
82 .reset = visconti_reset_reset,
93 struct visconti_reset *reset; in visconti_register_reset_controller() local
95 reset = devm_kzalloc(dev, sizeof(*reset), GFP_KERNEL); in visconti_register_reset_controller()
96 if (!reset) in visconti_register_reset_controller()
99 reset->regmap = regmap; in visconti_register_reset_controller()
100 reset->resets = resets; in visconti_register_reset_controller()
101 reset->rcdev.ops = reset_ops; in visconti_register_reset_controller()
102 reset->rcdev.nr_resets = num_resets; in visconti_register_reset_controller()
103 reset->rcdev.of_node = dev->of_node; in visconti_register_reset_controller()
[all …]
/drivers/pmdomain/ti/
A Domap_prm.c765 v = readl_relaxed(reset->prm->base + reset->prm->data->rstctrl); in omap_reset_status()
773 v = readl_relaxed(reset->prm->base + reset->prm->data->rstst); in omap_reset_status()
789 v = readl_relaxed(reset->prm->base + reset->prm->data->rstctrl); in omap_reset_assert()
791 writel_relaxed(v, reset->prm->base + reset->prm->data->rstctrl); in omap_reset_assert()
820 writel_relaxed(v, reset->prm->base + reset->prm->data->rstst); in omap_reset_deassert()
828 v = readl_relaxed(reset->prm->base + reset->prm->data->rstctrl); in omap_reset_deassert()
830 writel_relaxed(v, reset->prm->base + reset->prm->data->rstctrl); in omap_reset_deassert()
902 reset = devm_kzalloc(&pdev->dev, sizeof(*reset), GFP_KERNEL); in omap_prm_reset_init()
903 if (!reset) in omap_prm_reset_init()
934 if ((v & reset->mask) != reset->mask) { in omap_prm_reset_init()
[all …]
/drivers/net/ethernet/meta/fbnic/
A Dfbnic_mac.c406 if (!reset) in __fbnic_mac_stat_rd64()
648 fbnic_mac_stat_rd64(fbd, reset, in fbnic_mac_get_eth_mac_stats()
659 fbnic_mac_stat_rd64(fbd, reset, in fbnic_mac_get_eth_mac_stats()
688 fbnic_mac_stat_rd64(fbd, reset, rmon_stats->jabbers, in fbnic_mac_get_rmon_stats()
691 fbnic_mac_stat_rd64(fbd, reset, rmon_stats->hist[0], in fbnic_mac_get_rmon_stats()
693 fbnic_mac_stat_rd64(fbd, reset, rmon_stats->hist[1], in fbnic_mac_get_rmon_stats()
695 fbnic_mac_stat_rd64(fbd, reset, rmon_stats->hist[2], in fbnic_mac_get_rmon_stats()
697 fbnic_mac_stat_rd64(fbd, reset, rmon_stats->hist[3], in fbnic_mac_get_rmon_stats()
699 fbnic_mac_stat_rd64(fbd, reset, rmon_stats->hist[4], in fbnic_mac_get_rmon_stats()
701 fbnic_mac_stat_rd64(fbd, reset, rmon_stats->hist[5], in fbnic_mac_get_rmon_stats()
[all …]
/drivers/clk/actions/
A Dowl-reset.c17 struct owl_reset *reset = to_owl_reset(rcdev); in owl_reset_assert() local
18 const struct owl_reset_map *map = &reset->reset_map[id]; in owl_reset_assert()
20 return regmap_update_bits(reset->regmap, map->reg, map->bit, 0); in owl_reset_assert()
26 struct owl_reset *reset = to_owl_reset(rcdev); in owl_reset_deassert() local
27 const struct owl_reset_map *map = &reset->reset_map[id]; in owl_reset_deassert()
29 return regmap_update_bits(reset->regmap, map->reg, map->bit, map->bit); in owl_reset_deassert()
45 struct owl_reset *reset = to_owl_reset(rcdev); in owl_reset_status() local
46 const struct owl_reset_map *map = &reset->reset_map[id]; in owl_reset_status()
50 ret = regmap_read(reset->regmap, map->reg, &reg); in owl_reset_status()
64 .reset = owl_reset_reset,
/drivers/gpu/drm/i915/gt/
A Dintel_reset.c770 reset_func reset; in __intel_gt_reset() local
775 if (!reset) in __intel_gt_reset()
800 if (!gt->i915->params.reset) in intel_has_gpu_reset()
841 if (engine->reset.prepare) in reset_prepare_engine()
936 if (engine->reset.finish) in reset_finish_engine()
1006 if (engine->reset.cancel) in __intel_gt_set_wedged()
1236 if (gt->i915->params.reset) in intel_gt_reset()
1515 &gt->reset.flags)) in intel_gt_handle_error()
1522 &gt->reset.flags); in intel_gt_handle_error()
1547 &gt->reset.flags)) in intel_gt_handle_error()
[all …]
/drivers/gpu/drm/i915/selftests/
A Digt_reset.c19 pr_debug("%s: current gpu_error=%08lx\n", __func__, gt->reset.flags); in igt_global_reset_lock()
21 while (test_and_set_bit(I915_RESET_BACKOFF, &gt->reset.flags)) in igt_global_reset_lock()
22 wait_event(gt->reset.queue, in igt_global_reset_lock()
23 !test_bit(I915_RESET_BACKOFF, &gt->reset.flags)); in igt_global_reset_lock()
27 &gt->reset.flags)) in igt_global_reset_lock()
28 wait_on_bit(&gt->reset.flags, I915_RESET_ENGINE + id, in igt_global_reset_lock()
39 clear_and_wake_up_bit(I915_RESET_ENGINE + id, &gt->reset.flags); in igt_global_reset_unlock()
41 clear_bit(I915_RESET_BACKOFF, &gt->reset.flags); in igt_global_reset_unlock()
42 wake_up_all(&gt->reset.queue); in igt_global_reset_unlock()
/drivers/video/backlight/
A Dlms283gf05.c21 struct gpio_desc *reset; member
130 if (st->reset) in lms283gf05_power_set()
131 lms283gf05_reset(st->reset); in lms283gf05_power_set()
135 if (st->reset) in lms283gf05_power_set()
136 gpiod_set_value(st->reset, 1); /* Asserted */ in lms283gf05_power_set()
157 st->reset = gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_LOW); in lms283gf05_probe()
158 if (IS_ERR(st->reset)) in lms283gf05_probe()
159 return PTR_ERR(st->reset); in lms283gf05_probe()
160 gpiod_set_consumer_name(st->reset, "LMS283GF05 RESET"); in lms283gf05_probe()
173 if (st->reset) in lms283gf05_probe()
[all …]
/drivers/clk/bcm/
A Dclk-bcm2711-dvp.c18 struct reset_simple_data reset; member
48 dvp->reset.rcdev.owner = THIS_MODULE; in clk_dvp_probe()
49 dvp->reset.rcdev.nr_resets = NR_RESETS; in clk_dvp_probe()
50 dvp->reset.rcdev.ops = &reset_simple_ops; in clk_dvp_probe()
51 dvp->reset.rcdev.of_node = pdev->dev.of_node; in clk_dvp_probe()
52 dvp->reset.membase = base + DVP_HT_RPI_SW_INIT; in clk_dvp_probe()
53 spin_lock_init(&dvp->reset.lock); in clk_dvp_probe()
55 ret = devm_reset_controller_register(&pdev->dev, &dvp->reset.rcdev); in clk_dvp_probe()
66 &dvp->reset.lock); in clk_dvp_probe()
75 &dvp->reset.lock); in clk_dvp_probe()
/drivers/clk/sunxi-ng/
A Dccu_common.c22 struct ccu_reset reset; member
116 struct ccu_reset *reset; in sunxi_ccu_probe() local
171 reset = &ccu->reset; in sunxi_ccu_probe()
172 reset->rcdev.of_node = node; in sunxi_ccu_probe()
173 reset->rcdev.ops = &ccu_reset_ops; in sunxi_ccu_probe()
175 reset->rcdev.nr_resets = desc->num_resets; in sunxi_ccu_probe()
176 reset->base = reg; in sunxi_ccu_probe()
177 reset->lock = &ccu->lock; in sunxi_ccu_probe()
178 reset->reset_map = desc->resets; in sunxi_ccu_probe()
180 ret = reset_controller_register(&reset->rcdev); in sunxi_ccu_probe()
[all …]
/drivers/watchdog/
A Dmena21_wdt.c44 int reset = 0; in a21_wdt_get_bootstatus() local
46 reset |= gpiod_get_value(drv->gpios[GPIO_WD_RST0]) ? (1 << 0) : 0; in a21_wdt_get_bootstatus()
47 reset |= gpiod_get_value(drv->gpios[GPIO_WD_RST1]) ? (1 << 1) : 0; in a21_wdt_get_bootstatus()
48 reset |= gpiod_get_value(drv->gpios[GPIO_WD_RST2]) ? (1 << 2) : 0; in a21_wdt_get_bootstatus()
50 return reset; in a21_wdt_get_bootstatus()
132 unsigned int reset = 0; in a21_wdt_probe() local
179 reset = a21_wdt_get_bootstatus(drv); in a21_wdt_probe()
180 if (reset == 2) in a21_wdt_probe()
182 else if (reset == 4) in a21_wdt_probe()
184 else if (reset == 5) in a21_wdt_probe()
[all …]
/drivers/misc/
A Dgehc-achc.c23 struct gpio_desc *reset; member
53 gpiod_set_value(reset, 1); in ezport_reset()
55 gpiod_set_value(reset, 0); in ezport_reset()
80 ezport_reset(reset); in ezport_start_programming()
96 ezport_reset(reset); in ezport_stop_programming()
418 ret = ezport_start_programming(spi, reset); in ezport_flash()
424 ezport_stop_programming(spi, reset); in ezport_flash()
462 ret = gpiod_get_value(achc->reset); in reset_show()
483 gpiod_set_value(achc->reset, value); in reset_store()
488 static DEVICE_ATTR_RW(reset);
[all …]
A Dlan966x_pci.dtso75 reset: reset@e200400c {
76 compatible = "microchip,lan966x-switch-reset";
79 #reset-cells = <1>;
87 resets = <&reset 0>;
88 reset-names = "switch";
124 resets = <&reset 0>;
125 reset-names = "switch";
147 resets = <&reset 0>;
148 reset-names = "switch";
/drivers/clk/meson/
A Dmeson-aoclk.c27 container_of(rcdev, struct meson_aoclk_reset_controller, reset); in meson_aoclk_do_reset()
30 BIT(rstc->data->reset[id])); in meson_aoclk_do_reset()
34 .reset = meson_aoclk_do_reset,
65 rstc->reset.ops = &meson_aoclk_reset_ops; in meson_aoclkc_probe()
66 rstc->reset.nr_resets = data->num_reset; in meson_aoclkc_probe()
67 rstc->reset.of_node = dev->of_node; in meson_aoclkc_probe()
68 ret = devm_reset_controller_register(dev, &rstc->reset); in meson_aoclkc_probe()
/drivers/phy/allwinner/
A Dphy-sun9i-usb.c38 struct reset_control *reset; member
79 ret = reset_control_deassert(phy->reset); in sun9i_usb_phy_init()
101 reset_control_assert(phy->reset); in sun9i_usb_phy_exit()
139 phy->reset = devm_reset_control_get(dev, "hsic"); in sun9i_usb_phy_probe()
140 if (IS_ERR(phy->reset)) { in sun9i_usb_phy_probe()
142 return PTR_ERR(phy->reset); in sun9i_usb_phy_probe()
151 phy->reset = devm_reset_control_get(dev, "phy"); in sun9i_usb_phy_probe()
152 if (IS_ERR(phy->reset)) { in sun9i_usb_phy_probe()
154 return PTR_ERR(phy->reset); in sun9i_usb_phy_probe()
/drivers/phy/amlogic/
A Dphy-meson-axg-pcie.c32 struct reset_control *reset; member
80 return reset_control_reset(priv->reset); in phy_axg_pcie_init()
92 return reset_control_reset(priv->reset); in phy_axg_pcie_exit()
104 ret = reset_control_assert(priv->reset); in phy_axg_pcie_reset()
109 ret = reset_control_deassert(priv->reset); in phy_axg_pcie_reset()
123 .reset = phy_axg_pcie_reset,
148 priv->reset = devm_reset_control_array_get_exclusive(dev); in phy_axg_pcie_probe()
149 if (IS_ERR(priv->reset)) in phy_axg_pcie_probe()
150 return PTR_ERR(priv->reset); in phy_axg_pcie_probe()
/drivers/phy/qualcomm/
A Dphy-ath79-usb.c15 struct reset_control *reset; member
33 err = reset_control_deassert(priv->reset); in ath79_usb_phy_power_on()
45 err = reset_control_assert(priv->reset); in ath79_usb_phy_power_off()
52 reset_control_deassert(priv->reset); in ath79_usb_phy_power_off()
73 priv->reset = devm_reset_control_get(&pdev->dev, "phy"); in ath79_usb_phy_probe()
74 if (IS_ERR(priv->reset)) in ath79_usb_phy_probe()
75 return PTR_ERR(priv->reset); in ath79_usb_phy_probe()
/drivers/gpu/drm/sun4i/
A Dsun6i_drc.c19 struct reset_control *reset; member
33 drc->reset = devm_reset_control_get(dev, NULL); in sun6i_drc_bind()
34 if (IS_ERR(drc->reset)) { in sun6i_drc_bind()
36 return PTR_ERR(drc->reset); in sun6i_drc_bind()
39 ret = reset_control_deassert(drc->reset); in sun6i_drc_bind()
73 reset_control_assert(drc->reset); in sun6i_drc_bind()
85 reset_control_assert(drc->reset); in sun6i_drc_unbind()
/drivers/vfio/platform/reset/
A DKconfig4 tristate "VFIO support for calxeda xgmac reset"
6 Enables the VFIO platform driver to handle reset for Calxeda xgmac
11 tristate "VFIO support for AMD XGBE reset"
13 Enables the VFIO platform driver to handle reset for AMD XGBE
18 tristate "VFIO support for Broadcom FlexRM reset"
22 Enables the VFIO platform driver to handle reset for Broadcom FlexRM

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