Searched refs:reset_ctl (Results 1 – 9 of 9) sorted by relevance
| /drivers/gpu/drm/amd/amdgpu/ |
| A D | smu_v13_0_10.c | 50 for_each_handler(i, handler, reset_ctl) { in smu_v13_0_10_get_reset_handler()
56 if (smu_v13_0_10_is_mode2_default(reset_ctl) && in smu_v13_0_10_get_reset_handler()
58 for_each_handler(i, handler, reset_ctl) { in smu_v13_0_10_get_reset_handler()
112 struct amdgpu_reset_control *reset_ctl = in smu_v13_0_10_async_reset() local
117 for_each_handler(i, handler, reset_ctl) { in smu_v13_0_10_async_reset()
271 struct amdgpu_reset_control *reset_ctl; in smu_v13_0_10_reset_init() local
273 reset_ctl = kzalloc(sizeof(*reset_ctl), GFP_KERNEL); in smu_v13_0_10_reset_init()
274 if (!reset_ctl) in smu_v13_0_10_reset_init()
277 reset_ctl->handle = adev; in smu_v13_0_10_reset_init()
282 INIT_WORK(&reset_ctl->reset_work, reset_ctl->async_reset); in smu_v13_0_10_reset_init()
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| A D | sienna_cichlid.c | 54 for_each_handler(i, handler, reset_ctl) { in sienna_cichlid_get_reset_handler()
60 if (sienna_cichlid_is_mode2_default(reset_ctl)) { in sienna_cichlid_get_reset_handler()
61 for_each_handler(i, handler, reset_ctl) { in sienna_cichlid_get_reset_handler()
113 struct amdgpu_reset_control *reset_ctl = in sienna_cichlid_async_reset() local
118 for_each_handler(i, handler, reset_ctl) { in sienna_cichlid_async_reset()
274 struct amdgpu_reset_control *reset_ctl; in sienna_cichlid_reset_init() local
276 reset_ctl = kzalloc(sizeof(*reset_ctl), GFP_KERNEL); in sienna_cichlid_reset_init()
277 if (!reset_ctl) in sienna_cichlid_reset_init()
280 reset_ctl->handle = adev; in sienna_cichlid_reset_init()
285 INIT_WORK(&reset_ctl->reset_work, reset_ctl->async_reset); in sienna_cichlid_reset_init()
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| A D | aldebaran.c | 54 if (aldebaran_is_mode2_default(reset_ctl)) in aldebaran_get_reset_handler()
63 for_each_handler(i, handler, reset_ctl) { in aldebaran_get_reset_handler()
125 struct amdgpu_reset_control *reset_ctl = in aldebaran_async_reset() local
130 for_each_handler(i, handler, reset_ctl) { in aldebaran_async_reset()
444 struct amdgpu_reset_control *reset_ctl; in aldebaran_reset_init() local
446 reset_ctl = kzalloc(sizeof(*reset_ctl), GFP_KERNEL); in aldebaran_reset_init()
447 if (!reset_ctl) in aldebaran_reset_init()
450 reset_ctl->handle = adev; in aldebaran_reset_init()
451 reset_ctl->async_reset = aldebaran_async_reset; in aldebaran_reset_init()
455 INIT_WORK(&reset_ctl->reset_work, reset_ctl->async_reset); in aldebaran_reset_init()
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| A D | amdgpu_reset.h | 60 int (*prepare_env)(struct amdgpu_reset_control *reset_ctl,
62 int (*prepare_hwcontext)(struct amdgpu_reset_control *reset_ctl,
64 int (*perform_reset)(struct amdgpu_reset_control *reset_ctl,
66 int (*restore_hwcontext)(struct amdgpu_reset_control *reset_ctl,
68 int (*restore_env)(struct amdgpu_reset_control *reset_ctl,
83 struct amdgpu_reset_control *reset_ctl,
152 #define for_each_handler(i, handler, reset_ctl) \ argument
154 (handler = (*reset_ctl->reset_handlers)[i]); \
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| A D | amdgpu_reset.c | 57 struct amdgpu_reset_control *reset_ctl, in amdgpu_reset_xgmi_reset_on_init_prep_hwctxt() argument
78 struct amdgpu_reset_control *reset_ctl, in amdgpu_reset_xgmi_reset_on_init_restore_hwctxt() argument
100 struct amdgpu_reset_control *reset_ctl, in amdgpu_reset_xgmi_reset_on_init_perform_reset() argument
103 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in amdgpu_reset_xgmi_reset_on_init_perform_reset()
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| /drivers/net/dsa/realtek/ |
| A D | rtl83xx.c | 187 priv->reset_ctl = devm_reset_control_get_optional(dev, NULL); in rtl83xx_probe()
188 if (IS_ERR(priv->reset_ctl)) in rtl83xx_probe()
189 return dev_err_cast_probe(dev, priv->reset_ctl, in rtl83xx_probe()
200 if (priv->reset_ctl || priv->reset) { in rtl83xx_probe()
306 ret = reset_control_assert(priv->reset_ctl); in rtl83xx_reset_assert()
319 ret = reset_control_deassert(priv->reset_ctl); in rtl83xx_reset_deassert()
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| A D | realtek.h | 53 struct reset_control *reset_ctl; member
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| /drivers/gpu/drm/mediatek/ |
| A D | mtk_disp_merge.c | 70 struct reset_control *reset_ctl; member
107 reset_control_reset(priv->reset_ctl); in mtk_merge_stop_cmdq()
332 priv->reset_ctl = devm_reset_control_get_optional_exclusive(dev, NULL); in mtk_disp_merge_probe()
333 if (IS_ERR(priv->reset_ctl)) in mtk_disp_merge_probe()
334 return PTR_ERR(priv->reset_ctl); in mtk_disp_merge_probe()
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| A D | mtk_ethdr.c | 83 struct reset_control *reset_ctl; member
280 reset_control_reset(priv->reset_ctl); in mtk_ethdr_stop()
363 priv->reset_ctl = devm_reset_control_array_get_optional_exclusive(dev); in mtk_ethdr_probe()
364 if (IS_ERR(priv->reset_ctl)) in mtk_ethdr_probe()
365 return dev_err_probe(dev, PTR_ERR(priv->reset_ctl), in mtk_ethdr_probe()
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