| /drivers/gpu/drm/amd/amdgpu/ |
| A D | amdgpu_reset.c | 268 if (reset_domain->wq) in amdgpu_reset_destroy_reset_domain()
269 destroy_workqueue(reset_domain->wq); in amdgpu_reset_destroy_reset_domain()
271 kvfree(reset_domain); in amdgpu_reset_destroy_reset_domain()
280 if (!reset_domain) { in amdgpu_reset_create_reset_domain()
285 reset_domain->type = type; in amdgpu_reset_create_reset_domain()
286 kref_init(&reset_domain->refcount); in amdgpu_reset_create_reset_domain()
289 if (!reset_domain->wq) { in amdgpu_reset_create_reset_domain()
298 init_rwsem(&reset_domain->sem); in amdgpu_reset_create_reset_domain()
300 return reset_domain; in amdgpu_reset_create_reset_domain()
306 down_write(&reset_domain->sem); in amdgpu_device_lock_reset_domain()
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| A D | mxgpu_ai.c | 300 if (down_read_trylock(&adev->reset_domain->sem)) { in xgpu_ai_mailbox_bad_pages_work()
304 up_read(&adev->reset_domain->sem); in xgpu_ai_mailbox_bad_pages_work()
340 WARN_ONCE(!amdgpu_reset_domain_schedule(adev->reset_domain, in xgpu_ai_mailbox_rcv_irq()
347 WARN_ONCE(!amdgpu_reset_domain_schedule(adev->reset_domain, in xgpu_ai_mailbox_rcv_irq()
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| A D | amdgpu_reset.h | 145 void amdgpu_device_lock_reset_domain(struct amdgpu_reset_domain *reset_domain);
147 void amdgpu_device_unlock_reset_domain(struct amdgpu_reset_domain *reset_domain);
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| A D | mxgpu_nv.c | 367 if (down_read_trylock(&adev->reset_domain->sem)) { in xgpu_nv_mailbox_bad_pages_work()
371 up_read(&adev->reset_domain->sem); in xgpu_nv_mailbox_bad_pages_work()
413 WARN_ONCE(!amdgpu_reset_domain_schedule(adev->reset_domain, in xgpu_nv_mailbox_rcv_irq()
420 WARN_ONCE(!amdgpu_reset_domain_schedule(adev->reset_domain, in xgpu_nv_mailbox_rcv_irq()
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| A D | amdgpu_xgmi.c | 418 amdgpu_reset_put_reset_domain(hive->reset_domain); in amdgpu_xgmi_hive_release()
419 hive->reset_domain = NULL; in amdgpu_xgmi_hive_release()
717 if (adev->reset_domain->type != XGMI_HIVE) { in amdgpu_get_xgmi_hive()
718 hive->reset_domain = in amdgpu_get_xgmi_hive()
720 if (!hive->reset_domain) { in amdgpu_get_xgmi_hive()
728 amdgpu_reset_get_reset_domain(adev->reset_domain); in amdgpu_get_xgmi_hive()
729 hive->reset_domain = adev->reset_domain; in amdgpu_get_xgmi_hive()
1660 amdgpu_device_lock_reset_domain(tmp_adev->reset_domain); in amdgpu_xgmi_reset_on_init_work()
1671 amdgpu_device_unlock_reset_domain(tmp_adev->reset_domain); in amdgpu_xgmi_reset_on_init_work()
1684 amdgpu_reset_domain_schedule(hive->reset_domain, in amdgpu_xgmi_schedule_reset_on_init()
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| A D | amdgpu_ras_eeprom.c | 272 down_read(&adev->reset_domain->sem); in __write_table_header()
277 up_read(&adev->reset_domain->sem); in __write_table_header()
335 down_read(&adev->reset_domain->sem); in __write_table_ras_info()
340 up_read(&adev->reset_domain->sem); in __write_table_ras_info()
607 down_read(&adev->reset_domain->sem); in __amdgpu_ras_eeprom_write()
613 up_read(&adev->reset_domain->sem); in __amdgpu_ras_eeprom_write()
801 down_read(&adev->reset_domain->sem); in amdgpu_ras_eeprom_update_header()
806 up_read(&adev->reset_domain->sem); in amdgpu_ras_eeprom_update_header()
924 down_read(&adev->reset_domain->sem); in __amdgpu_ras_eeprom_read()
930 up_read(&adev->reset_domain->sem); in __amdgpu_ras_eeprom_read()
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| A D | amdgpu_device.c | 699 up_read(&adev->reset_domain->sem); in amdgpu_device_skip_hw_access()
701 lockdep_assert_held(&adev->reset_domain->sem); in amdgpu_device_skip_hw_access()
729 up_read(&adev->reset_domain->sem); in amdgpu_device_rreg()
797 up_read(&adev->reset_domain->sem); in amdgpu_device_xcc_rreg()
856 up_read(&adev->reset_domain->sem); in amdgpu_device_wreg()
928 up_read(&adev->reset_domain->sem); in amdgpu_device_xcc_wreg()
2978 .timeout_wq = adev->reset_domain->wq, in amdgpu_device_init_schedulers()
3197 if (!hive->reset_domain || in amdgpu_device_ip_init()
3206 adev->reset_domain = hive->reset_domain; in amdgpu_device_ip_init()
4524 if (!adev->reset_domain) in amdgpu_device_init()
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| A D | amdgpu_amdkfd_arcturus.c | 320 if (!down_read_trylock(&adev->reset_domain->sem)) in set_barrier_auto_waitcnt()
338 up_read(&adev->reset_domain->sem); in set_barrier_auto_waitcnt()
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| A D | amdgpu_gart.c | 411 if (down_read_trylock(&adev->reset_domain->sem)) { in amdgpu_gart_invalidate_tlb()
413 up_read(&adev->reset_domain->sem); in amdgpu_gart_invalidate_tlb()
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| A D | amdgpu_gmc.c | 667 if (!down_read_trylock(&adev->reset_domain->sem)) in amdgpu_gmc_flush_gpu_tlb()
680 up_read(&adev->reset_domain->sem); in amdgpu_gmc_flush_gpu_tlb()
728 if (!down_read_trylock(&adev->reset_domain->sem)) in amdgpu_gmc_flush_gpu_tlb_pasid()
783 !amdgpu_reset_pending(adev->reset_domain)) { in amdgpu_gmc_flush_gpu_tlb_pasid()
796 up_read(&adev->reset_domain->sem); in amdgpu_gmc_flush_gpu_tlb_pasid()
836 !amdgpu_reset_pending(adev->reset_domain)) { in amdgpu_gmc_fw_reg_write_reg_wait()
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| A D | amdgpu_xgmi.h | 44 struct amdgpu_reset_domain *reset_domain; member
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| A D | amdgpu_virt.c | 644 if (amdgpu_reset_domain_schedule(adev->reset_domain, in amdgpu_virt_update_vf2pf_work_item()
1357 if (down_read_trylock(&adev->reset_domain->sem)) { in amdgpu_virt_req_ras_err_count()
1359 up_read(&adev->reset_domain->sem); in amdgpu_virt_req_ras_err_count()
1456 down_read_trylock(&adev->reset_domain->sem)) { in amdgpu_virt_req_ras_cper_dump()
1460 up_read(&adev->reset_domain->sem); in amdgpu_virt_req_ras_cper_dump()
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| A D | amdgpu_ih.c | 244 WARN_ONCE(!amdgpu_reset_domain_schedule(adev->reset_domain, in amdgpu_ih_process()
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| A D | amdgpu_fence.c | 1008 if (amdgpu_reset_domain_schedule(adev->reset_domain, &adev->reset_work)) in gpu_recover_get()
1011 *val = atomic_read(&adev->reset_domain->reset_res); in gpu_recover_get()
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| A D | amdgpu_debugfs.c | 1673 r = down_write_killable(&adev->reset_domain->sem); in amdgpu_debugfs_test_ib_show()
1702 up_write(&adev->reset_domain->sem); in amdgpu_debugfs_test_ib_show()
1938 r = down_read_killable(&adev->reset_domain->sem); in amdgpu_debugfs_ib_preempt()
1979 up_read(&adev->reset_domain->sem); in amdgpu_debugfs_ib_preempt()
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| A D | mxgpu_vi.c | 559 WARN_ONCE(!amdgpu_reset_domain_schedule(adev->reset_domain, in xgpu_vi_mailbox_rcv_irq()
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| A D | amdgpu_ras.c | 1447 if (!down_read_trylock(&adev->reset_domain->sem)) { in amdgpu_ras_query_error_status_with_event()
1456 up_read(&adev->reset_domain->sem); in amdgpu_ras_query_error_status_with_event()
3475 down_read(&adev->reset_domain->sem); in amdgpu_ras_page_retirement_thread()
3476 up_read(&adev->reset_domain->sem); in amdgpu_ras_page_retirement_thread()
4759 amdgpu_reset_domain_schedule(ras->adev->reset_domain, &ras->recovery_work); in amdgpu_ras_reset_gpu()
4764 amdgpu_reset_domain_schedule(ras->adev->reset_domain, &ras->recovery_work); in amdgpu_ras_reset_gpu()
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| A D | amdgpu_amdkfd.c | 307 amdgpu_reset_domain_schedule(adev->reset_domain, in amdgpu_amdkfd_gpu_reset()
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| A D | amdgpu_kms.c | 843 if (!down_read_trylock(&adev->reset_domain->sem)) in amdgpu_info_ioctl()
894 up_read(&adev->reset_domain->sem); in amdgpu_info_ioctl()
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| /drivers/gpu/drm/amd/amdkfd/ |
| A D | kfd_device_queue_manager.c | 211 if (!down_read_trylock(&adev->reset_domain->sem)) in add_queue_mes()
251 up_read(&adev->reset_domain->sem); in add_queue_mes()
261 up_read(&adev->reset_domain->sem); in add_queue_mes()
281 if (!down_read_trylock(&adev->reset_domain->sem)) in remove_queue_mes()
291 up_read(&adev->reset_domain->sem); in remove_queue_mes()
366 up_read(&adev->reset_domain->sem); in suspend_all_queues_mes()
386 up_read(&adev->reset_domain->sem); in resume_all_queues_mes()
2436 up_read(&dqm->dev->adev->reset_domain->sem); in unmap_queues_cpsch()
2442 up_read(&dqm->dev->adev->reset_domain->sem); in unmap_queues_cpsch()
2473 up_read(&dqm->dev->adev->reset_domain->sem); in execute_queues_cpsch()
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| A D | kfd_kernel_queue.c | 203 …e->properties.type == KFD_QUEUE_TYPE_HIQ && down_read_trylock(&kq->dev->adev->reset_domain->sem)) { in kq_uninitialize()
210 up_read(&kq->dev->adev->reset_domain->sem); in kq_uninitialize()
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| A D | kfd_process_queue_manager.c | 95 down_read_trylock(&dev->adev->reset_domain->sem)) { in kfd_process_dequeue_from_device()
98 up_read(&dev->adev->reset_domain->sem); in kfd_process_dequeue_from_device()
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| /drivers/gpu/drm/i915/gt/ |
| A D | intel_engine_cs.c | 398 u32 reset_domain; in get_reset_domain() local
432 reset_domain = engine_reset_domains[id]; in get_reset_domain()
443 reset_domain = engine_reset_domains[id]; in get_reset_domain()
446 return reset_domain; in get_reset_domain()
484 engine->reset_domain = get_reset_domain(GRAPHICS_VER(gt->i915), in intel_engine_setup()
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| A D | intel_engine_types.h | 377 u32 reset_domain; member
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| A D | intel_reset.c | 335 hw_mask |= engine->reset_domain; in __gen6_reset_engines()
536 reset_mask |= engine->reset_domain; in __gen11_reset_engines()
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