Searched refs:resp_reg (Results 1 – 10 of 10) sorted by relevance
| /drivers/gpu/drm/amd/pm/swsmu/ |
| A D | smu_cmn.c | 117 reg = RREG32(smu->resp_reg); in __smu_cmn_poll_stat()
243 WREG32(smu->resp_reg, 0); in __smu_cmn_send_msg()
281 resp = RREG32(smu->resp_reg); in __smu_cmn_ras_filter_msg()
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| /drivers/gpu/drm/amd/pm/swsmu/inc/ |
| A D | amdgpu_smu.h | 610 u32 resp_reg; member
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| /drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| A D | smu_v13_0_5_ppt.c | 1138 smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_C2PMSG_33); in smu_v13_0_5_set_ppt_funcs()
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| A D | smu_v13_0_4_ppt.c | 1129 smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90); in smu_v13_0_4_set_smu_mailbox_registers()
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| A D | smu_v13_0.c | 2366 smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90); in smu_v13_0_set_smu_mailbox_registers()
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| A D | smu_v13_0_0_ppt.c | 2976 smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90); in smu_v13_0_0_set_smu_mailbox_registers()
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| /drivers/gpu/drm/amd/pm/swsmu/smu12/ |
| A D | renoir_ppt.c | 1504 smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90); in renoir_set_ppt_funcs()
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| /drivers/gpu/drm/amd/pm/swsmu/smu14/ |
| A D | smu_v14_0_0_ppt.c | 1709 smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90); in smu_v14_0_0_set_smu_mailbox_registers()
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| A D | smu_v14_0_2_ppt.c | 2175 smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, regMP1_SMN_C2PMSG_90); in smu_v14_0_2_set_smu_mailbox_registers()
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| /drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| A D | smu_v11_0.c | 2181 smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90); in smu_v11_0_set_smu_mailbox_registers()
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