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Searched refs:ring_enc (Results 1 – 17 of 17) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
A Dvcn_v4_0.c221 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_sw_init()
345 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_hw_init()
356 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_hw_init()
1287 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_start()
1325 rb_ptr += ring_enc->ring_size; in vcn_v4_0_init_ring_metadata()
1341 struct amdgpu_ring *ring_enc; in vcn_v4_0_start_sriov() local
1458 ring_enc = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_start_sriov()
1459 ring_enc->wptr = 0; in vcn_v4_0_start_sriov()
1460 rb_enc_addr = ring_enc->gpu_addr; in vcn_v4_0_start_sriov()
2039 adev->vcn.inst[i].ring_enc[0].funcs = in vcn_v4_0_set_unified_ring_funcs()
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A Dvcn_v5_0_1.c134 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_1_sw_init()
236 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_1_hw_init()
247 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_1_hw_init()
678 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v5_0_1_start_dpg_mode()
713 struct amdgpu_ring *ring_enc; in vcn_v5_0_1_start_sriov() local
820 ring_enc = &adev->vcn.inst[vcn_inst].ring_enc[0]; in vcn_v5_0_1_start_sriov()
821 ring_enc->wptr = 0; in vcn_v5_0_1_start_sriov()
822 rb_enc_addr = ring_enc->gpu_addr; in vcn_v5_0_1_start_sriov()
827 rb_setup->rb_size = ring_enc->ring_size / 4; in vcn_v5_0_1_start_sriov()
1016 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_1_start()
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A Duvd_v7_0.c89 if (ring == &adev->uvd.inst[ring->me].ring_enc[0]) in uvd_v7_0_enc_ring_get_rptr()
123 if (ring == &adev->uvd.inst[ring->me].ring_enc[0]) in uvd_v7_0_enc_ring_get_wptr()
161 if (ring == &adev->uvd.inst[ring->me].ring_enc[0]) in uvd_v7_0_enc_ring_set_wptr()
457 ring = &adev->uvd.inst[j].ring_enc[i]; in uvd_v7_0_sw_init()
575 ring = &adev->uvd.inst[j].ring_enc[i]; in uvd_v7_0_hw_init()
762 adev->uvd.inst[i].ring_enc[0].wptr = 0; in uvd_v7_0_mmsch_start()
763 adev->uvd.inst[i].ring_enc[0].wptr_old = 0; in uvd_v7_0_mmsch_start()
921 ring = &adev->uvd.inst[i].ring_enc[0]; in uvd_v7_0_sriov_start()
1115 ring = &adev->uvd.inst[k].ring_enc[0]; in uvd_v7_0_start()
1122 ring = &adev->uvd.inst[k].ring_enc[1]; in uvd_v7_0_start()
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A Dvcn_v4_0_3.c190 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_3_sw_init()
303 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v4_0_3_hw_init_inst()
340 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_3_hw_init()
355 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_3_hw_init()
950 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v4_0_3_start_dpg_mode()
991 struct amdgpu_ring *ring_enc; in vcn_v4_0_3_start_sriov() local
1098 ring_enc = &adev->vcn.inst[vcn_inst].ring_enc[0]; in vcn_v4_0_3_start_sriov()
1099 ring_enc->wptr = 0; in vcn_v4_0_3_start_sriov()
1100 rb_enc_addr = ring_enc->gpu_addr; in vcn_v4_0_3_start_sriov()
1316 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_3_start()
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A Duvd_v6_0.c95 if (ring == &adev->uvd.inst->ring_enc[0]) in uvd_v6_0_enc_ring_get_rptr()
125 if (ring == &adev->uvd.inst->ring_enc[0]) in uvd_v6_0_enc_ring_get_wptr()
156 if (ring == &adev->uvd.inst->ring_enc[0]) in uvd_v6_0_enc_ring_set_wptr()
404 adev->uvd.inst->ring_enc[i].funcs = NULL; in uvd_v6_0_sw_init()
425 ring = &adev->uvd.inst->ring_enc[i]; in uvd_v6_0_sw_init()
449 amdgpu_ring_fini(&adev->uvd.inst->ring_enc[i]); in uvd_v6_0_sw_fini()
506 ring = &adev->uvd.inst->ring_enc[i]; in uvd_v6_0_hw_init()
866 ring = &adev->uvd.inst->ring_enc[0]; in uvd_v6_0_start()
873 ring = &adev->uvd.inst->ring_enc[1]; in uvd_v6_0_start()
1262 amdgpu_fence_process(&adev->uvd.inst->ring_enc[0]); in uvd_v6_0_process_interrupt()
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A Dvcn_v2_5.c380 ring = &adev->vcn.inst[j].ring_enc[i]; in vcn_v2_5_sw_init()
506 adev->vcn.inst[j].ring_enc[0].sched.ready = true; in vcn_v2_5_hw_init()
507 adev->vcn.inst[j].ring_enc[1].sched.ready = false; in vcn_v2_5_hw_init()
508 adev->vcn.inst[j].ring_enc[2].sched.ready = false; in vcn_v2_5_hw_init()
522 ring = &adev->vcn.inst[j].ring_enc[i]; in vcn_v2_5_hw_init()
1347 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v2_5_start()
1356 ring = &adev->vcn.inst[i].ring_enc[1]; in vcn_v2_5_start()
1521 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v2_5_sriov_start()
1716 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v2_5_pause_dpg_mode()
1726 ring = &adev->vcn.inst[inst_idx].ring_enc[1]; in vcn_v2_5_pause_dpg_mode()
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A Dvcn_v2_0.c203 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v2_0_sw_init()
312 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v2_0_hw_init()
1158 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v2_0_start()
1167 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v2_0_start()
1330 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v2_0_pause_dpg_mode()
1340 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v2_0_pause_dpg_mode()
1657 if (ring == &adev->vcn.inst->ring_enc[0]) in vcn_v2_0_enc_ring_get_rptr()
1674 if (ring == &adev->vcn.inst->ring_enc[0]) { in vcn_v2_0_enc_ring_get_wptr()
1929 adev->vcn.inst->ring_enc[i].wptr = 0; in vcn_v2_0_start_mmsch()
1930 adev->vcn.inst->ring_enc[i].wptr_old = 0; in vcn_v2_0_start_mmsch()
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A Dvcn_v5_0_0.c176 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_0_sw_init()
200 amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]); in vcn_v5_0_0_sw_init()
276 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_0_hw_init()
772 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v5_0_0_start_dpg_mode()
930 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v5_0_0_start()
1148 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v5_0_0_unified_ring_get_rptr()
1165 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v5_0_0_unified_ring_get_wptr()
1185 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v5_0_0_unified_ring_set_wptr()
1259 adev->vcn.inst[i].ring_enc[0].funcs = &vcn_v5_0_0_unified_ring_vm_funcs; in vcn_v5_0_0_set_unified_ring_funcs()
1260 adev->vcn.inst[i].ring_enc[0].me = i; in vcn_v5_0_0_set_unified_ring_funcs()
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A Dvcn_v3_0.c261 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_sw_init()
404 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_hw_init()
432 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_hw_init()
1363 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v3_0_start()
1372 ring = &adev->vcn.inst[i].ring_enc[1]; in vcn_v3_0_start()
1499 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_start_sriov()
1758 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v3_0_pause_dpg_mode()
1768 ring = &adev->vcn.inst[inst_idx].ring_enc[1]; in vcn_v3_0_pause_dpg_mode()
2063 if (ring == &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v3_0_enc_ring_get_rptr()
2080 if (ring == &adev->vcn.inst[ring->me].ring_enc[0]) { in vcn_v3_0_enc_ring_get_wptr()
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A Dvcn_v1_0.c184 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v1_0_sw_init()
258 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v1_0_hw_init()
996 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v1_0_start_spg_mode()
1003 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v1_0_start_spg_mode()
1327 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v1_0_pause_dpg_mode()
1334 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v1_0_pause_dpg_mode()
1674 if (ring == &adev->vcn.inst->ring_enc[0]) in vcn_v1_0_enc_ring_get_rptr()
1691 if (ring == &adev->vcn.inst->ring_enc[0]) in vcn_v1_0_enc_ring_get_wptr()
1708 if (ring == &adev->vcn.inst->ring_enc[0]) in vcn_v1_0_enc_ring_set_wptr()
1817 amdgpu_fence_process(&adev->vcn.inst->ring_enc[0]); in vcn_v1_0_process_interrupt()
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A Dvcn_v4_0_5.c184 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_5_sw_init()
222 adev->vcn.supported_reset = amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]); in vcn_v4_0_5_sw_init()
309 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_5_hw_init()
1012 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v4_0_5_start_dpg_mode()
1199 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v4_0_5_start()
1421 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v4_0_5_unified_ring_get_rptr()
1438 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v4_0_5_unified_ring_get_wptr()
1458 if (ring != &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v4_0_5_unified_ring_set_wptr()
1535 adev->vcn.inst[i].ring_enc[0].funcs = &vcn_v4_0_5_unified_ring_vm_funcs; in vcn_v4_0_5_set_unified_ring_funcs()
1536 adev->vcn.inst[i].ring_enc[0].me = i; in vcn_v4_0_5_set_unified_ring_funcs()
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A Damdgpu_vcn.c280 amdgpu_ring_fini(&adev->vcn.inst[i].ring_enc[j]); in amdgpu_vcn_sw_fini()
421 fence[i] += amdgpu_fence_count_emitted(&vcn_inst->ring_enc[j]); in amdgpu_vcn_idle_work_handler()
500 fences += amdgpu_fence_count_emitted(&vcn_inst->ring_enc[i]); in amdgpu_vcn_ring_begin_use()
1384 ring = &adev->vcn.inst[i].ring_enc[0]; in amdgpu_debugfs_vcn_sched_mask_set()
1405 ring = &adev->vcn.inst[i].ring_enc[0]; in amdgpu_debugfs_vcn_sched_mask_get()
1476 drm_sched_wqueue_stop(&vinst->ring_enc[i].sched); in amdgpu_vcn_reset_engine()
1486 r = amdgpu_ring_test_ring(&vinst->ring_enc[i]); in amdgpu_vcn_reset_engine()
1492 amdgpu_fence_driver_force_completion(&vinst->ring_enc[i]); in amdgpu_vcn_reset_engine()
1500 drm_sched_wqueue_start(&vinst->ring_enc[i].sched); in amdgpu_vcn_reset_engine()
A Damdgpu_uvd.h46 struct amdgpu_ring ring_enc[AMDGPU_MAX_UVD_ENC_RINGS]; member
A Damdgpu_kms.c483 if (adev->uvd.inst[i].ring_enc[j].sched.ready && in amdgpu_hw_ip_info()
484 !adev->uvd.inst[i].ring_enc[j].no_user_submission) in amdgpu_hw_ip_info()
510 if (adev->vcn.inst[i].ring_enc[j].sched.ready && in amdgpu_hw_ip_info()
511 !adev->vcn.inst[i].ring_enc[j].no_user_submission) in amdgpu_hw_ip_info()
A Damdgpu_vcn.h304 struct amdgpu_ring ring_enc[AMDGPU_VCN_MAX_ENC_RINGS]; member
A Damdgpu_uvd.c389 amdgpu_ring_fini(&adev->uvd.inst[j].ring_enc[i]); in amdgpu_uvd_sw_fini()
1272 fences += amdgpu_fence_count_emitted(&adev->uvd.inst[i].ring_enc[j]); in amdgpu_uvd_idle_work_handler()
A Djpeg_v1_0.c616 if (amdgpu_fence_wait_empty(&adev->vcn.inst->ring_enc[cnt])) in jpeg_v1_0_ring_begin_use()

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