Home
last modified time | relevance | path

Searched refs:riscv (Results 1 – 19 of 19) sorted by relevance

/drivers/gpu/drm/tegra/
A Driscv.c34 writel(value, riscv->regs + offset); in riscv_writel()
37 int tegra_drm_riscv_read_descriptors(struct tegra_drm_riscv *riscv) in tegra_drm_riscv_read_descriptors() argument
39 struct tegra_drm_riscv_descriptor *bl = &riscv->bl_desc; in tegra_drm_riscv_read_descriptors()
40 struct tegra_drm_riscv_descriptor *os = &riscv->os_desc; in tegra_drm_riscv_read_descriptors()
41 const struct device_node *np = riscv->dev->of_node; in tegra_drm_riscv_read_descriptors()
47 dev_err(riscv->dev, "failed to read " name ": %d\n", err); \ in tegra_drm_riscv_read_descriptors()
62 dev_err(riscv->dev, "descriptors not available\n"); in tegra_drm_riscv_read_descriptors()
76 riscv_writel(riscv, RISCV_BCR_CTRL_CORE_SELECT_RISCV, RISCV_BCR_CTRL); in tegra_drm_riscv_boot_bootrom()
91 riscv_writel(riscv, in tegra_drm_riscv_boot_bootrom()
94 riscv_writel(riscv, RISCV_CPUCTL_STARTCPU_TRUE, RISCV_CPUCTL); in tegra_drm_riscv_boot_bootrom()
[all …]
A Dnvdec.c51 struct tegra_drm_riscv riscv; member
118 err = tegra_drm_riscv_boot_bootrom(&nvdec->riscv, nvdec->carveout_base, 1, in nvdec_boot_riscv()
119 &nvdec->riscv.bl_desc); in nvdec_boot_riscv()
135 err = tegra_drm_riscv_boot_bootrom(&nvdec->riscv, nvdec->carveout_base, 1, in nvdec_boot_riscv()
136 &nvdec->riscv.os_desc); in nvdec_boot_riscv()
498 nvdec->riscv.dev = dev; in nvdec_probe()
499 nvdec->riscv.regs = nvdec->regs; in nvdec_probe()
501 err = tegra_drm_riscv_read_descriptors(&nvdec->riscv); in nvdec_probe()
A Driscv.h26 int tegra_drm_riscv_read_descriptors(struct tegra_drm_riscv *riscv);
27 int tegra_drm_riscv_boot_bootrom(struct tegra_drm_riscv *riscv, phys_addr_t image_address,
A DMakefile28 riscv.o
/drivers/firmware/efi/
A DMakefile39 riscv-obj-$(CONFIG_EFI) := efi-init.o riscv-runtime.o
40 obj-$(CONFIG_RISCV) += $(riscv-obj-y)
/drivers/irqchip/
A DMakefile105 obj-$(CONFIG_RISCV_INTC) += irq-riscv-intc.o
106 obj-$(CONFIG_RISCV_APLIC) += irq-riscv-aplic-main.o irq-riscv-aplic-direct.o
107 obj-$(CONFIG_RISCV_APLIC_MSI) += irq-riscv-aplic-msi.o
108 obj-$(CONFIG_RISCV_IMSIC) += irq-riscv-imsic-state.o irq-riscv-imsic-early.o irq-riscv-imsic-platf…
A Dirq-riscv-intc.c248 IRQCHIP_DECLARE(riscv, "riscv,cpu-intc", riscv_intc_init);
A Dirq-sifive-plic.c736 IRQCHIP_DECLARE(riscv, "allwinner,sun20i-d1-plic", plic_early_probe);
/drivers/firmware/efi/libstub/
A DMakefile89 lib-$(CONFIG_RISCV) += kaslr.o riscv.o riscv-stub.o
/drivers/cpuidle/
A DMakefile44 obj-$(CONFIG_RISCV_SBI_CPUIDLE) += cpuidle-riscv-sbi.o
A DKconfig71 source "drivers/cpuidle/Kconfig.riscv"
/drivers/iommu/
A DMakefile5 obj-$(CONFIG_RISCV_IOMMU) += riscv/
A DKconfig198 source "drivers/iommu/riscv/Kconfig"
/drivers/gpu/nova-core/
A Dregs.rs215 10:10 riscv as bool;
A Dfalcon.rs353 if !hwcfg2.riscv() { in new()
/drivers/tty/serial/
A DMakefile11 obj-$(CONFIG_SERIAL_EARLYCON_RISCV_SBI) += earlycon-riscv-sbi.o
/drivers/acpi/
A DMakefile135 obj-$(CONFIG_RISCV) += riscv/
/drivers/clocksource/
A DMakefile84 obj-$(CONFIG_RISCV_TIMER) += timer-riscv.o
/drivers/virtio/
A DKconfig135 This driver currently supports x86-64, arm64, riscv and s390.

Completed in 713 milliseconds