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Searched refs:rptr (Results 1 – 25 of 115) sorted by relevance

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/drivers/phy/qualcomm/
A Dphy-qcom-eusb2-repeater.c99 if (!rptr->vregs) in eusb2_repeater_init_vregs()
103 rptr->vregs[i].supply = rptr->cfg->vreg_list[i]; in eusb2_repeater_init_vregs()
118 ret = regulator_bulk_enable(rptr->cfg->num_vregs, rptr->vregs); in eusb2_repeater_init()
186 return regulator_bulk_disable(rptr->cfg->num_vregs, rptr->vregs); in eusb2_repeater_exit()
205 rptr = devm_kzalloc(dev, sizeof(*rptr), GFP_KERNEL); in eusb2_repeater_probe()
206 if (!rptr) in eusb2_repeater_probe()
209 rptr->dev = dev; in eusb2_repeater_probe()
213 if (!rptr->cfg) in eusb2_repeater_probe()
224 rptr->base = res; in eusb2_repeater_probe()
238 phy_set_drvdata(rptr->phy, rptr); in eusb2_repeater_probe()
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/drivers/media/platform/amphion/
A Dvpu_rpc.c40 ptr2 = desc->rptr; in vpu_rpc_check_buffer_space()
42 ptr1 = desc->rptr; in vpu_rpc_check_buffer_space()
126 u32 rptr; in vpu_rpc_receive_msg_buf() local
134 rptr = desc->rptr; in vpu_rpc_receive_msg_buf()
137 rptr += 4; in vpu_rpc_receive_msg_buf()
138 if (rptr >= desc->end) { in vpu_rpc_receive_msg_buf()
139 rptr = desc->start; in vpu_rpc_receive_msg_buf()
153 rptr += 4; in vpu_rpc_receive_msg_buf()
154 if (rptr >= desc->end) { in vpu_rpc_receive_msg_buf()
155 rptr = desc->start; in vpu_rpc_receive_msg_buf()
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A Dvpu_dbg.c301 iface->cmd_desc->rptr); in vpu_dbg_core()
309 iface->msg_desc->rptr); in vpu_dbg_core()
321 u32 rptr; in vpu_dbg_fwlog() local
329 rptr = print_buf->read; in vpu_dbg_fwlog()
332 if (rptr == wptr) in vpu_dbg_fwlog()
334 else if (rptr < wptr) in vpu_dbg_fwlog()
335 length = wptr - rptr; in vpu_dbg_fwlog()
345 int num = print_buf->bytes - rptr; in vpu_dbg_fwlog()
350 rptr = 0; in vpu_dbg_fwlog()
356 rptr += length; in vpu_dbg_fwlog()
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A Dvpu_helpers.c237 u32 *rptr, u32 size, void *dst) in vpu_helper_copy_from_stream_buffer() argument
244 if (!stream_buffer || !rptr || !dst) in vpu_helper_copy_from_stream_buffer()
250 offset = *rptr; in vpu_helper_copy_from_stream_buffer()
347 if (desc.rptr > desc.wptr) in vpu_helper_get_free_space()
348 return desc.rptr - desc.wptr; in vpu_helper_get_free_space()
349 else if (desc.rptr < desc.wptr) in vpu_helper_get_free_space()
350 return (desc.end - desc.start + desc.rptr - desc.wptr); in vpu_helper_get_free_space()
362 if (desc.wptr > desc.rptr) in vpu_helper_get_used_space()
363 return desc.wptr - desc.rptr; in vpu_helper_get_used_space()
364 else if (desc.wptr < desc.rptr) in vpu_helper_get_used_space()
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/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_ih.c53 ih->rptr = 0; in amdgpu_ih_ring_init()
163 if (wptr != READ_ONCE(ih->rptr)) { in amdgpu_ih_ring_write()
168 wptr, ih->rptr); in amdgpu_ih_ring_write()
197 ih->rptr == amdgpu_ih_get_wptr(adev, ih), timeout); in amdgpu_ih_wait_on_checkpoint_process_ts()
226 while (ih->rptr != wptr && --count) { in amdgpu_ih_process()
228 ih->rptr &= ih->ptr_mask; in amdgpu_ih_process()
238 if (wptr != ih->rptr) in amdgpu_ih_process()
268 u32 ring_index = ih->rptr >> 2; in amdgpu_ih_decode_iv_helper()
295 ih->rptr += 32; in amdgpu_ih_decode_iv_helper()
305 rptr += iv_size * offset; in amdgpu_ih_decode_iv_ts_helper()
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A Damdgpu_ih.h69 unsigned rptr; member
91 uint64_t (*decode_iv_ts)(struct amdgpu_ih_ring *ih, u32 rptr,
99 #define amdgpu_ih_decode_iv_ts(adev, ih, rptr, offset) \ argument
101 (adev)->irq.ih_funcs->decode_iv_ts((ih), (rptr), (offset)))
115 uint64_t amdgpu_ih_decode_iv_ts_helper(struct amdgpu_ih_ring *ih, u32 rptr,
A Dtonga_ih.c88 adev->irq.ih.rptr = 0; in tonga_ih_disable_interrupts()
216 wptr, ih->rptr, (wptr + 16) & ih->ptr_mask); in tonga_ih_get_wptr()
217 ih->rptr = (wptr + 16) & ih->ptr_mask; in tonga_ih_get_wptr()
247 u32 ring_index = ih->rptr >> 2; in tonga_ih_decode_iv()
263 ih->rptr += 16; in tonga_ih_decode_iv()
279 *ih->rptr_cpu = ih->rptr; in tonga_ih_set_rptr()
280 WDOORBELL32(ih->doorbell_index, ih->rptr); in tonga_ih_set_rptr()
282 WREG32(mmIH_RB_RPTR, ih->rptr); in tonga_ih_set_rptr()
A Damdgpu_cper.c462 u64 pos, wptr_old, rptr; in amdgpu_cper_ring_write() local
478 rptr = *ring->rptr_cpu_addr & ring->ptr_mask; in amdgpu_cper_ring_write()
496 if (((wptr_old < rptr) && (rptr <= ring->wptr)) || in amdgpu_cper_ring_write()
497 ((ring->wptr < wptr_old) && (wptr_old < rptr)) || in amdgpu_cper_ring_write()
498 ((rptr <= ring->wptr) && (ring->wptr < wptr_old))) { in amdgpu_cper_ring_write()
504 rptr += (ent_sz >> 2); in amdgpu_cper_ring_write()
505 rptr &= ring->ptr_mask; in amdgpu_cper_ring_write()
506 *ring->rptr_cpu_addr = rptr; in amdgpu_cper_ring_write()
508 pos = rptr; in amdgpu_cper_ring_write()
509 } while (!amdgpu_cper_is_hdr(ring, rptr)); in amdgpu_cper_ring_write()
A Dcik_ih.c92 adev->irq.ih.rptr = 0; in cik_ih_disable_interrupts()
202 wptr, ih->rptr, (wptr + 16) & ih->ptr_mask); in cik_ih_get_wptr()
203 ih->rptr = (wptr + 16) & ih->ptr_mask; in cik_ih_get_wptr()
253 u32 ring_index = ih->rptr >> 2; in cik_ih_decode_iv()
269 ih->rptr += 16; in cik_ih_decode_iv()
283 WREG32(mmIH_RB_RPTR, ih->rptr); in cik_ih_set_rptr()
A Dsi_ih.c60 adev->irq.ih.rptr = 0; in si_ih_disable_interrupts()
118 wptr, ih->rptr, (wptr + 16) & ih->ptr_mask); in si_ih_get_wptr()
119 ih->rptr = (wptr + 16) & ih->ptr_mask; in si_ih_get_wptr()
137 u32 ring_index = ih->rptr >> 2; in si_ih_decode_iv()
151 ih->rptr += 16; in si_ih_decode_iv()
157 WREG32(IH_RB_RPTR, ih->rptr); in si_ih_set_rptr()
A Diceland_ih.c92 adev->irq.ih.rptr = 0; in iceland_ih_disable_interrupts()
212 wptr, ih->rptr, (wptr + 16) & ih->ptr_mask); in iceland_ih_get_wptr()
213 ih->rptr = (wptr + 16) & ih->ptr_mask; in iceland_ih_get_wptr()
243 u32 ring_index = ih->rptr >> 2; in iceland_ih_decode_iv()
259 ih->rptr += 16; in iceland_ih_decode_iv()
273 WREG32(mmIH_RB_RPTR, ih->rptr); in iceland_ih_set_rptr()
A Dcz_ih.c92 adev->irq.ih.rptr = 0; in cz_ih_disable_interrupts()
213 wptr, ih->rptr, (wptr + 16) & ih->ptr_mask); in cz_ih_get_wptr()
214 ih->rptr = (wptr + 16) & ih->ptr_mask; in cz_ih_get_wptr()
244 u32 ring_index = ih->rptr >> 2; in cz_ih_decode_iv()
260 ih->rptr += 16; in cz_ih_decode_iv()
274 WREG32(mmIH_RB_RPTR, ih->rptr); in cz_ih_set_rptr()
A Dvega10_ih.c127 ih->rptr = 0; in vega10_ih_toggle_ring_interrupts()
368 amdgpu_ih_ring_name(adev, ih), wptr, ih->rptr, tmp); in vega10_ih_get_wptr()
369 ih->rptr = tmp; in vega10_ih_get_wptr()
403 if ((v < ih->ring_size) && (v != ih->rptr)) in vega10_ih_irq_rearm()
404 WDOORBELL32(ih->doorbell_index, ih->rptr); in vega10_ih_irq_rearm()
428 *ih->rptr_cpu = ih->rptr; in vega10_ih_set_rptr()
429 WDOORBELL32(ih->doorbell_index, ih->rptr); in vega10_ih_set_rptr()
435 WREG32(ih_regs->ih_rb_rptr, ih->rptr); in vega10_ih_set_rptr()
A Dvega20_ih.c163 ih->rptr = 0; in vega20_ih_toggle_ring_interrupts()
452 amdgpu_ih_ring_name(adev, ih), wptr, ih->rptr, tmp); in vega20_ih_get_wptr()
453 ih->rptr = tmp; in vega20_ih_get_wptr()
488 if ((v < ih->ring_size) && (v != ih->rptr)) in vega20_ih_irq_rearm()
489 WDOORBELL32(ih->doorbell_index, ih->rptr); in vega20_ih_irq_rearm()
513 *ih->rptr_cpu = ih->rptr; in vega20_ih_set_rptr()
514 WDOORBELL32(ih->doorbell_index, ih->rptr); in vega20_ih_set_rptr()
520 WREG32(ih_regs->ih_rb_rptr, ih->rptr); in vega20_ih_set_rptr()
/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/
A Drpc.c144 u32 size, rptr = *gsp->msgq.rptr; in r535_gsp_msgq_wait() local
155 used = wptr + gsp->msgq.cnt - rptr; in r535_gsp_msgq_wait()
173 u32 rptr = *gsp->msgq.rptr; in r535_gsp_msgq_get_entry() local
177 rptr * GSP_PAGE_SIZE); in r535_gsp_msgq_get_entry()
237 u32 rptr = *gsp->msgq.rptr; in r535_gsp_msgq_recv_one_elem() local
263 len = ((gsp->msgq.cnt - rptr) * GSP_PAGE_SIZE) - sizeof(*mqe); in r535_gsp_msgq_recv_one_elem()
279 rptr = (rptr + DIV_ROUND_UP(size, GSP_PAGE_SIZE)) % gsp->msgq.cnt; in r535_gsp_msgq_recv_one_elem()
282 (*gsp->msgq.rptr) = rptr; in r535_gsp_msgq_recv_one_elem()
380 free = *gsp->cmdq.rptr + gsp->cmdq.cnt - wptr - 1; in r535_gsp_cmdq_push()
512 if (*gsp->msgq.rptr != *gsp->msgq.wptr) in r535_gsp_msg_recv()
/drivers/gpu/drm/radeon/
A Dradeon_ring.c85 uint32_t rptr = radeon_ring_get_rptr(rdev, ring); in radeon_ring_free_size() local
88 ring->ring_free_dw = rptr + (ring->ring_size / 4); in radeon_ring_free_size()
256 uint32_t rptr = radeon_ring_get_rptr(rdev, ring); in radeon_ring_test_lockup() local
260 if (rptr != atomic_read(&ring->last_rptr)) { in radeon_ring_test_lockup()
472 uint32_t rptr, wptr, rptr_next; in radeon_debugfs_ring_info_show() local
482 rptr = radeon_ring_get_rptr(rdev, ring); in radeon_debugfs_ring_info_show()
484 rptr, rptr); in radeon_debugfs_ring_info_show()
508 i = (rptr + ring->ptr_mask + 1 - 32) & ring->ptr_mask; in radeon_debugfs_ring_info_show()
511 if (rptr == i) in radeon_debugfs_ring_info_show()
/drivers/gpu/drm/amd/display/dmub/src/
A Ddmub_srv.c816 dmub->inbox1.rb.rptr = 0; in dmub_srv_hw_reset()
823 dmub->outbox0_rb.rptr = 0; in dmub_srv_hw_reset()
825 dmub->outbox1_rb.rptr = 0; in dmub_srv_hw_reset()
1129 if (rb->rptr == rb->wrpt) in dmub_rb_out_trace_buffer_front()
1139 rb->rptr %= rb->capacity; in dmub_rb_out_trace_buffer_front()
1291 dmub->inbox1.rb.rptr = rptr; in dmub_srv_sync_inbox1()
1344 uint32_t rptr; in dmub_srv_update_inbox_status() local
1355 if (rptr > dmub->inbox1.rb.capacity) in dmub_srv_update_inbox_status()
1358 if (dmub->inbox1.rb.rptr > rptr) { in dmub_srv_update_inbox_status()
1362 dmub->inbox1.num_reported += (rptr - dmub->inbox1.rb.rptr) / DMUB_RB_CMD_SIZE; in dmub_srv_update_inbox_status()
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/drivers/net/ethernet/tehuti/
A Dtn40.c53 f->rptr = 0; in tn40_fifo_alloc()
297 size = f->m.wptr - f->m.rptr; in tn40_rx_receive()
348 f->m.rptr += tmp_len; in tn40_rx_receive()
351 f->m.rptr = tmp_len; in tn40_rx_receive()
358 f->m.rptr, tmp_len); in tn40_rx_receive()
491 d->rptr = d->start; in tn40_tx_db_init()
700 fsize = f->m.rptr - f->m.wptr; in tn40_tx_space()
829 f->m.rptr &= f->m.size_mask; in tn40_tx_cleanup()
841 } while (db->rptr->len > 0); in tn40_tx_cleanup()
847 db->rptr->addr.skb, -db->rptr->len); in tn40_tx_cleanup()
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A Dtehuti.c170 f->rptr = 0; in bdx_fifo_init()
1210 size = f->m.wptr - f->m.rptr; in bdx_rx_receive()
1231 f->m.rptr += tmp_len; in bdx_rx_receive()
1235 f->m.rptr = tmp_len; in bdx_rx_receive()
1238 f->m.rptr, tmp_len); in bdx_rx_receive()
1426 d->rptr = d->start; in bdx_tx_db_init()
1568 fsize = f->m.rptr - f->m.wptr; in bdx_tx_space()
1707 f->m.rptr += BDX_TXF_DESC_SZ; in bdx_tx_cleanup()
1708 f->m.rptr &= f->m.size_mask; in bdx_tx_cleanup()
1718 } while (db->rptr->len > 0); in bdx_tx_cleanup()
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/drivers/crypto/ccp/
A Dtee-dev.c220 u32 rptr; in tee_submit_cmd() local
232 rptr = ioread32(tee->io_regs + tee->vdata->ring_rptr_reg); in tee_submit_cmd()
237 if (!(tee->rb_mgr.wptr + sizeof(struct tee_ring_cmd) == rptr || in tee_submit_cmd()
242 rptr, tee->rb_mgr.wptr); in tee_submit_cmd()
252 (tee->rb_mgr.wptr + sizeof(struct tee_ring_cmd) == rptr || in tee_submit_cmd()
255 rptr, tee->rb_mgr.wptr, cmd->flag); in tee_submit_cmd()
/drivers/gpu/drm/amd/display/dmub/inc/
A Ddmub_cmd.h6374 if (rb->wrpt >= rb->rptr) in dmub_rb_num_outstanding()
6392 if (rb->wrpt >= rb->rptr) in dmub_rb_num_free()
6414 if (rb->wrpt >= rb->rptr) in dmub_rb_full()
6529 uint32_t rptr) in dmub_rb_peek_offset() argument
6578 rb->rptr += DMUB_RB_CMD_SIZE; in dmub_rb_pop_front()
6581 rb->rptr %= rb->capacity; in dmub_rb_pop_front()
6596 uint32_t rptr = rb->rptr; in dmub_rb_flush_pending() local
6599 while (rptr != wptr) { in dmub_rb_flush_pending()
6606 rptr += DMUB_RB_CMD_SIZE; in dmub_rb_flush_pending()
6607 if (rptr >= rb->capacity) in dmub_rb_flush_pending()
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/drivers/video/fbdev/
A Dmaxinefb.c77 unsigned char *rptr; in maxinefb_ims332_read_register() local
80 rptr = regs + 0x80000 + (regno << 4); in maxinefb_ims332_read_register()
81 j = *((volatile unsigned short *) rptr); in maxinefb_ims332_read_register()
/drivers/net/ppp/
A Dppp_deflate.c46 static int z_compress(void *state, unsigned char *rptr,
185 static int z_compress(void *arg, unsigned char *rptr, unsigned char *obuf, in z_compress() argument
195 proto = PPP_PROTOCOL(rptr); in z_compress()
209 wptr[0] = PPP_ADDRESS(rptr); in z_compress()
210 wptr[1] = PPP_CONTROL(rptr); in z_compress()
221 rptr += off; in z_compress()
222 state->strm.next_in = rptr; in z_compress()
/drivers/gpu/drm/qxl/
A Dqxl_object.c210 void *rptr; in qxl_bo_kmap_atomic_page() local
226 rptr = bo->kptr + (page_offset * PAGE_SIZE); in qxl_bo_kmap_atomic_page()
227 return rptr; in qxl_bo_kmap_atomic_page()
233 rptr = bo_map.vaddr; /* TODO: Use mapping abstraction properly */ in qxl_bo_kmap_atomic_page()
235 rptr += page_offset * PAGE_SIZE; in qxl_bo_kmap_atomic_page()
236 return rptr; in qxl_bo_kmap_atomic_page()
/drivers/i2c/busses/
A Di2c-cpm.c305 int rptr; in cpm_i2c_xfer() local
317 rptr = 0; in cpm_i2c_xfer()
329 dev_dbg(&adap->dev, "R: %d T: %d\n", rptr, tptr); in cpm_i2c_xfer()
331 cpm_i2c_parse_message(adap, pmsg, num, tptr, rptr); in cpm_i2c_xfer()
333 rptr++; in cpm_i2c_xfer()
346 rptr = 0; in cpm_i2c_xfer()
355 !(in_be16(&rbdf[rptr].cbd_sc) & BD_SC_EMPTY), in cpm_i2c_xfer()
368 ret = cpm_i2c_check_message(adap, pmsg, tptr, rptr); in cpm_i2c_xfer()
371 rptr++; in cpm_i2c_xfer()

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