| /drivers/net/ethernet/marvell/octeontx2/af/ |
| A D | rvu_cgx.c | 487 int pf = rvu_get_pf(rvu->pdev, pcifunc); in rvu_cgx_config_rxtx() 504 int pf = rvu_get_pf(rvu->pdev, pcifunc); in rvu_cgx_tx_enable() 529 int pf = rvu_get_pf(rvu->pdev, pcifunc); in rvu_cgx_disable_dmac_entries() 788 int pf = rvu_get_pf(rvu->pdev, pcifunc); in rvu_mbox_handler_cgx_promisc_enable() 826 int pf = rvu_get_pf(rvu->pdev, pcifunc); in rvu_cgx_ptp_rx_cfg() 876 int pf = rvu_get_pf(rvu->pdev, pcifunc); in rvu_cgx_config_linkevents() 915 pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc); in rvu_mbox_handler_cgx_get_linkinfo() 973 int pf = rvu_get_pf(rvu->pdev, pcifunc); in rvu_cgx_config_intlbk() 1003 int pf = rvu_get_pf(rvu->pdev, pcifunc); in rvu_cgx_cfg_pause_frm() 1277 int pf = rvu_get_pf(rvu->pdev, pcifunc); in rvu_cgx_prio_flow_ctrl_cfg() [all …]
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| A D | rvu_rep.c | 42 pf = rvu_get_pf(rvu->pdev, event->pcifunc); in rvu_rep_up_notify() 117 if (!is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, pcifunc))) in rvu_rep_notify_pfvf_state() 120 pf = rvu_get_pf(rvu->pdev, rvu->rep_pcifunc); in rvu_rep_notify_pfvf_state()
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| A D | rvu_npc_hash.c | 1468 int pf = rvu_get_pf(rvu->pdev, pcifunc); in rvu_npc_exact_promisc_disable() 1515 int pf = rvu_get_pf(rvu->pdev, pcifunc); in rvu_npc_exact_promisc_enable() 1563 int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc); in rvu_npc_exact_mac_addr_reset() 1596 int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc); in rvu_npc_exact_mac_addr_update() 1678 int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc); in rvu_npc_exact_mac_addr_add() 1714 int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc); in rvu_npc_exact_mac_addr_del() 1739 int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc); in rvu_npc_exact_mac_addr_set()
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| A D | rvu_sdp.c | 22 u16 pf = rvu_get_pf(rvu->pdev, pcifunc); in is_sdp_pfvf()
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| A D | rvu_nix.c | 319 rvu_get_pf(rvu->pdev, pcifunc))) in is_valid_txschq() 343 pf = rvu_get_pf(rvu->pdev, pcifunc); in nix_interface_init() 594 pf = rvu_get_pf(rvu->pdev, pcifunc); in nix_bp_disable() 740 pf = rvu_get_pf(rvu->pdev, pcifunc); in nix_bp_enable() 1802 rvu_get_pf(rvu->pdev, pcifunc), in rvu_mbox_handler_nix_mark_format_cfg() 3195 rvu_get_pf(rvu->pdev, pcifunc), in nix_blk_setup_mce() 3464 rvu_get_pf(rvu->pdev, pcifunc)); in nix_update_mce_list() 3557 pf = rvu_get_pf(rvu->pdev, pcifunc); in nix_update_mce_rule() 5258 pf = rvu_get_pf(rvu->pdev, pcifunc); in rvu_mbox_handler_nix_lf_start_rx() 5291 pf = rvu_get_pf(rvu->pdev, pcifunc); in rvu_mbox_handler_nix_lf_stop_rx() [all …]
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| A D | mcs_rvu_if.c | 100 pfvf = &mcs->pf[rvu_get_pf(rvu->pdev, pcifunc)]; in mcs_add_intr_wq_entry() 126 pf = rvu_get_pf(rvu->pdev, event->pcifunc); in mcs_notify_pfvf() 196 pfvf = &mcs->pf[rvu_get_pf(rvu->pdev, pcifunc)]; in rvu_mbox_handler_mcs_intr_cfg()
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| A D | rvu_cn10k.c | 69 return ((rvu_get_pf(rvu->pdev, pcifunc) * LMT_MAX_VFS) + in rvu_get_lmtst_tbl_index() 86 pf = rvu_get_pf(rvu->pdev, pcifunc) & RVU_OTX2_PFVF_PF_MASK; in rvu_get_lmtaddr()
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| A D | rvu.c | 297 devnum = rvu_get_pf(rvu->pdev, pcifunc); in rvu_get_blkaddr() 362 devnum = rvu_get_pf(rvu->pdev, pcifunc); in rvu_update_rsrc_map() 420 pf = rvu_get_pf(rvu->pdev, pcifunc); in rvu_get_hwvf() 435 return &rvu->pf[rvu_get_pf(rvu->pdev, pcifunc)]; in rvu_get_pfvf() 443 pf = rvu_get_pf(rvu->pdev, pcifunc); in is_pf_func_valid() 1490 if (is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, pcifunc))) { in rvu_get_nix_blkaddr() 2009 RVU_PRIV_PFX_CFG(rvu_get_pf(rvu->pdev, pcifunc))); in rvu_mbox_handler_vf_flr() 2267 msg->id, rvu_get_pf(rvu->pdev, msg->pcifunc), in __rvu_mbox_handler()
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| A D | rvu.h | 926 static inline int rvu_get_pf(struct pci_dev *pdev, u16 pcifunc) in rvu_get_pf() function 952 is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, pcifunc))); in is_cgx_vf()
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| A D | rvu_cpt.c | 413 if (rvu_get_pf(rvu->pdev, pcifunc) != cpt_pf_num) in is_cpt_pf() 425 if (rvu_get_pf(rvu->pdev, pcifunc) != cpt_pf_num) in is_cpt_vf()
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| A D | rvu_debugfs.c | 2691 rvu_get_pf(rvu->pdev, pcifunc)); in rvu_dbg_nix_band_prof_ctx_display() 2694 rvu_get_pf(rvu->pdev, pcifunc), in rvu_dbg_nix_band_prof_ctx_display() 3145 rvu_get_pf(rvu->pdev, pcifunc)); in rvu_print_npc_mcam_info() 3148 rvu_get_pf(rvu->pdev, pcifunc), in rvu_print_npc_mcam_info() 3488 pf = rvu_get_pf(rvu->pdev, iter->owner); in rvu_dbg_npc_mcam_show_rules() 3506 pf = rvu_get_pf(rvu->pdev, target); in rvu_dbg_npc_mcam_show_rules()
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| A D | rvu_npc.c | 152 int pf = rvu_get_pf(rvu->pdev, pcifunc); in npc_get_nixlf_mcam_index() 703 is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, pcifunc))) { in rvu_npc_install_promisc_entry() 3439 int pf = rvu_get_pf(rvu->pdev, pcifunc); in rvu_npc_set_parse_mode()
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| /drivers/net/ethernet/marvell/octeontx2/nic/ |
| A D | otx2_pf.c | 210 rvu_get_pf(pf->pdev, pf->pcifunc)); in otx2_register_flr_me_intr() 221 rvu_get_pf(pf->pdev, pf->pcifunc)); in otx2_register_flr_me_intr() 233 rvu_get_pf(pf->pdev, pf->pcifunc)); in otx2_register_flr_me_intr() 243 rvu_get_pf(pf->pdev, pf->pcifunc)); in otx2_register_flr_me_intr() 738 "RVUPF%d_VF Mbox0", rvu_get_pf(pf->pdev, pf->pcifunc)); in otx2_register_pfvf_mbox_intr() 755 rvu_get_pf(pf->pdev, pf->pcifunc)); in otx2_register_pfvf_mbox_intr() 1129 rvu_get_pf(pf->pdev, pf->pcifunc)); in otx2_register_mbox_intr() 1138 rvu_get_pf(pf->pdev, pf->pcifunc)); in otx2_register_mbox_intr() 2046 rvu_get_pf(pf->pdev, pf->pcifunc)); in otx2_open() 2064 rvu_get_pf(pf->pdev, pf->pcifunc), qidx); in otx2_open() [all …]
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| A D | rep.c | 247 attrs.phys.port_number = rvu_get_pf(priv->pdev, rep->pcifunc); in rvu_rep_devlink_port_register() 250 attrs.pci_vf.pf = rvu_get_pf(priv->pdev, rep->pcifunc); in rvu_rep_devlink_port_register() 675 rvu_get_pf(priv->pdev, pcifunc), in rvu_rep_create()
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| A D | cn20k.c | 231 "RVUPF%d_VF%d Mbox%d", rvu_get_pf(pf->pdev, in cn20k_register_pfvf_mbox_intr()
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| A D | otx2_tc.c | 470 if (rvu_get_pf(nic->pdev, nic->pcifunc) != in otx2_tc_parse_actions() 471 rvu_get_pf(nic->pdev, priv->pcifunc)) { in otx2_tc_parse_actions()
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| /drivers/crypto/marvell/octeontx2/ |
| A D | otx2_cptpf_mbox.c | 472 cptpf->pf_id = rvu_get_pf(cptpf->pdev, msg->pcifunc); in process_afpf_mbox_msg()
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