| /drivers/net/ethernet/marvell/octeontx2/af/ |
| A D | rvu_cpt.c | 35 reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_STS(e)); \ 150 reg = rvu_read64(rvu, blkaddr, CPT_AF_RVU_INT); in rvu_cpt_af_rvu_intr_handler() 164 reg = rvu_read64(rvu, blkaddr, CPT_AF_RAS_INT); in rvu_cpt_af_ras_intr_handler() 789 rsp->val = rvu_read64(rvu, blkaddr, offset); in rvu_mbox_handler_cpt_rd_wr_register() 804 rsp->ctx_aop_lat_pc = rvu_read64(rvu, blkaddr, in get_ctx_pc() 813 rsp->ctx_wback_lat_pc = rvu_read64(rvu, blkaddr, in get_ctx_pc() 816 rsp->ctx_psh_lat_pc = rvu_read64(rvu, blkaddr, in get_ctx_pc() 1079 inprog = rvu_read64(rvu, blkaddr, in cpt_lf_disable_iqueue() 1085 qsize = rvu_read64(rvu, blkaddr, in cpt_lf_disable_iqueue() 1088 inst_ptr = rvu_read64(rvu, blkaddr, in cpt_lf_disable_iqueue() [all …]
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| A D | rvu_debugfs.c | 1763 rvu_read64(rvu, blkaddr, in print_tm_topo() 1766 rvu_read64(rvu, blkaddr, in print_tm_topo() 1783 rvu_read64(rvu, blkaddr, in print_tm_topo() 1786 rvu_read64(rvu, blkaddr, in print_tm_topo() 1797 rvu_read64(rvu, blkaddr, in print_tm_topo() 1802 rvu_read64(rvu, blkaddr, in print_tm_topo() 1805 rvu_read64(rvu, blkaddr, in print_tm_topo() 1812 rvu_read64(rvu, blkaddr, in print_tm_topo() 1823 rvu_read64(rvu, blkaddr, in print_tm_topo() 1828 rvu_read64(rvu, blkaddr, in print_tm_topo() [all …]
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| A D | rvu_cn10k.c | 30 tbl_base = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_MAP_BASE); in lmtst_map_table_ops() 31 cfg = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_CFG); in lmtst_map_table_ops() 58 rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_CTL); in lmtst_map_table_ops() 96 val = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_RSP_STS); in rvu_get_lmtaddr() 308 nix_const = rvu_read64(rvu, blkaddr, NIX_AF_CONST); in rvu_set_channels_base() 309 nix_const1 = rvu_read64(rvu, blkaddr, NIX_AF_CONST1); in rvu_set_channels_base() 453 u64 nix_const1 = rvu_read64(rvu, blkaddr, NIX_AF_CONST1); in __rvu_nix_set_channels() 454 u64 nix_const = rvu_read64(rvu, blkaddr, NIX_AF_CONST); in __rvu_nix_set_channels() 468 cfg = rvu_read64(rvu, blkaddr, NIX_AF_LINKX_CFG(nix_link)); in __rvu_nix_set_channels() 572 cfg = rvu_read64(rvu, blkaddr, NIX_AF_CFG); in rvu_nix_block_cn10k_init() [all …]
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| A D | rvu_npa.c | 26 reg = rvu_read64(rvu, block->addr, NPA_AF_AQ_STATUS); in npa_aq_enqueue_wait() 363 ctx_cfg = rvu_read64(rvu, blkaddr, NPA_AF_CONST1); in rvu_mbox_handler_npa_lf_alloc() 389 cfg = rvu_read64(rvu, blkaddr, NPA_AF_CONST); in rvu_mbox_handler_npa_lf_alloc() 424 cfg = rvu_read64(rvu, blkaddr, NPA_AF_CONST); in rvu_mbox_handler_npa_lf_alloc() 429 cfg = rvu_read64(rvu, block->addr, NPA_AF_BATCH_CTL); in rvu_mbox_handler_npa_lf_alloc() 473 cfg = rvu_read64(rvu, block->addr, NPA_AF_GEN_CFG); in npa_aq_init() 483 cfg = rvu_read64(rvu, block->addr, NPA_AF_NDC_CFG); in npa_aq_init() 493 cfg = rvu_read64(rvu, block->addr, NPA_AF_BATCH_CTL); in npa_aq_init() 571 reg = rvu_read64(rvu, blkaddr, NDC_AF_CAMS_RD_INTERVAL); in rvu_ndc_fix_locked_cacheline() 581 ndc_af_const = rvu_read64(rvu, blkaddr, NDC_AF_CONST); in rvu_ndc_fix_locked_cacheline() [all …]
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| A D | rvu.c | 555 cfg = rvu_read64(rvu, block->addr, in rvu_scan_block() 655 cfg = rvu_read64(rvu, BLKADDR_RVUM, in rvu_setup_msix_resources() 675 cfg = rvu_read64(rvu, BLKADDR_RVUM, in rvu_setup_msix_resources() 856 cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST2); in rvu_setup_nix_hw_resource() 947 cfg = rvu_read64(rvu, BLKADDR_NPA, NPA_AF_CONST); in rvu_setup_hw_resources() 986 cfg = rvu_read64(rvu, BLKADDR_SSO, SSO_AF_CONST); in rvu_setup_hw_resources() 2008 cfg = rvu_read64(rvu, BLKADDR_RVUM, in rvu_mbox_handler_vf_flr() 2408 bar4 = rvu_read64(rvu, BLKADDR_RVUM, in rvu_get_mbox_regions() 2432 bar4 = rvu_read64(rvu, BLKADDR_RVUM, in rvu_get_mbox_regions() 2435 bar4 = rvu_read64(rvu, BLKADDR_RVUM, in rvu_get_mbox_regions() [all …]
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| A D | rvu_nix.c | 1865 oldval = rvu_read64(rvu, blkaddr, reg); in handle_txschq_shaper_update() 1984 cfg = rvu_read64(rvu, blkaddr, cir_reg); in nix_reset_tx_shaping() 1989 cfg = rvu_read64(rvu, blkaddr, pir_reg); in nix_reset_tx_shaping() 2476 cfg = rvu_read64(rvu, blkaddr, in nix_smq_flush() 2503 cfg = rvu_read64(rvu, blkaddr, in nix_smq_flush() 2905 val = rvu_read64(rvu, blkaddr, reg); in rvu_mbox_handler_nix_txschq_cfg() 3780 cfg = rvu_read64(rvu, blkaddr, reg); in nix_setup_txschq() 3915 dwrr_mtu = rvu_read64(rvu, blkaddr, in rvu_mbox_handler_nix_get_hw_info() 3919 dwrr_mtu = rvu_read64(rvu, blkaddr, in rvu_mbox_handler_nix_get_hw_info() 3923 dwrr_mtu = rvu_read64(rvu, blkaddr, in rvu_mbox_handler_nix_get_hw_info() [all …]
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| A D | rvu_devlink.c | 70 intr = rvu_read64(rvu, blkaddr, NIX_AF_RVU_INT); in rvu_nix_af_rvu_intr_handler() 105 intr = rvu_read64(rvu, blkaddr, NIX_AF_GEN_INT); in rvu_nix_af_rvu_gen_handler() 140 intr = rvu_read64(rvu, blkaddr, NIX_AF_ERR_INT); in rvu_nix_af_rvu_err_handler() 175 intr = rvu_read64(rvu, blkaddr, NIX_AF_ERR_INT); in rvu_nix_af_rvu_ras_handler() 617 intr = rvu_read64(rvu, blkaddr, NPA_AF_RVU_INT); in rvu_npa_af_rvu_intr_handler() 652 intr = rvu_read64(rvu, blkaddr, NPA_AF_GEN_INT); in rvu_npa_af_gen_intr_handler() 686 intr = rvu_read64(rvu, blkaddr, NPA_AF_ERR_INT); in rvu_npa_af_err_intr_handler() 721 intr = rvu_read64(rvu, blkaddr, NPA_AF_RAS); in rvu_npa_af_ras_intr_handler() 1229 dwrr_mtu = rvu_read64(rvu, BLKADDR_NIX0, in rvu_af_dl_dwrr_mtu_get() 1432 cfg = rvu_read64(rvu, BLKADDR_NIX0, NIX_AF_CONST2); in rvu_af_dl_nix_maxlf_validate() [all …]
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| A D | rvu_npc.c | 384 return rvu_read64(rvu, blkaddr, in npc_get_default_entry_action() 518 cam1 = rvu_read64(rvu, blkaddr, in npc_read_mcam_entry() 520 cam0 = rvu_read64(rvu, blkaddr, in npc_read_mcam_entry() 524 cam1 = rvu_read64(rvu, blkaddr, in npc_read_mcam_entry() 526 cam0 = rvu_read64(rvu, blkaddr, in npc_read_mcam_entry() 534 rvu_read64(rvu, blkaddr, in npc_read_mcam_entry() 538 *ena = rvu_read64(rvu, blkaddr, in npc_read_mcam_entry() 564 cfg = rvu_read64(rvu, blkaddr, in npc_copy_mcam_entry() 570 cfg = rvu_read64(rvu, blkaddr, in npc_copy_mcam_entry() 576 cfg = rvu_read64(rvu, blkaddr, in npc_copy_mcam_entry() [all …]
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| A D | rvu_npc_hash.h | 35 rvu_read64(rvu, blkaddr, NPC_AF_INTFX_HASHX_RESULT_CTRL(intf, ld)) 38 rvu_read64(rvu, blkaddr, NPC_AF_INTFX_HASHX_MASKX(intf, ld, mask_idx))
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| A D | rvu_npc_hash.c | 109 cfg = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_LIDX_LTX_LDX_CFG(intf, lid, lt, ld)); in npc_update_use_hash() 247 cfg = rvu_read64(rvu, blkaddr, in npc_program_mkex_hash() 300 cfg = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_HASHX_CFG(intf, hash_idx)); in npc_update_field_hash() 373 secret_key[0] = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_SECRET_KEY0(intf)); in rvu_mbox_handler_npc_get_field_hash_info() 374 secret_key[1] = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_SECRET_KEY1(intf)); in rvu_mbox_handler_npc_get_field_hash_info() 375 secret_key[2] = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_SECRET_KEY2(intf)); in rvu_mbox_handler_npc_get_field_hash_info() 1887 npc_const3 = rvu_read64(rvu, blkaddr, NPC_AF_CONST3); in rvu_npc_exact_init() 1892 cfg = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(NIX_INTF_RX)); in rvu_npc_exact_init()
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| A D | rvu.h | 668 static inline u64 rvu_read64(struct rvu *rvu, u64 block, u64 offset) in rvu_read64() function 689 rvu_read64(rvu, block, offset); in rvu_bar2_sel_write64() 790 npc_const3 = rvu_read64(rvu, BLKADDR_NPC, NPC_AF_CONST3); in is_rvu_npc_hash_extract_en() 800 u64 nix_const = rvu_read64(rvu, BLKADDR_NIX0, NIX_AF_CONST); in rvu_nix_chan_cgx() 814 u64 nix_const = rvu_read64(rvu, BLKADDR_NIX0, NIX_AF_CONST); in rvu_nix_chan_lbk()
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| A D | rvu_sdp.c | 119 rsp->num_chan = rvu_read64(rvu, blkaddr, NIX_AF_CONST1) & 0xFFFUL; in rvu_mbox_handler_get_sdp_chan_info()
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| A D | rvu_rep.c | 142 rvu_read64(rvu, blkaddr, NIX_AF_LFX_RX_STATX(nixlf, reg)) 145 rvu_read64(rvu, blkaddr, NIX_AF_LFX_TX_STATX(nixlf, reg))
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| A D | rvu_npc_fs.c | 218 cfg = rvu_read64(rvu, blkaddr, in npc_check_overlap() 645 cfg = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(intf)); in npc_scan_kex() 667 cfg = rvu_read64(rvu, blkaddr, in npc_scan_kex() 1578 rsp->cntr_val = rvu_read64(rvu, blkaddr, in rvu_mbox_handler_npc_delete_flow()
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| A D | rvu_cgx.c | 1116 *stat += rvu_read64(rvu, blkaddr, in rvu_cgx_nix_cuml_stats() 1119 *stat += rvu_read64(rvu, blkaddr, in rvu_cgx_nix_cuml_stats()
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| /drivers/net/ethernet/marvell/octeontx2/af/cn20k/ |
| A D | mbox_init.c | 109 intr = rvu_read64(rvu, BLKADDR_RVUM, rvu_irq_data->intr_status); in cn20k_mbox_pf_common_intr_handler() 400 ctx_cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST3); in rvu_alloc_cint_qint_mem() 402 cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST2); in rvu_alloc_cint_qint_mem() 413 cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST2); in rvu_alloc_cint_qint_mem()
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