| /drivers/clk/mvebu/ |
| A D | orion.c | 30 u32 opt = (readl(sar) >> SAR_MV88F5181_TCLK_FREQ) & in mv88f5181_get_tclk_freq() 47 u32 opt = (readl(sar) >> SAR_MV88F5181_CPU_FREQ) & in mv88f5181_get_cpu_freq() 62 u32 opt = (readl(sar) >> SAR_MV88F5181_CPU_FREQ) & in mv88f5181_get_clk_ratio() 100 u32 opt = (readl(sar) >> SAR_MV88F5182_TCLK_FREQ) & in mv88f5182_get_tclk_freq() 115 u32 opt = (readl(sar) >> SAR_MV88F5182_CPU_FREQ) & in mv88f5182_get_cpu_freq() 130 u32 opt = (readl(sar) >> SAR_MV88F5182_CPU_FREQ) & in mv88f5182_get_clk_ratio() 174 u32 opt = (readl(sar) >> SAR_MV88F5281_CPU_FREQ) & in mv88f5281_get_cpu_freq() 187 u32 opt = (readl(sar) >> SAR_MV88F5281_CPU_FREQ) & in mv88f5281_get_clk_ratio() 225 u32 opt = (readl(sar) >> SAR_MV88F6183_TCLK_FREQ) & in mv88f6183_get_tclk_freq() 240 u32 opt = (readl(sar) >> SAR_MV88F6183_CPU_FREQ) & in mv88f6183_get_cpu_freq() [all …]
|
| A D | kirkwood.c | 86 static u32 __init kirkwood_get_tclk_freq(void __iomem *sar) in kirkwood_get_tclk_freq() argument 88 u32 opt = (readl(sar) >> SAR_KIRKWOOD_TCLK_FREQ) & in kirkwood_get_tclk_freq() 108 static u32 __init kirkwood_get_cpu_freq(void __iomem *sar) in kirkwood_get_cpu_freq() argument 110 u32 opt = SAR_KIRKWOOD_CPU_FREQ(readl(sar)); in kirkwood_get_cpu_freq() 127 void __iomem *sar, int id, int *mult, int *div) in kirkwood_get_clk_ratio() argument 132 u32 opt = SAR_KIRKWOOD_L2_RATIO(readl(sar)); in kirkwood_get_clk_ratio() 139 u32 opt = (readl(sar) >> SAR_KIRKWOOD_DDR_RATIO) & in kirkwood_get_clk_ratio() 155 static u32 __init mv88f6180_get_cpu_freq(void __iomem *sar) in mv88f6180_get_cpu_freq() argument 167 void __iomem *sar, int id, int *mult, int *div) in mv88f6180_get_clk_ratio() argument 179 u32 opt = (readl(sar) >> SAR_MV88F6180_CLK) & in mv88f6180_get_clk_ratio() [all …]
|
| A D | armada-370.c | 45 static u32 __init a370_get_tclk_freq(void __iomem *sar) in a370_get_tclk_freq() argument 49 tclk_freq_select = ((readl(sar) >> SARL_A370_TCLK_FREQ_OPT) & in a370_get_tclk_freq() 64 static u32 __init a370_get_cpu_freq(void __iomem *sar) in a370_get_cpu_freq() argument 69 cpu_freq_select = ((readl(sar) >> SARL_A370_PCLK_FREQ_OPT) & in a370_get_cpu_freq() 114 void __iomem *sar, int id, int *mult, int *div) in a370_get_clk_ratio() argument 116 u32 opt = ((readl(sar) >> SARL_A370_FAB_FREQ_OPT) & in a370_get_clk_ratio() 135 static bool a370_is_sscg_enabled(void __iomem *sar) in a370_is_sscg_enabled() argument 137 return !(readl(sar) & SARL_A370_SSCG_ENABLE); in a370_is_sscg_enabled()
|
| A D | armada-39x.c | 45 static u32 __init armada_39x_get_tclk_freq(void __iomem *sar) in armada_39x_get_tclk_freq() argument 49 tclk_freq_select = ((readl(sar + SARL) >> SARL_A390_TCLK_FREQ_OPT) & in armada_39x_get_tclk_freq() 68 static u32 __init armada_39x_get_cpu_freq(void __iomem *sar) in armada_39x_get_cpu_freq() argument 72 cpu_freq_select = ((readl(sar + SARL) >> SARL_A390_CPU_DDR_L2_FREQ_OPT) & in armada_39x_get_cpu_freq() 92 void __iomem *sar, int id, int *mult, int *div) in armada_39x_get_clk_ratio() argument 110 static u32 __init armada_39x_refclk_ratio(void __iomem *sar) in armada_39x_refclk_ratio() argument 112 if (readl(sar + SARH) & SARH_A390_REFCLK_FREQ) in armada_39x_refclk_ratio()
|
| A D | dove.c | 87 static u32 __init dove_get_tclk_freq(void __iomem *sar) in dove_get_tclk_freq() argument 89 u32 opt = (readl(sar) >> SAR_DOVE_TCLK_FREQ) & in dove_get_tclk_freq() 106 static u32 __init dove_get_cpu_freq(void __iomem *sar) in dove_get_cpu_freq() argument 108 u32 opt = (readl(sar) >> SAR_DOVE_CPU_FREQ) & in dove_get_cpu_freq() 126 void __iomem *sar, int id, int *mult, int *div) in dove_get_clk_ratio() argument 131 u32 opt = (readl(sar) >> SAR_DOVE_L2_RATIO) & in dove_get_clk_ratio() 139 u32 opt = (readl(sar) >> SAR_DOVE_DDR_RATIO) & in dove_get_clk_ratio()
|
| A D | armada-xp.c | 47 static u32 __init axp_get_tclk_freq(void __iomem *sar) in axp_get_tclk_freq() argument 67 static u32 __init axp_get_cpu_freq(void __iomem *sar) in axp_get_cpu_freq() argument 72 cpu_freq_select = ((readl(sar + SARL) >> SARL_AXP_PCLK_FREQ_OPT) & in axp_get_cpu_freq() 78 cpu_freq_select |= (((readl(sar + SARH) >> SARH_AXP_PCLK_FREQ_OPT) & in axp_get_cpu_freq() 123 void __iomem *sar, int id, int *mult, int *div) in axp_get_clk_ratio() argument 125 u32 opt = ((readl(sar + SARL) >> SARL_AXP_FAB_FREQ_OPT) & in axp_get_clk_ratio() 131 opt |= (((readl(sar + SARH) >> SARH_AXP_FAB_FREQ_OPT) & in axp_get_clk_ratio()
|
| A D | common.h | 28 u32 (*get_tclk_freq)(void __iomem *sar); 29 u32 (*get_cpu_freq)(void __iomem *sar); 30 void (*get_clk_ratio)(void __iomem *sar, int id, int *mult, int *div); 31 u32 (*get_refclk_freq)(void __iomem *sar); 32 bool (*is_sscg_enabled)(void __iomem *sar);
|
| A D | armada-375.c | 50 static u32 __init armada_375_get_tclk_freq(void __iomem *sar) in armada_375_get_tclk_freq() argument 54 tclk_freq_select = ((readl(sar) >> SAR1_A375_TCLK_FREQ_OPT) & in armada_375_get_tclk_freq() 71 static u32 __init armada_375_get_cpu_freq(void __iomem *sar) in armada_375_get_cpu_freq() argument 75 cpu_freq_select = ((readl(sar) >> SAR1_A375_CPU_DDR_L2_FREQ_OPT) & in armada_375_get_cpu_freq() 115 void __iomem *sar, int id, int *mult, int *div) in armada_375_get_clk_ratio() argument 117 u32 opt = ((readl(sar) >> SAR1_A375_CPU_DDR_L2_FREQ_OPT) & in armada_375_get_clk_ratio()
|
| A D | armada-38x.c | 37 static u32 __init armada_38x_get_tclk_freq(void __iomem *sar) in armada_38x_get_tclk_freq() argument 41 tclk_freq_select = ((readl(sar) >> SAR_A380_TCLK_FREQ_OPT) & in armada_38x_get_tclk_freq() 54 static u32 __init armada_38x_get_cpu_freq(void __iomem *sar) in armada_38x_get_cpu_freq() argument 58 cpu_freq_select = ((readl(sar) >> SAR_A380_CPU_DDR_L2_FREQ_OPT) & in armada_38x_get_cpu_freq() 99 void __iomem *sar, int id, int *mult, int *div) in armada_38x_get_clk_ratio() argument 101 u32 opt = ((readl(sar) >> SAR_A380_CPU_DDR_L2_FREQ_OPT) & in armada_38x_get_clk_ratio()
|
| A D | mv98dx3236.c | 44 static u32 __init mv98dx3236_get_tclk_freq(void __iomem *sar) in mv98dx3236_get_tclk_freq() argument 68 static u32 __init mv98dx3236_get_cpu_freq(void __iomem *sar) in mv98dx3236_get_cpu_freq() argument 73 cpu_freq_select = ((readl(sar) >> SAR1_MV98DX3236_CPU_DDR_MPLL_FREQ_OPT) & in mv98dx3236_get_cpu_freq() 118 void __iomem *sar, int id, int *mult, int *div) in mv98dx3236_get_clk_ratio() argument 120 u32 opt = ((readl(sar) >> SAR1_MV98DX3236_CPU_DDR_MPLL_FREQ_OPT) & in mv98dx3236_get_clk_ratio()
|
| /drivers/net/wireless/realtek/rtw88/ |
| A D | sar.c | 12 const struct rtw_sar *sar = &hal->sar; in rtw_query_sar() local 14 switch (sar->src) { in rtw_query_sar() 28 struct rtw_sar *sar = &hal->sar; in rtw_apply_sar() local 30 if (sar->src != RTW_SAR_SOURCE_NONE && new->src != sar->src) { in rtw_apply_sar() 35 *sar = *new; in rtw_apply_sar() 50 tmp = fct > txgi ? sar >> (fct - txgi) : sar << (txgi - fct); in rtw_sar_to_phy() 74 const struct cfg80211_sar_specs *sar) in rtw_set_sar_specs() argument 82 if (sar->type != NL80211_SAR_TYPE_POWER) in rtw_set_sar_specs() 88 for (i = 0; i < sar->num_sub_specs; i++) { in rtw_set_sar_specs() 89 idx = sar->sub_specs[i].freq_range_index; in rtw_set_sar_specs() [all …]
|
| A D | sar.h | 22 const struct cfg80211_sar_specs *sar);
|
| /drivers/net/wireless/realtek/rtw89/ |
| A D | sar.c | 204 _d->sar._cfg_name = *(_cfg_data); \ 205 _d->sar.src = _s; \ 418 const struct cfg80211_sar_specs *sar) in rtw89_ops_set_sar_specs() argument 430 if (sar->type != NL80211_SAR_TYPE_POWER) in rtw89_ops_set_sar_specs() 435 for (i = 0; i < sar->num_sub_specs; i++) { in rtw89_ops_set_sar_specs() 436 idx = sar->sub_specs[i].freq_range_index; in rtw89_ops_set_sar_specs() 442 power = sar->sub_specs[i].power; in rtw89_ops_set_sar_specs() 456 const struct rtw89_sar_cfg_acpi *sar) in rtw89_apply_sar_acpi() argument 463 src = rtwdev->sar.src; in rtw89_apply_sar_acpi() 473 for (i = 0; i < sar->valid_num; i++) { in rtw89_apply_sar_acpi() [all …]
|
| /drivers/bluetooth/ |
| A D | btintel.c | 2880 cmd->data[0] = sar->br >> 3; in btintel_send_edr() 2881 cmd->data[1] = sar->edr2 >> 3; in btintel_send_edr() 2891 cmd->data[0] = min3(sar->le, sar->le_lr, sar->le_2mhz) >> 3; in btintel_send_le() 2900 cmd->data[0] = sar->br >> 3; in btintel_send_br() 2909 cmd->data[0] = sar->br; in btintel_send_br_mutual() 2918 cmd->data[0] = sar->edr2; in btintel_send_edr2() 2927 cmd->data[0] = sar->edr3; in btintel_send_edr3() 3082 memset(&sar, 0, sizeof(sar)); in btintel_acpi_set_sar() 3085 sar.revision = revision; in btintel_acpi_set_sar() 3095 sar.revision = revision; in btintel_acpi_set_sar() [all …]
|
| /drivers/dma/dw-edma/ |
| A D | dw-hdma-v0-core.c | 156 u32 control, u32 size, u64 sar, u64 dar) in dw_hdma_v0_write_ll_data() argument 165 lli->sar.reg = sar; in dw_hdma_v0_write_ll_data() 172 writeq(sar, &lli->sar.reg); in dw_hdma_v0_write_ll_data() 205 child->sar, child->dar); in dw_hdma_v0_core_write_chunk()
|
| A D | dw-edma-v0-core.c | 280 u32 control, u32 size, u64 sar, u64 dar) in dw_edma_v0_write_ll_data() argument 289 lli->sar.reg = sar; in dw_edma_v0_write_ll_data() 296 writeq(sar, &lli->sar.reg); in dw_edma_v0_write_ll_data() 339 child->sar, child->dar); in dw_edma_v0_core_write_chunk()
|
| A D | dw-hdma-v0-regs.h | 47 } sar; member 107 } sar; member
|
| A D | dw-edma-v0-regs.h | 37 } sar; member 211 } sar; member
|
| A D | dw-hdma-v0-debugfs.c | 91 CTX_REGISTER(dw, sar.lsb, dir, ch), in dw_hdma_debugfs_regs_ch() 92 CTX_REGISTER(dw, sar.msb, dir, ch), in dw_hdma_debugfs_regs_ch()
|
| /drivers/net/wireless/mediatek/mt76/ |
| A D | mt792x_acpi_sar.c | 419 struct mt792x_acpi_sar *sar = phy->acpisar; in mt792x_acpi_parse_mtcl_tbl_v3() local 420 struct mt792x_asar_cl_v3 *cl = sar->countrylist_v3; in mt792x_acpi_parse_mtcl_tbl_v3() 423 if (sar->ver != 3) in mt792x_acpi_parse_mtcl_tbl_v3() 448 struct mt792x_acpi_sar *sar = phy->acpisar; in mt792x_acpi_parse_mtcl_tbl() local 449 struct mt792x_asar_cl *cl = sar->countrylist; in mt792x_acpi_parse_mtcl_tbl() 471 struct mt792x_acpi_sar *sar = phy->acpisar; in mt792x_acpi_get_mtcl_conf() local 474 if (!sar) in mt792x_acpi_get_mtcl_conf()
|
| /drivers/net/wireless/mediatek/mt76/mt76x0/ |
| A D | main.c | 35 const struct cfg80211_sar_specs *sar) in mt76x0_set_sar_specs() argument 45 err = mt76_init_sar_power(hw, sar); in mt76x0_set_sar_specs()
|
| A D | mt76x0.h | 54 const struct cfg80211_sar_specs *sar);
|
| /drivers/dma/ |
| A D | idma64.c | 242 u64 sar, dar; in idma64_hw_desc_fill() local 248 sar = hw->phys; in idma64_hw_desc_fill() 252 src_width = __ffs(sar | hw->len | 4); in idma64_hw_desc_fill() 255 sar = config->src_addr; in idma64_hw_desc_fill() 263 lli->sar = sar; in idma64_hw_desc_fill()
|
| /drivers/net/wireless/mediatek/mt76/mt76x2/ |
| A D | init.c | 12 const struct cfg80211_sar_specs *sar) in mt76x2_set_sar_specs() argument 22 err = mt76_init_sar_power(hw, sar); in mt76x2_set_sar_specs()
|
| /drivers/media/platform/amphion/ |
| A D | venc.c | 565 venc->params.sar.enable = ctrl->val; in venc_op_s_ctrl() 568 venc->params.sar.idc = ctrl->val; in venc_op_s_ctrl() 571 venc->params.sar.width = ctrl->val; in venc_op_s_ctrl() 574 venc->params.sar.height = ctrl->val; in venc_op_s_ctrl() 1226 venc->params.sar.enable, in venc_get_debug_info() 1227 venc->params.sar.idc, in venc_get_debug_info() 1228 venc->params.sar.width, in venc_get_debug_info() 1229 venc->params.sar.height); in venc_get_debug_info()
|