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Searched refs:scl (Results 1 – 25 of 36) sorted by relevance

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/drivers/gpu/drm/imx/dcss/
A Ddcss-scaler.c71 struct dcss_scaler *scl; member
289 struct dcss_scaler *scl = ch->scl; in dcss_scaler_write() local
291 dcss_ctxld_write(scl->ctxld, scl->ctx_id, val, ch->base_ofs + ofs); in dcss_scaler_write()
301 ch = &scl->ch[i]; in dcss_scaler_ch_init_all()
311 ch->scl = scl; in dcss_scaler_ch_init_all()
336 void dcss_scaler_exit(struct dcss_scaler *scl) in dcss_scaler_exit() argument
341 struct dcss_scaler_ch *ch = &scl->ch[ch_no]; in dcss_scaler_exit()
349 struct dcss_scaler_ch *ch = &scl->ch[ch_num]; in dcss_scaler_ch_enable()
763 struct dcss_scaler_ch *ch = &scl->ch[ch_num]; in dcss_scaler_set_filter()
827 dcss_ctxld_assert_locked(scl->ctxld); in dcss_scaler_write_sclctrl()
[all …]
A Ddcss-dev.h166 void dcss_scaler_exit(struct dcss_scaler *scl);
167 void dcss_scaler_set_filter(struct dcss_scaler *scl, int ch_num,
169 void dcss_scaler_setup(struct dcss_scaler *scl, int ch_num,
173 void dcss_scaler_ch_enable(struct dcss_scaler *scl, int ch_num, bool en);
174 int dcss_scaler_get_min_max_ratios(struct dcss_scaler *scl, int ch_num,
176 void dcss_scaler_write_sclctrl(struct dcss_scaler *scl);
/drivers/i2c/busses/
A Di2c-gpio.c23 struct gpio_desc *scl; member
56 gpiod_set_value_cansleep(priv->scl, state); in i2c_gpio_setscl_val()
70 return gpiod_get_value_cansleep(priv->scl); in i2c_gpio_getscl()
101 WIRE_ATTRIBUTE(scl);
168 int ret, irq = gpiod_to_irq(priv->scl); in i2c_gpio_fi_act_on_scl_irq()
175 ret = gpiod_direction_input(priv->scl); in i2c_gpio_fi_act_on_scl_irq()
190 ret = gpiod_direction_output(priv->scl, 1) ?: ret; in i2c_gpio_fi_act_on_scl_irq()
389 priv->scl = i2c_gpio_get_desc(dev, "scl", 1, gflags); in i2c_gpio_probe()
390 if (IS_ERR(priv->scl)) in i2c_gpio_probe()
391 return PTR_ERR(priv->scl); in i2c_gpio_probe()
[all …]
A Di2c-omap.c431 unsigned long scl; in omap_i2c_init() local
434 scl = internal_clk / 400; in omap_i2c_init()
435 fsscll = scl - (scl / 3) - 7; in omap_i2c_init()
436 fssclh = (scl / 3) - 5; in omap_i2c_init()
439 scl = fclk_rate / omap->speed; in omap_i2c_init()
440 hsscll = scl - (scl / 3) - 7; in omap_i2c_init()
441 hssclh = (scl / 3) - 5; in omap_i2c_init()
443 unsigned long scl; in omap_i2c_init() local
446 scl = internal_clk / omap->speed; in omap_i2c_init()
447 fsscll = scl - (scl / 3) - 7; in omap_i2c_init()
[all …]
A Di2c-hix5hd2.c123 u32 scl, sysclock; in hix5hd2_i2c_drv_setrate() local
131 scl = (sysclock / (rate * 2)) / 2 - 1; in hix5hd2_i2c_drv_setrate()
132 writel_relaxed(scl, priv->regs + HIX5I2C_SCL_H); in hix5hd2_i2c_drv_setrate()
133 writel_relaxed(scl, priv->regs + HIX5I2C_SCL_L); in hix5hd2_i2c_drv_setrate()
139 __func__, sysclock, rate, scl); in hix5hd2_i2c_drv_setrate()
A Di2c-rcar.c288 u32 cdf, round, ick, sum, scl, cdf_width; in rcar_i2c_clock_calculate() local
355 scl = ick / (20 + 8 * scgd + round); in rcar_i2c_clock_calculate()
361 scl, t.bus_freq_hz, rate, round, cdf, scgd); in rcar_i2c_clock_calculate()
383 scl = rate / (8 + 2 * priv->smd + sum_ratio * x + round); in rcar_i2c_clock_calculate()
395 scl, t.bus_freq_hz, rate, round, cdf, priv->schd, priv->scld, priv->smd); in rcar_i2c_clock_calculate()
/drivers/firmware/
A Dstratix10-svc.c230 p_data->chan->scl->receive_cb(p_data->chan->scl, in svc_thread_cmd_data_claim()
305 p_data->chan->scl->receive_cb(p_data->chan->scl, cb_data); in svc_thread_cmd_config_status()
378 p_data->chan->scl->receive_cb(p_data->chan->scl, cb_data); in svc_thread_recv_status_ok()
583 pdata->chan->scl->receive_cb(pdata->chan->scl, cbdata); in svc_normal_to_secure_thread()
622 pdata->chan->scl->receive_cb(pdata->chan->scl, in svc_normal_to_secure_thread()
635 pdata->chan->scl->receive_cb(pdata->chan->scl, cbdata); in svc_normal_to_secure_thread()
917 chan->scl = client; in stratix10_svc_request_channel_byname()
936 chan->scl = NULL; in stratix10_svc_free_channel()
1185 chans[0].scl = NULL; in stratix10_svc_drv_probe()
1190 chans[1].scl = NULL; in stratix10_svc_drv_probe()
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/drivers/gpu/drm/loongson/
A Dlsdc_i2c.c84 return __lsdc_gpio_i2c_set(li2c, li2c->scl, state); in lsdc_gpio_i2c_set_scl()
98 return __lsdc_gpio_i2c_get(li2c, li2c->scl); in lsdc_gpio_i2c_get_scl()
134 li2c->scl = 0x02; /* pin 1 */ in lsdc_create_i2c_chan()
137 li2c->scl = 0x08; /* pin 3 */ in lsdc_create_i2c_chan()
175 adapter->name, li2c->sda, li2c->scl); in lsdc_create_i2c_chan()
A Dlsdc_i2c.h20 u8 scl; member
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
A Dvega10_processpptables.c379 *scl = Vega10_I2C_DDC1CLK; in get_scl_sda_value()
383 *scl = Vega10_I2C_DDC2CLK; in get_scl_sda_value()
387 *scl = Vega10_I2C_DDC3CLK; in get_scl_sda_value()
391 *scl = Vega10_I2C_DDC4CLK; in get_scl_sda_value()
395 *scl = Vega10_I2C_DDC5CLK; in get_scl_sda_value()
399 *scl = Vega10_I2C_DDC6CLK; in get_scl_sda_value()
403 *scl = Vega10_I2C_SCL; in get_scl_sda_value()
407 *scl = Vega10_I2C_DDCVGACLK; in get_scl_sda_value()
411 *scl = 0; in get_scl_sda_value()
424 uint8_t scl; in get_tdp_table() local
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/drivers/gpu/drm/amd/display/dc/hwss/dce/
A Ddce_hwseq.c52 uint32_t dcp_grph, scl, blnd, update_lock_mode, val; in dce_pipe_control_lock() local
62 BLND_SCL_V_UPDATE_LOCK, &scl, in dce_pipe_control_lock()
67 scl = lock_val; in dce_pipe_control_lock()
73 BLND_SCL_V_UPDATE_LOCK, scl); in dce_pipe_control_lock()
/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddcn20_fpu.c1623 pipes[pipe_cnt].pipe.src.viewport_y_y = scl->viewport.y; in dcn20_populate_dml_pipes_from_context()
1624 pipes[pipe_cnt].pipe.src.viewport_y_c = scl->viewport_c.y; in dcn20_populate_dml_pipes_from_context()
1625 pipes[pipe_cnt].pipe.src.viewport_x_y = scl->viewport.x; in dcn20_populate_dml_pipes_from_context()
1626 pipes[pipe_cnt].pipe.src.viewport_x_c = scl->viewport_c.x; in dcn20_populate_dml_pipes_from_context()
1648 pipes[pipe_cnt].pipe.dest.recout_width = scl->recout.width; in dcn20_populate_dml_pipes_from_context()
1649 pipes[pipe_cnt].pipe.dest.recout_height = scl->recout.height; in dcn20_populate_dml_pipes_from_context()
1676 scl->ratios.vert.value != dc_fixpt_one.value in dcn20_populate_dml_pipes_from_context()
1677 || scl->ratios.horz.value != dc_fixpt_one.value in dcn20_populate_dml_pipes_from_context()
1678 || scl->ratios.vert_c.value != dc_fixpt_one.value in dcn20_populate_dml_pipes_from_context()
1681 pipes[pipe_cnt].pipe.scale_taps.htaps = scl->taps.h_taps; in dcn20_populate_dml_pipes_from_context()
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A Ddisplay_rq_dlg_calc_20.c791 const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth; in dml20_rq_dlg_get_dlg_params() local
976 hratio_l = scl->hscl_ratio; in dml20_rq_dlg_get_dlg_params()
977 hratio_c = scl->hscl_ratio_c; in dml20_rq_dlg_get_dlg_params()
978 vratio_l = scl->vscl_ratio; in dml20_rq_dlg_get_dlg_params()
979 vratio_c = scl->vscl_ratio_c; in dml20_rq_dlg_get_dlg_params()
980 scl_enable = scl->scl_enable; in dml20_rq_dlg_get_dlg_params()
1350 scl->hscl_ratio, in dml20_rq_dlg_get_dlg_params()
1366 scl->hscl_ratio, in dml20_rq_dlg_get_dlg_params()
A Ddisplay_rq_dlg_calc_20v2.c791 const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth; in dml20v2_rq_dlg_get_dlg_params() local
977 hratio_l = scl->hscl_ratio; in dml20v2_rq_dlg_get_dlg_params()
978 hratio_c = scl->hscl_ratio_c; in dml20v2_rq_dlg_get_dlg_params()
979 vratio_l = scl->vscl_ratio; in dml20v2_rq_dlg_get_dlg_params()
980 vratio_c = scl->vscl_ratio_c; in dml20v2_rq_dlg_get_dlg_params()
981 scl_enable = scl->scl_enable; in dml20v2_rq_dlg_get_dlg_params()
1351 scl->hscl_ratio, in dml20v2_rq_dlg_get_dlg_params()
1367 scl->hscl_ratio, in dml20v2_rq_dlg_get_dlg_params()
/drivers/i2c/algos/
A Di2c-algo-bit.c234 int scl, sda, ret; in test_bus() local
248 scl = adap->getscl ? getscl(adap) : 1; in test_bus()
249 if (!scl || !sda) { in test_bus()
250 pr_warn("%s: bus seems to be busy (scl=%d, sda=%d)\n", name, scl, sda); in test_bus()
/drivers/gpu/drm/rockchip/
A Drockchip_vop_reg.c116 .scl = &rk3036_win0_scl,
136 .scl = &rk3036_win1_scl,
304 .scl = &px30_win_scl,
404 .scl = &rk3066_win_scl,
530 .scl = &rk3188_win_scl,
662 .scl = &rk3288_win_full_scl,
804 .scl = &rk3288_win_full_scl,
974 .scl = &rk3288_win_full_scl,
998 .scl = &rk3288_win_full_scl,
A Drockchip_drm_vop.c47 vop_reg_set(vop, &win->phy->scl->name, win->base, ~0, v, #name)
49 vop_reg_set(vop, &win->phy->scl->ext->name, \
404 if (!win->phy->scl->ext) { in scl_vop_cal_scl_fac()
608 if (win->phy->scl && win->phy->scl->ext) { in vop_win_disable()
821 int min_scale = win->phy->scl ? FRAC_16_16(1, 8) : in vop_plane_atomic_check()
823 int max_scale = win->phy->scl ? FRAC_16_16(8, 1) : in vop_plane_atomic_check()
1031 if (win->phy->scl) in vop_plane_atomic_update()
1080 int min_scale = win->phy->scl ? FRAC_16_16(1, 8) : in vop_plane_atomic_async_check()
1082 int max_scale = win->phy->scl ? FRAC_16_16(8, 1) : in vop_plane_atomic_async_check()
/drivers/scsi/
A Dmac53c94.c361 struct scatterlist *scl; in set_dma_cmds() local
376 scsi_for_each_sg(cmd, scl, nseg, i) { in set_dma_cmds()
377 dma_addr = sg_dma_address(scl); in set_dma_cmds()
378 dma_len = sg_dma_len(scl); in set_dma_cmds()
/drivers/gpu/drm/amd/display/dc/dml/dcn21/
A Ddisplay_rq_dlg_calc_21.c837 const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth; in dml_rq_dlg_get_dlg_params() local
1028 hratio_l = scl->hscl_ratio; in dml_rq_dlg_get_dlg_params()
1029 hratio_c = scl->hscl_ratio_c; in dml_rq_dlg_get_dlg_params()
1030 vratio_l = scl->vscl_ratio; in dml_rq_dlg_get_dlg_params()
1031 vratio_c = scl->vscl_ratio_c; in dml_rq_dlg_get_dlg_params()
1032 scl_enable = scl->scl_enable; in dml_rq_dlg_get_dlg_params()
1419 scl->hscl_ratio, in dml_rq_dlg_get_dlg_params()
1436 scl->hscl_ratio, in dml_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/display/dc/dml/dcn30/
A Ddisplay_rq_dlg_calc_30.c903 const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth; in dml_rq_dlg_get_dlg_params() local
1089 hratio_l = scl->hscl_ratio; in dml_rq_dlg_get_dlg_params()
1090 hratio_c = scl->hscl_ratio_c; in dml_rq_dlg_get_dlg_params()
1091 vratio_l = scl->vscl_ratio; in dml_rq_dlg_get_dlg_params()
1092 vratio_c = scl->vscl_ratio_c; in dml_rq_dlg_get_dlg_params()
1093 scl_enable = scl->scl_enable; in dml_rq_dlg_get_dlg_params()
1521 scl->hscl_ratio, in dml_rq_dlg_get_dlg_params()
1537 scl->hscl_ratio, in dml_rq_dlg_get_dlg_params()
/drivers/i2c/
A Di2c-core-base.c226 int i = 0, scl = 1, ret = 0; in i2c_generic_scl_recovery() local
240 bri->set_scl(adap, scl); in i2c_generic_scl_recovery()
243 bri->set_sda(adap, scl); in i2c_generic_scl_recovery()
250 if (scl) { in i2c_generic_scl_recovery()
260 scl = !scl; in i2c_generic_scl_recovery()
261 bri->set_scl(adap, scl); in i2c_generic_scl_recovery()
263 if (scl) { in i2c_generic_scl_recovery()
271 bri->set_sda(adap, scl); in i2c_generic_scl_recovery()
274 if (scl) { in i2c_generic_scl_recovery()
/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/
A Di2c_.fuc81 // $r1 - scl line
204 // $r1 - scl line
219 // $r1 - scl line
/drivers/gpu/drm/amd/display/dc/dml/dcn31/
A Ddisplay_rq_dlg_calc_31.c865 const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth; in dml_rq_dlg_get_dlg_params() local
1010 hratio_l = scl->hscl_ratio; in dml_rq_dlg_get_dlg_params()
1011 hratio_c = scl->hscl_ratio_c; in dml_rq_dlg_get_dlg_params()
1012 vratio_l = scl->vscl_ratio; in dml_rq_dlg_get_dlg_params()
1013 vratio_c = scl->vscl_ratio_c; in dml_rq_dlg_get_dlg_params()
1375 scl->hscl_ratio, in dml_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/pm/powerplay/smumgr/
A Dfiji_smumgr.c425 static void get_scl_sda_value(uint8_t line, uint8_t *scl, uint8_t *sda) in get_scl_sda_value() argument
429 *scl = SMU7_I2C_DDC1CLK; in get_scl_sda_value()
433 *scl = SMU7_I2C_DDC2CLK; in get_scl_sda_value()
437 *scl = SMU7_I2C_DDC3CLK; in get_scl_sda_value()
441 *scl = SMU7_I2C_DDC4CLK; in get_scl_sda_value()
445 *scl = SMU7_I2C_DDC5CLK; in get_scl_sda_value()
449 *scl = SMU7_I2C_DDC6CLK; in get_scl_sda_value()
453 *scl = SMU7_I2C_SCL; in get_scl_sda_value()
457 *scl = SMU7_I2C_DDCVGACLK; in get_scl_sda_value()
461 *scl = 0; in get_scl_sda_value()
/drivers/gpu/drm/amd/display/dc/dml/dcn314/
A Ddisplay_rq_dlg_calc_314.c950 const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth; in dml_rq_dlg_get_dlg_params() local
1097 hratio_l = scl->hscl_ratio; in dml_rq_dlg_get_dlg_params()
1098 hratio_c = scl->hscl_ratio_c; in dml_rq_dlg_get_dlg_params()
1099 vratio_l = scl->vscl_ratio; in dml_rq_dlg_get_dlg_params()
1100 vratio_c = scl->vscl_ratio_c; in dml_rq_dlg_get_dlg_params()
1463 scl->hscl_ratio, in dml_rq_dlg_get_dlg_params()

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