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Searched refs:scr (Results 1 – 25 of 44) sorted by relevance

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/drivers/media/tuners/
A Dtda827x.c337 u8 scr; member
343 { .lomax = 56875000, .svco = 3, .spd = 4, .scr = 0, .sbs = 0, .gc3 = 1},
344 { .lomax = 67250000, .svco = 0, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
345 { .lomax = 81250000, .svco = 1, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
346 { .lomax = 97500000, .svco = 2, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
347 { .lomax = 113750000, .svco = 3, .spd = 3, .scr = 0, .sbs = 1, .gc3 = 1},
369 { .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}
399 { .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}
428 { .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}
616 buf[1] = 0x10 + frequency_map[i].scr; in tda827xa_set_params()
[all …]
/drivers/tty/serial/8250/
A D8250_pericom.c54 int scr; in pericom_do_set_divisor() local
56 for (scr = 16; scr > 4; scr--) { in pericom_do_set_divisor()
57 unsigned int maxrate = port->uartclk / scr; in pericom_do_set_divisor()
78 serial_port_out(port, 2, 16 - scr); in pericom_do_set_divisor()
A D8250_omap.c128 u8 scr; member
281 if (old_scr == priv->scr) in omap8250_update_scr()
289 if (priv->scr & OMAP_UART_SCR_DMAMODE_MASK) in omap8250_update_scr()
291 priv->scr & ~OMAP_UART_SCR_DMAMODE_MASK); in omap8250_update_scr()
292 serial_out(up, UART_OMAP_SCR, priv->scr); in omap8250_update_scr()
481 priv->scr = OMAP_UART_SCR_RX_TRIG_GRANU1_MASK | OMAP_UART_SCR_TX_EMPTY | in omap_8250_set_termios()
485 priv->scr |= OMAP_UART_SCR_DMAMODE_1 | in omap_8250_set_termios()
/drivers/mmc/core/
A Dsd_ops.c316 __be32 *scr; in mmc_app_send_scr() local
327 scr = kmalloc(sizeof(card->raw_scr), GFP_KERNEL); in mmc_app_send_scr()
328 if (!scr) in mmc_app_send_scr()
344 sg_init_one(&sg, scr, 8); in mmc_app_send_scr()
350 card->raw_scr[0] = be32_to_cpu(scr[0]); in mmc_app_send_scr()
351 card->raw_scr[1] = be32_to_cpu(scr[1]); in mmc_app_send_scr()
353 kfree(scr); in mmc_app_send_scr()
A Dsd.c209 struct sd_scr *scr = &card->scr; in mmc_decode_scr() local
225 if (scr->sda_vsn == SCR_SPEC_VER_2) in mmc_decode_scr()
229 if (scr->sda_spec3) { in mmc_decode_scr()
239 if (scr->sda_spec4) in mmc_decode_scr()
240 scr->cmds = unstuff_bits(resp, 32, 4); in mmc_decode_scr()
241 else if (scr->sda_spec3) in mmc_decode_scr()
242 scr->cmds = unstuff_bits(resp, 32, 2); in mmc_decode_scr()
293 if (au <= 9 || card->scr.sda_spec3) { in mmc_read_ssr()
327 if (card->scr.sda_vsn < SCR_SPEC_VER_1) in mmc_read_switch()
364 if (card->scr.sda_spec3) { in mmc_read_switch()
[all …]
A Dsdio.c191 card->scr.sda_spec3 = 0; in sdio_read_cccr()
195 card->scr.sda_spec3 = 1; in sdio_read_cccr()
358 if (!(card->scr.bus_widths & SD_SCR_BUS_WIDTH_4)) in sdio_disable_4bit_bus()
380 if (card->scr.bus_widths & SD_SCR_BUS_WIDTH_4) { in sdio_enable_4bit_bus()
597 if (!card->scr.sda_spec3) in mmc_sdio_init_uhs_card()
/drivers/ata/
A Dpata_pdc2027x.c586 u32 scr; in pdc_detect_pll_input_clock() local
592 scr = ioread32(mmio_base + PDC_SYS_CTL); in pdc_detect_pll_input_clock()
593 dev_dbg(host->dev, "scr[%X]\n", scr); in pdc_detect_pll_input_clock()
594 iowrite32(scr | (0x01 << 14), mmio_base + PDC_SYS_CTL); in pdc_detect_pll_input_clock()
609 scr = ioread32(mmio_base + PDC_SYS_CTL); in pdc_detect_pll_input_clock()
610 dev_dbg(host->dev, "scr[%X]\n", scr); in pdc_detect_pll_input_clock()
611 iowrite32(scr & ~(0x01 << 14), mmio_base + PDC_SYS_CTL); in pdc_detect_pll_input_clock()
A Dsata_dwc_460ex.c363 static int sata_dwc_scr_read(struct ata_link *link, unsigned int scr, u32 *val) in sata_dwc_scr_read() argument
365 if (scr > SCR_NOTIFICATION) { in sata_dwc_scr_read()
367 __func__, scr); in sata_dwc_scr_read()
371 *val = sata_dwc_readl(link->ap->ioaddr.scr_addr + (scr * 4)); in sata_dwc_scr_read()
373 link->ap->print_id, scr, *val); in sata_dwc_scr_read()
378 static int sata_dwc_scr_write(struct ata_link *link, unsigned int scr, u32 val) in sata_dwc_scr_write() argument
381 link->ap->print_id, scr, val); in sata_dwc_scr_write()
382 if (scr > SCR_NOTIFICATION) { in sata_dwc_scr_write()
384 __func__, scr); in sata_dwc_scr_write()
387 sata_dwc_writel(link->ap->ioaddr.scr_addr + (scr * 4), val); in sata_dwc_scr_write()
A Dsata_via.c76 static int vt8251_scr_read(struct ata_link *link, unsigned int scr, u32 *val);
77 static int vt8251_scr_write(struct ata_link *link, unsigned int scr, u32 val);
202 static int vt8251_scr_read(struct ata_link *link, unsigned int scr, u32 *val) in vt8251_scr_read() argument
210 switch (scr) { in vt8251_scr_read()
251 static int vt8251_scr_write(struct ata_link *link, unsigned int scr, u32 val) in vt8251_scr_write() argument
257 switch (scr) { in vt8251_scr_write()
A Dsata_uli.c103 static void uli_scr_cfg_write(struct ata_link *link, unsigned int scr, u32 val) in uli_scr_cfg_write() argument
106 unsigned int cfg_addr = get_scr_cfg_addr(link->ap, scr); in uli_scr_cfg_write()
/drivers/dma/stm32/
A Dstm32-dma.c539 dev_dbg(chan2dev(chan), "SCR: 0x%08x\n", scr); in stm32_dma_dump_reg()
764 u32 status, scr, sfcr; in stm32_dma_chan_irq() local
776 if (!(scr & STM32_DMA_SCR_EN) && in stm32_dma_chan_irq()
792 if (scr & STM32_DMA_SCR_TCIE) { in stm32_dma_chan_irq()
794 stm32_dma_handle_chan_done(chan, scr); in stm32_dma_chan_irq()
807 if (!(scr & STM32_DMA_SCR_EN)) in stm32_dma_chan_irq()
862 scr = stm32_dma_read(dmadev, STM32_DMA_SCR(id)); in stm32_dma_resume()
863 if (WARN_ON(scr & STM32_DMA_SCR_EN)) in stm32_dma_resume()
1736 int id, ret, scr; in stm32_dma_pm_suspend() local
1743 scr = stm32_dma_read(dmadev, STM32_DMA_SCR(id)); in stm32_dma_pm_suspend()
[all …]
/drivers/tty/serial/
A Domap-serial.c139 unsigned char scr; member
286 if (up->scr & OMAP_UART_SCR_TX_EMPTY) { in serial_omap_stop_tx()
294 up->scr &= ~OMAP_UART_SCR_TX_EMPTY; in serial_omap_stop_tx()
295 serial_out(up, UART_OMAP_SCR, up->scr); in serial_omap_stop_tx()
313 up->scr |= OMAP_UART_SCR_TX_EMPTY; in serial_omap_stop_tx()
314 serial_out(up, UART_OMAP_SCR, up->scr); in serial_omap_stop_tx()
369 up->scr &= ~OMAP_UART_SCR_TX_EMPTY; in serial_omap_start_tx()
370 serial_out(up, UART_OMAP_SCR, up->scr); in serial_omap_start_tx()
862 up->scr = 0; in serial_omap_set_termios()
908 serial_out(up, UART_OMAP_SCR, up->scr); in serial_omap_set_termios()
[all …]
A Dsh-sci.c591 new = scr | SCSCR_TDRQE; in sci_start_tx()
593 new = scr & ~SCSCR_TDRQE; in sci_start_tx()
594 if (new != scr) in sci_start_tx()
1325 u16 scr; in sci_dma_rx_reenable_irq() local
1328 scr = sci_serial_in(port, SCSCR); in sci_dma_rx_reenable_irq()
1335 scr &= ~SCSCR_RDRQE; in sci_dma_rx_reenable_irq()
1772 scr |= SCSCR_RIE; in sci_rx_interrupt()
1774 scr |= SCSCR_RDRQE; in sci_rx_interrupt()
1780 scr &= ~SCSCR_RIE; in sci_rx_interrupt()
2270 u16 scr; in sci_shutdown_complete() local
[all …]
/drivers/watchdog/
A Docteon-wdt-main.c281 u64 scr; in octeon_wdt_nmi_stage3() local
295 scr = cvmx_read_csr_node(0, CVMX_GSERX_SCRATCH(0)); in octeon_wdt_nmi_stage3()
296 scr |= 1 << 11; /* Indicate watchdog in bit 11 */ in octeon_wdt_nmi_stage3()
297 cvmx_write_csr_node(0, CVMX_GSERX_SCRATCH(0), scr); in octeon_wdt_nmi_stage3()
/drivers/spi/
A Dspi-ep93xx.c113 int cpsr, scr; in ep93xx_spi_calc_divisors() local
130 for (scr = 0; scr <= 255; scr++) { in ep93xx_spi_calc_divisors()
131 if ((spi_clk_rate / (cpsr * (scr + 1))) <= rate) { in ep93xx_spi_calc_divisors()
132 *div_scr = (u8)scr; in ep93xx_spi_calc_divisors()
A Dspi-ppc4xx.c166 int scr; in spi_ppc4xx_setupxfer() local
192 scr = (hw->opb_freq / speed) - 1; in spi_ppc4xx_setupxfer()
193 if (scr > 0) in spi_ppc4xx_setupxfer()
194 cdm = min(scr, 0xff); in spi_ppc4xx_setupxfer()
A Dspi-pl022.c1484 static inline u32 spi_rate(u32 rate, u16 cpsdvsr, u16 scr) in spi_rate() argument
1486 return rate / (cpsdvsr * (1 + scr)); in spi_rate()
1493 u16 cpsdvsr = CPSDVR_MIN, scr = SCR_MIN; in calculate_effective_freq() local
1520 while (scr <= SCR_MAX) { in calculate_effective_freq()
1521 tmp = spi_rate(rate, cpsdvsr, scr); in calculate_effective_freq()
1525 scr++; in calculate_effective_freq()
1536 best_scr = scr; in calculate_effective_freq()
1548 scr = SCR_MIN; in calculate_effective_freq()
1555 clk_freq->scr = (u8) (best_scr & 0xFF); in calculate_effective_freq()
1560 clk_freq->cpsdvsr, clk_freq->scr); in calculate_effective_freq()
[all …]
A Datmel-quadspi.c282 u32 scr; member
1166 aq->scr &= ~QSPI_SCR_SCBR_MASK; in atmel_qspi_setup()
1167 aq->scr |= QSPI_SCR_SCBR(scbr); in atmel_qspi_setup()
1168 atmel_qspi_write(aq->scr, aq, QSPI_SCR); in atmel_qspi_setup()
1223 aq->scr &= ~QSPI_SCR_DLYBS_MASK; in atmel_qspi_set_cs_timing()
1224 aq->scr |= QSPI_SCR_DLYBS(cs_setup); in atmel_qspi_set_cs_timing()
1225 atmel_qspi_write(aq->scr, aq, QSPI_SCR); in atmel_qspi_set_cs_timing()
1557 atmel_qspi_write(aq->scr, aq, QSPI_SCR); in atmel_qspi_resume()
/drivers/misc/sgi-gru/
A Dgrumain.c462 int i, scr; in gru_prefetch_context() local
467 for_each_cbr_in_allocation_map(i, &cbrmap, scr) { in gru_prefetch_context()
481 int i, scr; in gru_load_context_data() local
489 for_each_cbr_in_allocation_map(i, &cbrmap, scr) { in gru_load_context_data()
516 int i, scr; in gru_unload_context_data() local
524 for_each_cbr_in_allocation_map(i, &cbrmap, scr) in gru_unload_context_data()
530 for_each_cbr_in_allocation_map(i, &cbrmap, scr) { in gru_unload_context_data()
A Dgrukdump.c41 int i, scr; in gru_dump_context_data() local
48 for_each_cbr_in_allocation_map(i, &cch->cbr_allocation_map, scr) { in gru_dump_context_data()
/drivers/scsi/libfc/
A Dfc_encode.h892 struct fc_els_scr *scr; in fc_scr_fill() local
894 scr = fc_frame_payload_get(fp, sizeof(*scr)); in fc_scr_fill()
895 memset(scr, 0, sizeof(*scr)); in fc_scr_fill()
896 scr->scr_cmd = ELS_SCR; in fc_scr_fill()
897 scr->scr_reg_func = ELS_SCRF_FULL; in fc_scr_fill()
/drivers/clocksource/
A Darm_arch_timer.c1125 u64 (*scr)(void); in arch_counter_register() local
1137 scr = raw_counter_get_cntvct_stable; in arch_counter_register()
1140 scr = arch_counter_get_cntvct; in arch_counter_register()
1145 scr = raw_counter_get_cntpct_stable; in arch_counter_register()
1148 scr = arch_counter_get_cntpct; in arch_counter_register()
1156 scr = arch_counter_get_cntvct_mem; in arch_counter_register()
1172 sched_clock_register(scr, width, arch_timer_rate); in arch_counter_register()
/drivers/gpu/drm/arm/
A Dmalidp_drv.c133 u32 scr = se_control + MALIDP_SE_SCALING_CONTROL; in malidp_atomic_commit_se_config() local
163 malidp_hw_write(hwdev, s->h_init_phase, scr + MALIDP_SE_H_INIT_PH); in malidp_atomic_commit_se_config()
164 malidp_hw_write(hwdev, s->h_delta_phase, scr + MALIDP_SE_H_DELTA_PH); in malidp_atomic_commit_se_config()
165 malidp_hw_write(hwdev, s->v_init_phase, scr + MALIDP_SE_V_INIT_PH); in malidp_atomic_commit_se_config()
166 malidp_hw_write(hwdev, s->v_delta_phase, scr + MALIDP_SE_V_DELTA_PH); in malidp_atomic_commit_se_config()
/drivers/rtc/
A Drtc-stm32.c145 u16 scr; member
821 .scr = UNDEF_REG,
847 .scr = UNDEF_REG,
863 writel_relaxed(flags, rtc->base + regs.scr); in stm32mp1_rtc_clear_events()
882 .scr = 0x5C,
908 .scr = 0x5C,
/drivers/scsi/bfa/
A Dbfa_fcbuild.c650 fc_scr_build(struct fchs_s *fchs, struct fc_scr_s *scr, in fc_scr_build() argument
657 memset(scr, 0, sizeof(struct fc_scr_s)); in fc_scr_build()
658 scr->command = FC_ELS_SCR; in fc_scr_build()
659 scr->reg_func = FC_SCR_REG_FUNC_FULL; in fc_scr_build()
661 scr->vu_reg_func = FC_VU_SCR_REG_FUNC_FABRIC_NAME_CHANGE; in fc_scr_build()

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