| /drivers/soc/qcom/ |
| A D | qcom-geni-se.c | 259 geni_se_irq_clear(se); in geni_se_init() 281 geni_se_irq_clear(se); in geni_se_select_fifo_mode() 304 geni_se_irq_clear(se); in geni_se_select_dma_mode() 326 geni_se_irq_clear(se); in geni_se_select_gpi_mode() 511 geni_se_clks_off(se); in geni_se_resources_off() 551 geni_se_clks_off(se); in geni_se_resources_on() 575 if (se->clk_perf_tbl) { in geni_se_clk_tbl_get() 580 se->clk_perf_tbl = devm_kcalloc(se->dev, MAX_CLK_PERF_LEVEL, in geni_se_clk_tbl_get() 583 if (!se->clk_perf_tbl) in geni_se_clk_tbl_get() 815 se->icc_paths[i].path = devm_of_icc_get(se->dev, icc_names[i]); in geni_icc_get() [all …]
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| /drivers/crypto/tegra/ |
| A D | tegra-se-main.c | 215 se->syncpt_id = host1x_syncpt_id(se->syncpt); in tegra_se_client_init() 217 se->cmdbuf = tegra_se_host1x_bo_alloc(se, SZ_4K); in tegra_se_client_init() 223 se->keybuf = tegra_se_host1x_bo_alloc(se, SZ_4K); in tegra_se_client_init() 229 ret = se->hw->init_alg(se); in tegra_se_client_init() 253 se->hw->deinit_alg(se); in tegra_se_client_deinit() 269 se->client.dev = se->dev; in tegra_se_host1x_register() 271 se->client.class = se->hw->host1x_class; in tegra_se_host1x_register() 285 se = devm_kzalloc(dev, sizeof(*se), GFP_KERNEL); in tegra_se_probe() 286 if (!se) in tegra_se_probe() 300 se->clk = devm_clk_get_enabled(se->dev, NULL); in tegra_se_probe() [all …]
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| A D | tegra-se-aes.c | 212 struct tegra_se *se = ctx->se; in tegra_aes_prep_cmd() local 268 struct tegra_se *se = ctx->se; in tegra_aes_do_one_req() local 610 struct tegra_se *se = ctx->se; in tegra_gmac_prep_cmd() local 650 struct tegra_se *se = ctx->se; in tegra_gcm_crypt_prep_cmd() local 759 struct tegra_se *se = ctx->se; in tegra_gcm_do_gmac() local 776 struct tegra_se *se = ctx->se; in tegra_gcm_do_crypt() local 801 struct tegra_se *se = ctx->se; in tegra_gcm_do_final() local 857 struct tegra_se *se = ctx->se; in tegra_cbcmac_prep_cmd() local 892 struct tegra_se *se = ctx->se; in tegra_ctr_prep_cmd() local 932 struct tegra_se *se = ctx->se; in tegra_ccm_do_cbcmac() local [all …]
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| A D | tegra-se-key.c | 57 cpuvaddr[i++] = se_host1x_opcode_incr_w(se->hw->regs->op); in tegra_key_prep_ins_cmd() 62 cpuvaddr[i++] = se->manifest(se->owner, alg, keylen); in tegra_key_prep_ins_cmd() 85 cpuvaddr[i++] = se_host1x_opcode_incr_w(se->hw->regs->op); in tegra_key_prep_ins_cmd() 91 host1x_uclass_incr_syncpt_indx_f(se->syncpt_id); in tegra_key_prep_ins_cmd() 93 dev_dbg(se->dev, "key-slot %u key-manifest %#x\n", in tegra_key_prep_ins_cmd() 94 slot, se->manifest(se->owner, alg, keylen)); in tegra_key_prep_ins_cmd() 118 u32 *addr = se->keybuf->addr, size; in tegra_key_insert() 124 ret = tegra_se_host1x_submit(se, se->keybuf, size); in tegra_key_insert() 158 return tegra_key_insert(se, key, keylen, *keyid, alg); in tegra_key_submit_reserved() 169 dev_dbg(se->dev, "failed to allocate key slot\n"); in tegra_key_submit() [all …]
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| A D | Makefile | 4 tegra-se-objs := tegra-se-key.o tegra-se-main.o 6 tegra-se-y += tegra-se-aes.o 7 tegra-se-y += tegra-se-hash.o 9 obj-$(CONFIG_CRYPTO_DEV_TEGRA) += tegra-se.o
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| A D | tegra-se-hash.c | 25 struct tegra_se *se; member 272 struct tegra_se *se = ctx->se; in tegra_sha_prep_cmd() local 356 struct tegra_se *se = ctx->se; in tegra_sha_do_init() local 402 struct tegra_se *se = ctx->se; in tegra_sha_do_update() local 404 u32 *cpuvaddr = se->cmdbuf->addr; in tegra_sha_do_update() 456 ret = tegra_se_host1x_submit(se, se->cmdbuf, size); in tegra_sha_do_update() 469 struct tegra_se *se = ctx->se; in tegra_sha_do_final() local 491 ret = tegra_se_host1x_submit(se, se->cmdbuf, size); in tegra_sha_do_final() 520 struct tegra_se *se = ctx->se; in tegra_sha_do_one_req() local 562 dev_warn(ctx->se->dev, in tegra_sha_init_fallback() [all …]
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| A D | tegra-se.h | 413 int (*init_alg)(struct tegra_se *se); 414 void (*deinit_alg)(struct tegra_se *se); 502 int tegra_init_aes(struct tegra_se *se); 503 int tegra_init_hash(struct tegra_se *se); 504 void tegra_deinit_aes(struct tegra_se *se); 505 void tegra_deinit_hash(struct tegra_se *se); 506 int tegra_key_submit(struct tegra_se *se, const u8 *key, 509 int tegra_key_submit_reserved(struct tegra_se *se, const u8 *key, 512 void tegra_key_invalidate(struct tegra_se *se, u32 keyid, u32 alg); 520 return tegra_key_submit_reserved(se, key, keylen, alg, keyid); in tegra_key_submit_reserved_aes() [all …]
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| /drivers/i2c/busses/ |
| A D | i2c-qcom-geni.c | 81 struct geni_se se; member 353 geni_se_abort_m_cmd(&gi2c->se); in geni_i2c_abort_xfer() 424 struct geni_se *se = &gi2c->se; in geni_i2c_rx_one_msg() local 463 struct geni_se *se = &gi2c->se; in geni_i2c_tx_one_msg() local 792 gi2c->se.dev = dev; in geni_i2c_probe() 795 if (IS_ERR(gi2c->se.base)) in geni_i2c_probe() 796 return PTR_ERR(gi2c->se.base); in geni_i2c_probe() 808 return PTR_ERR(gi2c->se.clk); in geni_i2c_probe() 859 ret = geni_icc_set_bw(&gi2c->se); in geni_i2c_probe() 928 pm_runtime_enable(gi2c->se.dev); in geni_i2c_probe() [all …]
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| /drivers/spi/ |
| A D | spi-geni-qcom.c | 108 struct geni_se *se = &mas->se; in spi_slv_setup() local 153 struct geni_se *se = &mas->se; in handle_se_timeout() local 255 struct geni_se *se = &mas->se; in spi_geni_is_abort_still_pending() local 291 struct geni_se *se = &mas->se; in spi_geni_set_cs() local 341 struct geni_se *se = &mas->se; in spi_setup_word_len() local 362 struct geni_se *se = &mas->se; in geni_spi_set_clock_and_bw() local 401 struct geni_se *se = &mas->se; in setup_fifo_params() local 659 struct geni_se *se = &mas->se; in spi_geni_init() local 753 struct geni_se *se = &mas->se; in geni_spi_handle_tx() local 791 struct geni_se *se = &mas->se; in geni_spi_handle_rx() local [all …]
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| /drivers/gpu/drm/v3d/ |
| A D | v3d_submit.c | 164 bool has_multisync = se && (se->flags & DRM_V3D_EXT_ID_MULTI_SYNC); in v3d_job_init() 177 if (se->in_sync_count && se->wait_stage == queue) { in v3d_job_init() 234 bool has_multisync = se && (se->flags & DRM_V3D_EXT_ID_MULTI_SYNC); in v3d_attach_fences_and_unlock_reservation() 315 if (!(se && se->out_sync_count)) in v3d_put_multisync_post_deps() 320 kvfree(se->out_syncs); in v3d_put_multisync_post_deps() 338 if (!se->out_syncs) in v3d_get_multisync_post_deps() 366 kvfree(se->out_syncs); in v3d_get_multisync_post_deps() 382 if (se->in_sync_count || se->out_sync_count) { in v3d_get_multisync_submit_deps() 1031 &se, in v3d_submit_cl_ioctl() 1139 &se, in v3d_submit_tfu_ioctl() [all …]
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| /drivers/tty/serial/ |
| A D | qcom_geni_serial.c | 128 struct geni_se se; member 238 port->se.base = uport->membase; in qcom_geni_serial_request_port() 1343 dev_err(port->se.dev, in geni_serial_set_rate() 1366 geni_icc_set_bw(&port->se); in geni_serial_set_rate() 1587 struct geni_se se; in qcom_geni_serial_earlycon_setup() local 1594 memset(&se, 0, sizeof(se)); in qcom_geni_serial_earlycon_setup() 1595 se.base = uport->membase; in qcom_geni_serial_earlycon_setup() 1709 geni_icc_disable(&port->se); in geni_serial_resources_off() 1737 port->se.clk = devm_clk_get(port->se.dev, "se"); in geni_serial_resource_init() 1738 if (IS_ERR(port->se.clk)) { in geni_serial_resource_init() [all …]
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| /drivers/gpu/drm/amd/amdkfd/ |
| A D | kfd_mqd_manager.c | 107 int i, se, sh, cu, cu_bitmap_sh_mul, cu_inc = wgp_mode_req ? 2 : 1; in mqd_symmetrically_map_cu_mask() local 147 for (se = 0; se < gfx_info->max_shader_engines; se++) in mqd_symmetrically_map_cu_mask() 149 cu_per_sh[se][sh] = hweight32( in mqd_symmetrically_map_cu_mask() 150 cu_info->bitmap[xcc_inst][se % 4][sh + (se / 4) * in mqd_symmetrically_map_cu_mask() 195 for (se = 0; se < gfx_info->max_shader_engines; se++) { in mqd_symmetrically_map_cu_mask() 196 if (cu_per_sh[se][sh] > cu) { in mqd_symmetrically_map_cu_mask() 198 se_mask[se] |= en_mask << (cu + sh * 16); in mqd_symmetrically_map_cu_mask()
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| /drivers/gpu/drm/i915/gvt/ |
| A D | gtt.c | 1075 se->type = ge->type; in ppgtt_generate_shadow_entry() 1076 se->val64 = ge->val64; in ppgtt_generate_shadow_entry() 1080 ops->clear_ips(se); in ppgtt_generate_shadow_entry() 1123 ops->clear_pse(se); in split_2MB_gtt_entry() 1124 ops->clear_ips(se); in split_2MB_gtt_entry() 1268 se->type, index, se->val64); in ppgtt_handle_guest_entry_removal() 1273 if (ops->get_pfn(se) == in ppgtt_handle_guest_entry_removal() 1298 spt, se->val64, se->type); in ppgtt_handle_guest_entry_removal() 1709 se.val64 = 0; in invalidate_ppgtt_mm() 1713 NULL, se.type, se.val64, index); in invalidate_ppgtt_mm() [all …]
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| /drivers/infiniband/hw/hfi1/ |
| A D | trace_ibhdrs.h | 76 u8 *se, u8 *pad, u8 *opcode, u8 *tver, 83 u8 *pad, u8 *se, u8 *tver, 99 u8 se, u8 pad, u8 opcode, const char *opname, 135 __field(u8, se) 182 &__entry->se, 203 &__entry->se, 249 __entry->se, 294 __field(u8, se) 347 &__entry->se, 371 &__entry->se, [all …]
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| A D | trace.c | 119 u8 *se, u8 *pad, u8 *opcode, u8 *tver, in hfi1_trace_parse_9b_bth() argument 126 *se = ib_bth_get_se(ohdr); in hfi1_trace_parse_9b_bth() 137 u8 *pad, u8 *se, u8 *tver, in hfi1_trace_parse_16b_bth() argument 144 *se = ib_bth_get_se(ohdr); in hfi1_trace_parse_16b_bth() 223 u8 se, u8 pad, u8 opcode, const char *opname, in hfi1_trace_fmt_rest() argument 236 se, mig, pad, tver, qpn, ack, psn); in hfi1_trace_fmt_rest() 241 se, mig, pad, tver, pkey, fecn, becn, in hfi1_trace_fmt_rest()
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| /drivers/gpu/drm/amd/amdgpu/ |
| A D | amdgpu_umr.h | 31 __u32 se, sh, instance; member 41 __u32 se, sh, instance; member 50 u32 gpr_or_wave, se, sh, cu, wave, simd, xcc_id; member
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| A D | amdgpu_debugfs.c | 257 (rd->id.grbm.se != 0xFFFFFFFF && rd->id.grbm.se >= adev->gfx.config.max_shader_engines)) { in amdgpu_debugfs_regs2_op() 265 amdgpu_gfx_select_se_sh(adev, rd->id.grbm.se, in amdgpu_debugfs_regs2_op() 352 rd->id.grbm.se = v1_data.grbm.se; in amdgpu_debugfs_regs2_ioctl() 429 amdgpu_gfx_select_se_sh(adev, rd->id.se, rd->id.sh, rd->id.cu, rd->id.xcc_id); in amdgpu_debugfs_gprwave_read() 1061 uint32_t offset, se, sh, cu, wave, simd, data[32]; in amdgpu_debugfs_wave_read() local 1068 se = (*pos & GENMASK_ULL(14, 7)) >> 7; in amdgpu_debugfs_wave_read() 1088 amdgpu_gfx_select_se_sh(adev, se, sh, cu, 0); in amdgpu_debugfs_wave_read() 1153 uint32_t offset, se, sh, cu, wave, simd, thread, bank, *data; in amdgpu_debugfs_gpr_read() local 1160 se = (*pos & GENMASK_ULL(19, 12)) >> 12; in amdgpu_debugfs_gpr_read() 1182 amdgpu_gfx_select_se_sh(adev, se, sh, cu, 0); in amdgpu_debugfs_gpr_read()
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| /drivers/gpu/drm/i915/ |
| A D | intel_wakeref.c | 205 char *buf, *sb, *se; in intel_ref_tracker_show() local 216 for (sb = buf; *sb; sb = se + 1) { in intel_ref_tracker_show() 217 se = strchrnul(sb, '\n'); in intel_ref_tracker_show() 218 drm_printf(p, "%.*s", (int)(se - sb + 1), sb); in intel_ref_tracker_show() 219 if (!*se) in intel_ref_tracker_show()
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| /drivers/s390/net/ |
| A D | smsgiucv_app.c | 124 struct smsg_app_event *se; in smsg_app_callback() local 139 se = smsg_app_event_alloc(from, msg); in smsg_app_callback() 140 if (!se) in smsg_app_callback() 145 list_add_tail(&se->list, &smsg_event_queue); in smsg_app_callback()
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| /drivers/nfc/pn544/ |
| A D | pn544.c | 811 const struct nfc_se *se; in pn544_hci_enable_se() local 828 se = nfc_find_se(hdev->ndev, se_idx); in pn544_hci_enable_se() 830 switch (se->type) { in pn544_hci_enable_se() 866 const struct nfc_se *se; in pn544_hci_disable_se() local 869 se = nfc_find_se(hdev->ndev, se_idx); in pn544_hci_disable_se() 871 switch (se->type) { in pn544_hci_disable_se()
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| /drivers/infiniband/sw/rxe/ |
| A D | rxe_hdr.h | 105 static inline void __bth_set_se(void *arg, int se) in __bth_set_se() argument 109 if (se) in __bth_set_se() 295 static inline void bth_set_se(struct rxe_pkt_info *pkt, int se) in bth_set_se() argument 297 __bth_set_se(pkt->hdr, se); in bth_set_se() 405 static inline void bth_init(struct rxe_pkt_info *pkt, u8 opcode, int se, in bth_init() argument 413 if (se) in bth_init()
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| /drivers/crypto/cavium/cpt/ |
| A D | cpt_hw_types.h | 196 u64 se:8; member 200 u64 se:8;
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| /drivers/nfc/st21nfca/ |
| A D | Makefile | 6 st21nfca_hci-objs = core.o dep.o se.o vendor_cmds.o
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| /drivers/nfc/st-nci/ |
| A D | Makefile | 6 st-nci-objs = ndlc.o core.o se.o vendor_cmds.o
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| /drivers/crypto/marvell/octeontx/ |
| A D | otx_cpt_hw_types.h | 334 u64 se:8; member 338 u64 se:8;
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