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Searched refs:sec_count (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
A Dgfx_v9_4.c692 uint32_t sec_count, ded_count; in gfx_v9_4_query_utc_edc_status() local
711 if (sec_count) { in gfx_v9_4_query_utc_edc_status()
714 vml2_mems[i], sec_count); in gfx_v9_4_query_utc_edc_status()
715 err_data->ce_count += sec_count; in gfx_v9_4_query_utc_edc_status()
733 if (sec_count) { in gfx_v9_4_query_utc_edc_status()
755 if (sec_count) { in gfx_v9_4_query_utc_edc_status()
777 if (sec_count) { in gfx_v9_4_query_utc_edc_status()
800 if (sec_count) { in gfx_v9_4_query_utc_edc_status()
848 *sec_count += sec_cnt; in gfx_v9_4_ras_error_count()
891 j, k, reg_value, &sec_count, in gfx_v9_4_query_ras_error_count()
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A Dsdma_v4_4.c170 uint32_t *sec_count) in sdma_v4_4_get_ras_error_count() argument
190 *sec_count += sec_cnt; in sdma_v4_4_get_ras_error_count()
200 uint32_t sec_count = 0; in sdma_v4_4_query_ras_error_count_by_instance() local
209 instance, &sec_count); in sdma_v4_4_query_ras_error_count_by_instance()
216 instance, &sec_count); in sdma_v4_4_query_ras_error_count_by_instance()
225 err_data->ue_count += sec_count; in sdma_v4_4_query_ras_error_count_by_instance()
A Dgfx_v9_4_2.c1472 *sec_count += sec_cnt; in gfx_v9_4_2_get_reg_error_count()
1495 if (sec_count && ded_count) { in gfx_v9_4_2_query_sram_edc_count()
1496 *sec_count = 0; in gfx_v9_4_2_query_sram_edc_count()
1532 if (sec_count && ded_count) { in gfx_v9_4_2_query_sram_edc_count()
1533 *sec_count += sec_cnt; in gfx_v9_4_2_query_sram_edc_count()
1595 uint32_t *sec_count, in gfx_v9_4_2_query_utc_edc_count() argument
1603 if (sec_count && ded_count) { in gfx_v9_4_2_query_utc_edc_count()
1604 *sec_count = 0; in gfx_v9_4_2_query_utc_edc_count()
1627 *sec_count += sec_cnt; in gfx_v9_4_2_query_utc_edc_count()
1658 err_data->ce_count += sec_count; in gfx_v9_4_2_query_ras_error_count()
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A Dmmhub_v1_0.c759 uint32_t value, uint32_t *sec_count, uint32_t *ded_count) in mmhub_v1_0_get_ras_error_count() argument
776 *sec_count += sec_cnt; in mmhub_v1_0_get_ras_error_count()
798 uint32_t sec_count = 0, ded_count = 0; in mmhub_v1_0_query_ras_error_count() local
811 reg_value, &sec_count, &ded_count); in mmhub_v1_0_query_ras_error_count()
814 err_data->ce_count += sec_count; in mmhub_v1_0_query_ras_error_count()
A Dmmhub_v1_7.c1234 uint32_t *sec_count, in mmhub_v1_7_get_ras_error_count() argument
1251 *sec_count += sec_cnt; in mmhub_v1_7_get_ras_error_count()
1272 uint32_t sec_count = 0, ded_count = 0; in mmhub_v1_7_query_ras_error_count() local
1284 reg_value, &sec_count, &ded_count); in mmhub_v1_7_query_ras_error_count()
1287 err_data->ce_count += sec_count; in mmhub_v1_7_query_ras_error_count()
A Dgfx_v9_0.c6853 uint32_t sec_count, ded_count; in gfx_v9_0_query_utc_edc_status() local
6869 if (sec_count) { in gfx_v9_0_query_utc_edc_status()
6872 err_data->ce_count += sec_count; in gfx_v9_0_query_utc_edc_status()
6889 if (sec_count) { in gfx_v9_0_query_utc_edc_status()
6909 if (sec_count) { in gfx_v9_0_query_utc_edc_status()
6912 sec_count); in gfx_v9_0_query_utc_edc_status()
6922 if (sec_count) { in gfx_v9_0_query_utc_edc_status()
6925 sec_count); in gfx_v9_0_query_utc_edc_status()
6969 *sec_count += sec_cnt; in gfx_v9_0_ras_error_count()
7069 &sec_count, &ded_count); in gfx_v9_0_query_ras_error_count()
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A Dmmhub_v9_4.c1595 uint32_t *sec_count, in mmhub_v9_4_get_ras_error_count() argument
1612 *sec_count += sec_cnt; in mmhub_v9_4_get_ras_error_count()
1633 uint32_t sec_count = 0, ded_count = 0; in mmhub_v9_4_query_ras_error_count() local
1645 reg_value, &sec_count, &ded_count); in mmhub_v9_4_query_ras_error_count()
1648 err_data->ce_count += sec_count; in mmhub_v9_4_query_ras_error_count()
A Dsdma_v4_0.c2644 uint32_t *sec_count) in sdma_v4_0_get_ras_error_count() argument
2661 *sec_count += sec_cnt; in sdma_v4_0_get_ras_error_count()
2670 uint32_t sec_count = 0; in sdma_v4_0_query_ras_error_count_by_instance() local
2677 instance, &sec_count); in sdma_v4_0_query_ras_error_count_by_instance()
2680 err_data->ce_count += sec_count; in sdma_v4_0_query_ras_error_count_by_instance()
/drivers/gpu/drm/msm/adreno/
A Da6xx_gmu.c1457 size_t pri_count, sec_count; in a6xx_gmu_rpmh_arc_votes_init() local
1474 sec = cmd_db_read_aux_data("gmxc.lvl", &sec_count); in a6xx_gmu_rpmh_arc_votes_init()
1476 sec = cmd_db_read_aux_data("mx.lvl", &sec_count); in a6xx_gmu_rpmh_arc_votes_init()
1480 sec_count >>= 1; in a6xx_gmu_rpmh_arc_votes_init()
1481 if (!sec_count) in a6xx_gmu_rpmh_arc_votes_init()
1513 for (j = 0; j < sec_count; j++) { in a6xx_gmu_rpmh_arc_votes_init()

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