Home
last modified time | relevance | path

Searched refs:seq_state (Results 1 – 6 of 6) sorted by relevance

/drivers/spi/
A Dspi-fsi.c368 u64 seq_state; in fsi_spi_transfer_init() local
384 seq_state = status & SPI_FSI_STATUS_SEQ_STATE; in fsi_spi_transfer_init()
403 } while (seq_state && (seq_state != SPI_FSI_STATUS_SEQ_STATE_IDLE)); in fsi_spi_transfer_init()
/drivers/hwtracing/coresight/
A Dcoresight-etm4x-cfg.c69 CHECKREG(TRCSEQSTR, seq_state); in etm4_cfg_map_reg_offset()
A Dcoresight-etm4x.h837 u32 seq_state; member
913 u32 seq_state; member
A Dcoresight-etm4x-sysfs.c228 config->seq_state = 0x0; in reset_store()
1421 val = config->seq_state; in seq_state_show()
1438 config->seq_state = val; in seq_state_store()
1441 static DEVICE_ATTR_RW(seq_state);
A Dcoresight-etm4x-core.c529 etm4x_relaxed_write32(csa, config->seq_state, TRCSEQSTR); in etm4_enable_hw()
/drivers/net/ieee802154/
A Dmcr20a.c885 u8 seq_state = lp->irq_data[DAR_IRQ_STS1] & DAR_PHY_CTRL1_XCVSEQ_MASK; in mcr20a_irq_clean_complete() local
894 switch (seq_state) { in mcr20a_irq_clean_complete()

Completed in 25 milliseconds