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Searched refs:set_odm_bypass (Results 1 – 15 of 15) sorted by relevance

/drivers/gpu/drm/amd/display/dc/optc/dcn301/
A Ddcn301_optc.c158 .set_odm_bypass = optc3_set_odm_bypass,
/drivers/gpu/drm/amd/display/dc/optc/dcn314/
A Ddcn314_optc.c254 .set_odm_bypass = optc314_set_odm_bypass,
/drivers/gpu/drm/amd/display/dc/optc/dcn32/
A Ddcn32_optc.c348 .set_odm_bypass = optc32_set_odm_bypass,
/drivers/gpu/drm/amd/display/dc/optc/dcn31/
A Ddcn31_optc.c365 .set_odm_bypass = optc3_set_odm_bypass,
/drivers/gpu/drm/amd/display/dc/inc/hw/
A Dtiming_generator.h343 void (*set_odm_bypass)(struct timing_generator *optc, const struct dc_crtc_timing *dc_crtc_timing); member
/drivers/gpu/drm/amd/display/dc/hwss/dcn31/
A Ddcn31_hwseq.c546 if (pipe_ctx->stream_res.tg->funcs->set_odm_bypass) in dcn31_reset_back_end_for_pipe()
547 pipe_ctx->stream_res.tg->funcs->set_odm_bypass( in dcn31_reset_back_end_for_pipe()
/drivers/gpu/drm/amd/display/dc/optc/dcn30/
A Ddcn30_optc.c406 .set_odm_bypass = optc3_set_odm_bypass,
/drivers/gpu/drm/amd/display/dc/optc/dcn20/
A Ddcn20_optc.c554 .set_odm_bypass = optc2_set_odm_bypass,
/drivers/gpu/drm/amd/display/dc/optc/dcn35/
A Ddcn35_optc.c479 .set_odm_bypass = optc32_set_odm_bypass,
/drivers/gpu/drm/amd/display/dc/optc/dcn401/
A Ddcn401_optc.c510 .set_odm_bypass = optc401_set_odm_bypass,
/drivers/gpu/drm/amd/display/dc/hwss/dcn314/
A Ddcn314_hwseq.c190 pipe_ctx->stream_res.tg->funcs->set_odm_bypass( in dcn314_update_odm()
/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
A Ddcn401_hwseq.c1569 otg_master->stream_res.tg->funcs->set_odm_bypass( in dcn401_update_odm()
1837 if (pipe_ctx->stream_res.tg->funcs->set_odm_bypass) in dcn401_reset_back_end_for_pipe()
1838 pipe_ctx->stream_res.tg->funcs->set_odm_bypass( in dcn401_reset_back_end_for_pipe()
/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
A Ddcn20_hwseq.c1202 pipe_ctx->stream_res.tg->funcs->set_odm_bypass( in dcn20_update_odm()
2856 if (pipe_ctx->stream_res.tg->funcs->set_odm_bypass) in dcn20_reset_back_end_for_pipe()
2857 pipe_ctx->stream_res.tg->funcs->set_odm_bypass( in dcn20_reset_back_end_for_pipe()
/drivers/gpu/drm/amd/display/dc/hwss/dcn35/
A Ddcn35_hwseq.c436 pipe_ctx->stream_res.tg->funcs->set_odm_bypass( in dcn35_update_odm()
/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
A Ddcn32_hwseq.c1145 pipe_ctx->stream_res.tg->funcs->set_odm_bypass( in dcn32_update_odm()

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