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Searched refs:shift (Results 1 – 25 of 1136) sorted by relevance

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/drivers/bus/
A Domap_l3_smx.h29 static const u64 shift = 1; variable
31 #define L3_STATUS_0_MPUIA_BRST (shift << 0)
32 #define L3_STATUS_0_MPUIA_RSP (shift << 1)
33 #define L3_STATUS_0_MPUIA_INBAND (shift << 2)
34 #define L3_STATUS_0_IVAIA_BRST (shift << 6)
35 #define L3_STATUS_0_IVAIA_RSP (shift << 7)
36 #define L3_STATUS_0_IVAIA_INBAND (shift << 8)
37 #define L3_STATUS_0_SGXIA_BRST (shift << 9)
38 #define L3_STATUS_0_SGXIA_RSP (shift << 10)
40 #define L3_STATUS_0_CAMIA_BRST (shift << 12)
[all …]
A Dda8xx-mstpri.c55 int shift; member
62 .shift = 0,
67 .shift = 4,
72 .shift = 16,
77 .shift = 20,
82 .shift = 0,
87 .shift = 4,
92 .shift = 8,
97 .shift = 12,
117 .shift = 0,
[all …]
/drivers/clk/imx/
A Dclk.h133 #define imx_clk_gate(name, parent, reg, shift) \ argument
134 to_clk(imx_clk_hw_gate(name, parent, reg, shift))
139 #define imx_clk_gate2(name, parent, reg, shift) \ argument
310 void __iomem *reg, u8 shift, u8 width,
330 void __iomem *reg, u8 shift, u8 width,
358 void __iomem *reg, u8 shift, in imx_clk_hw_divider_closest() argument
367 void __iomem *reg, u8 shift, in __imx_clk_hw_divider() argument
371 reg, shift, width, 0, &imx_ccm_lock); in __imx_clk_hw_divider()
375 void __iomem *reg, u8 shift, in __imx_clk_hw_gate() argument
380 shift, clk_gate_flags, &imx_ccm_lock); in __imx_clk_hw_gate()
[all …]
/drivers/memory/tegra/
A Dtegra114.c21 .shift = 0,
37 .shift = 0,
53 .shift = 0,
69 .shift = 16,
85 .shift = 16,
101 .shift = 0,
117 .shift = 0,
133 .shift = 0,
149 .shift = 0,
181 .shift = 0,
[all …]
A Dtegra210.c26 .shift = 0,
42 .shift = 0,
58 .shift = 16,
74 .shift = 16,
90 .shift = 0,
106 .shift = 0,
122 .shift = 0,
138 .shift = 0,
154 .shift = 0,
170 .shift = 0,
[all …]
A Dtegra124.c22 .shift = 0,
38 .shift = 0,
54 .shift = 0,
70 .shift = 16,
86 .shift = 16,
102 .shift = 0,
118 .shift = 0,
134 .shift = 0,
150 .shift = 0,
166 .shift = 0,
[all …]
A Dtegra30.c43 .shift = 0,
60 .shift = 0,
77 .shift = 0,
94 .shift = 16,
111 .shift = 16,
128 .shift = 0,
145 .shift = 0,
196 .shift = 0,
213 .shift = 0,
247 .shift = 0,
[all …]
/drivers/mfd/
A Datmel-smc.c120 conf->timings &= ~GENMASK(shift + 3, shift); in atmel_smc_cs_conf_set_timing()
148 if (shift != ATMEL_SMC_NWE_SHIFT && shift != ATMEL_SMC_NCS_WR_SHIFT && in atmel_smc_cs_conf_set_setup()
149 shift != ATMEL_SMC_NRD_SHIFT && shift != ATMEL_SMC_NCS_RD_SHIFT) in atmel_smc_cs_conf_set_setup()
159 conf->setup &= ~GENMASK(shift + 7, shift); in atmel_smc_cs_conf_set_setup()
160 conf->setup |= val << shift; in atmel_smc_cs_conf_set_setup()
187 if (shift != ATMEL_SMC_NWE_SHIFT && shift != ATMEL_SMC_NCS_WR_SHIFT && in atmel_smc_cs_conf_set_pulse()
188 shift != ATMEL_SMC_NRD_SHIFT && shift != ATMEL_SMC_NCS_RD_SHIFT) in atmel_smc_cs_conf_set_pulse()
198 conf->pulse &= ~GENMASK(shift + 7, shift); in atmel_smc_cs_conf_set_pulse()
199 conf->pulse |= val << shift; in atmel_smc_cs_conf_set_pulse()
226 if (shift != ATMEL_SMC_NWE_SHIFT && shift != ATMEL_SMC_NRD_SHIFT) in atmel_smc_cs_conf_set_cycle()
[all …]
/drivers/clk/meson/
A Dparm.h14 #define SETPMASK(width, shift) GENMASK(shift + width - 1, shift) argument
15 #define CLRPMASK(width, shift) (~SETPMASK(width, shift)) argument
17 #define PARM_GET(width, shift, reg) \ argument
18 (((reg) & SETPMASK(width, shift)) >> (shift))
19 #define PARM_SET(width, shift, reg, val) \ argument
20 (((reg) & CLRPMASK(width, shift)) | ((val) << (shift)))
26 u8 shift; member
35 return PARM_GET(p->width, p->shift, val); in meson_parm_read()
41 regmap_update_bits(map, p->reg_off, SETPMASK(p->width, p->shift), in meson_parm_write()
42 val << p->shift); in meson_parm_write()
A Ds4-pll.c58 .shift = 28,
63 .shift = 0,
68 .shift = 0,
73 .shift = 10,
78 .shift = 31,
100 .shift = 16,
337 .shift = 16,
415 .shift = 16,
473 .shift = 16,
491 .shift = 20,
[all …]
A Daxg.c120 .shift = 0,
125 .shift = 9,
130 .shift = 0,
157 .shift = 16,
216 .shift = 16,
321 .shift = 16,
394 .shift = 16,
860 .shift = 6,
879 .shift = 2,
896 .shift = 1,
[all …]
A Ds4-peripherals.c134 .shift = 24,
169 .shift = 0,
207 .shift = 26,
221 .shift = 16,
253 .shift = 10,
267 .shift = 0,
299 .shift = 31,
537 .shift = 9,
551 .shift = 0,
762 .shift = 0,
[all …]
/drivers/mtd/maps/
A Dphysmap-bt1-rom.c33 unsigned int shift; in bt1_rom_map_read() local
38 shift = (uintptr_t)src & 0x3; in bt1_rom_map_read()
39 data = readl_relaxed(src - shift); in bt1_rom_map_read()
40 if (!shift) { in bt1_rom_map_read()
47 shift = 4 - shift; in bt1_rom_map_read()
48 if (ofs + shift >= map->size) in bt1_rom_map_read()
51 data = readl_relaxed(src + shift); in bt1_rom_map_read()
62 unsigned int shift, chunk; in bt1_rom_map_copy_from() local
77 shift = (uintptr_t)src & 0x3; in bt1_rom_map_copy_from()
78 if (shift) { in bt1_rom_map_copy_from()
[all …]
/drivers/soc/fsl/qe/
A Ducc.c102 unsigned int shift; in ucc_mux_set_grant_tsa_bkpt() local
124 unsigned int shift; in ucc_set_qe_mux_rxtx() local
208 shift += 4; in ucc_set_qe_mux_rxtx()
506 u32 shift; in ucc_get_tdm_clk_shift() local
510 shift -= tdm_num * 4; in ucc_get_tdm_clk_shift()
514 return shift; in ucc_get_tdm_clk_shift()
521 u32 shift; in ucc_set_tdm_rxtx_clk() local
623 u32 shift; in ucc_get_tdm_sync_shift() local
626 shift -= tdm_num * 2; in ucc_get_tdm_sync_shift()
628 return shift; in ucc_get_tdm_sync_shift()
[all …]
/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
A Dphy_qmath.c103 if (shift > 31) in qm_shl32()
104 shift = 31; in qm_shl32()
105 else if (shift < -31) in qm_shl32()
106 shift = -31; in qm_shl32()
107 if (shift >= 0) { in qm_shl32()
108 for (i = 0; i < shift; i++) in qm_shl32()
128 if (shift > 15) in qm_shl16()
129 shift = 15; in qm_shl16()
130 else if (shift < -15) in qm_shl16()
131 shift = -15; in qm_shl16()
[all …]
/drivers/gpio/
A Dgpio-tangier.c79 *bit = shift; in gpio_reg_and_bit()
86 u8 shift; in tng_gpio_get() local
97 u8 shift; in tng_gpio_set() local
113 u8 shift; in tng_gpio_direction_input() local
120 value &= ~BIT(shift); in tng_gpio_direction_input()
131 u8 shift; in tng_gpio_direction_output() local
139 value |= BIT(shift); in tng_gpio_direction_output()
148 u8 shift; in tng_gpio_get_direction() local
164 u8 shift; in tng_gpio_set_debounce() local
204 u8 shift; in tng_irq_ack() local
[all …]
/drivers/md/persistent-data/
A Ddm-btree-remove.c65 if (shift < 0) { in node_shift()
66 shift = -shift; in node_shift()
67 BUG_ON(shift > nr_entries); in node_shift()
68 BUG_ON((void *) key_ptr(n, shift) >= value_ptr(n, shift)); in node_shift()
70 key_ptr(n, shift), in node_shift()
73 value_ptr(n, shift), in node_shift()
77 memmove(key_ptr(n, shift), in node_shift()
96 if (shift < 0) { in node_copy()
97 shift = -shift; in node_copy()
327 if (shift != nr_center) { in delete_center_node()
[all …]
/drivers/clk/sunxi-ng/
A Dccu_mp.c15 if (shift) in next_div()
22 bool shift, in ccu_mp_find_best() argument
115 bool shift = true; in ccu_mp_round_rate() local
121 shift = false; in ccu_mp_round_rate()
124 if (shift) in ccu_mp_round_rate()
214 bool shift = true; in ccu_mp_set_rate() local
218 shift = false; in ccu_mp_set_rate()
225 if (shift) in ccu_mp_set_rate()
239 reg &= ~GENMASK(cmp->m.width + cmp->m.shift - 1, cmp->m.shift); in ccu_mp_set_rate()
240 reg &= ~GENMASK(cmp->p.width + cmp->p.shift - 1, cmp->p.shift); in ccu_mp_set_rate()
[all …]
/drivers/clk/at91/
A Dclk-peripheral.c142 int shift = 0; in clk_sam9x5_peripheral_autodiv() local
153 for (; shift < PERIPHERAL_MAX_SHIFT; shift++) { in clk_sam9x5_peripheral_autodiv()
160 periph->div = shift; in clk_sam9x5_peripheral_autodiv()
280 u32 shift; in clk_sam9x5_peripheral_determine_rate() local
286 for (shift = 0; shift <= PERIPHERAL_MAX_SHIFT; shift++) { in clk_sam9x5_peripheral_determine_rate()
307 for (shift = 0; shift <= PERIPHERAL_MAX_SHIFT; shift++) { in clk_sam9x5_peripheral_determine_rate()
339 int shift = 0; in clk_sam9x5_peripheral_round_rate() local
350 for (; shift <= PERIPHERAL_MAX_SHIFT; shift++) { in clk_sam9x5_peripheral_round_rate()
362 for (; shift <= PERIPHERAL_MAX_SHIFT; shift++) { in clk_sam9x5_peripheral_round_rate()
385 int shift; in clk_sam9x5_peripheral_set_rate() local
[all …]
/drivers/infiniband/core/
A Dpacker.c71 int shift; in ib_pack() local
76 shift = 32 - desc[i].offset_bits - desc[i].size_bits; in ib_pack()
80 structure) << shift; in ib_pack()
88 int shift; in ib_pack() local
93 shift = 64 - desc[i].offset_bits - desc[i].size_bits; in ib_pack()
97 structure) << shift; in ib_pack()
160 int shift; in ib_unpack() local
166 mask = ((1ull << desc[i].size_bits) - 1) << shift; in ib_unpack()
168 val = (be32_to_cpup(addr) & mask) >> shift; in ib_unpack()
174 int shift; in ib_unpack() local
[all …]
/drivers/net/ethernet/mellanox/mlxbf_gige/
A Dmlxbf_gige_mdio.c35 .shift = MLXBF2_GIGE_MDIO_GW_BUSY_SHIFT,
39 .shift = MLXBF2_GIGE_MDIO_GW_AD_SHIFT,
43 .shift = MLXBF2_GIGE_MDIO_GW_AD_SHIFT,
47 .shift = MLXBF2_GIGE_MDIO_GW_DEVAD_SHIFT,
51 .shift = MLXBF2_GIGE_MDIO_GW_PARTAD_SHIFT,
55 .shift = MLXBF2_GIGE_MDIO_GW_OPCODE_SHIFT,
59 .shift = MLXBF2_GIGE_MDIO_GW_ST1_SHIFT,
67 .shift = MLXBF3_GIGE_MDIO_GW_BUSY_SHIFT,
75 .shift = MLXBF3_GIGE_MDIO_GW_DATA_SHIFT,
79 .shift = MLXBF3_GIGE_MDIO_GW_DEVAD_SHIFT,
[all …]
/drivers/regulator/
A Dmax8998.c75 *shift = 0; in max8998_get_enable_register()
117 return max8998_update_reg(i2c, reg, 1<<shift, 1<<shift); in max8998_ldo_enable()
145 shift = 4; in max8998_get_voltage_register()
147 shift = 0; in max8998_get_voltage_register()
156 shift = 4; in max8998_get_voltage_register()
158 shift = 0; in max8998_get_voltage_register()
163 shift = 5; in max8998_get_voltage_register()
166 shift = 0; in max8998_get_voltage_register()
190 *_shift = shift; in max8998_get_voltage_register()
211 val >>= shift; in max8998_get_voltage_sel()
[all …]
/drivers/clk/
A Dclk-axm5516.c78 u32 shift; member
113 u32 shift; member
216 .shift = 0,
230 .shift = 4,
244 .shift = 8,
272 .shift = 0,
286 .shift = 4,
300 .shift = 8,
349 .shift = 0,
366 .shift = 2,
[all …]
/drivers/soc/aspeed/
A Daspeed-uart-routing.c43 uint8_t shift; member
69 .shift = 8,
89 .shift = 28,
109 .shift = 25,
127 .shift = 22,
145 .shift = 19,
163 .shift = 16,
199 .shift = 9,
217 .shift = 6,
235 .shift = 3,
[all …]
/drivers/net/ethernet/mellanox/mlxsw/
A Ditem.h52 tmp >>= item->shift; in __mlxsw_item_get8()
55 tmp <<= item->shift; in __mlxsw_item_get8()
69 val <<= item->shift; in __mlxsw_item_set8()
86 tmp >>= item->shift; in __mlxsw_item_get16()
89 tmp <<= item->shift; in __mlxsw_item_get16()
120 tmp >>= item->shift; in __mlxsw_item_get32()
154 tmp >>= item->shift; in __mlxsw_item_get64()
237 u8 shift, tmp; in __mlxsw_item_bit_array_get() local
241 tmp >>= shift; in __mlxsw_item_bit_array_get()
250 u8 shift, tmp; in __mlxsw_item_bit_array_set() local
[all …]

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