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Searched refs:smmu_domain (Results 1 – 10 of 10) sorted by relevance

/drivers/iommu/arm/arm-smmu-v3/
A Darm-smmu-v3-sva.c139 struct arm_smmu_domain *smmu_domain = in arm_smmu_mm_arch_invalidate_secondary_tlbs() local
158 arm_smmu_tlb_inv_asid(smmu_domain->smmu, smmu_domain->cd.asid); in arm_smmu_mm_arch_invalidate_secondary_tlbs()
188 smmu_domain->cd.asid); in arm_smmu_mm_release()
194 arm_smmu_tlb_inv_asid(smmu_domain->smmu, smmu_domain->cd.asid); in arm_smmu_mm_release()
304 arm_smmu_tlb_inv_asid(smmu_domain->smmu, smmu_domain->cd.asid); in arm_smmu_sva_domain_free()
339 if (IS_ERR(smmu_domain)) in arm_smmu_sva_domain_alloc()
340 return ERR_CAST(smmu_domain); in arm_smmu_sva_domain_alloc()
349 smmu_domain->smmu = smmu; in arm_smmu_sva_domain_alloc()
356 smmu_domain->cd.asid = asid; in arm_smmu_sva_domain_alloc()
362 return &smmu_domain->domain; in arm_smmu_sva_domain_alloc()
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A Darm-smmu-v3.c2466 smmu_domain = kzalloc(sizeof(*smmu_domain), GFP_KERNEL); in arm_smmu_domain_alloc()
2467 if (!smmu_domain) in arm_smmu_domain_alloc()
2473 return smmu_domain; in arm_smmu_domain_alloc()
2495 kfree(smmu_domain); in arm_smmu_domain_free_paging()
2593 smmu_domain->smmu = smmu; in arm_smmu_domain_finalise()
2822 if (!smmu_domain) in arm_smmu_remove_master_domain()
2899 if (smmu_domain) { in arm_smmu_attach_prepare()
3312 if (IS_ERR(smmu_domain)) in arm_smmu_domain_alloc_paging_flags()
3350 return &smmu_domain->domain; in arm_smmu_domain_alloc_paging_flags()
3353 kfree(smmu_domain); in arm_smmu_domain_alloc_paging_flags()
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A Darm-smmu-v3.h909 struct arm_smmu_domain *smmu_domain,
961 struct arm_smmu_domain *smmu_domain);
967 struct arm_smmu_domain *smmu_domain, ioasid_t pasid,
973 struct arm_smmu_domain *smmu_domain);
974 int arm_smmu_atc_inv_domain(struct arm_smmu_domain *smmu_domain,
A Darm-smmu-v3-test.c306 struct arm_smmu_domain smmu_domain = { in arm_smmu_test_make_s2_ste() local
319 arm_smmu_make_s2_domain_ste(ste, &master, &smmu_domain, ats_enabled); in arm_smmu_test_make_s2_ste()
458 struct arm_smmu_domain smmu_domain = { in arm_smmu_test_make_s1_cd() local
474 arm_smmu_make_s1_cd(cd, &master, &smmu_domain); in arm_smmu_test_make_s1_cd()
/drivers/iommu/arm/arm-smmu/
A Darm-smmu.c265 arm_smmu_cb_write(smmu_domain->smmu, smmu_domain->cfg.cbndx, in arm_smmu_tlb_inv_context_s1()
689 if (smmu_domain->smmu) in arm_smmu_init_domain_context()
792 smmu_domain->smmu = smmu; in arm_smmu_init_domain_context()
863 smmu_domain); in arm_smmu_init_domain_context()
882 smmu_domain->smmu = NULL; in arm_smmu_init_domain_context()
930 smmu_domain = kzalloc(sizeof(*smmu_domain), GFP_KERNEL); in arm_smmu_domain_alloc_paging()
931 if (!smmu_domain) in arm_smmu_domain_alloc_paging()
938 return &smmu_domain->domain; in arm_smmu_domain_alloc_paging()
950 kfree(smmu_domain); in arm_smmu_domain_free()
1309 smmu_domain->flush_ops->tlb_flush_all(smmu_domain); in arm_smmu_flush_iotlb_all()
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A Darm-smmu-qcom.c99 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; in qcom_adreno_smmu_get_fault_info()
100 struct arm_smmu_device *smmu = smmu_domain->smmu; in qcom_adreno_smmu_get_fault_info()
114 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; in qcom_adreno_smmu_set_stall()
115 struct arm_smmu_device *smmu = smmu_domain->smmu; in qcom_adreno_smmu_set_stall()
135 spin_lock_irqsave(&smmu_domain->cb_lock, flags); in qcom_adreno_smmu_set_stall()
153 struct arm_smmu_device *smmu = smmu_domain->smmu; in qcom_adreno_smmu_set_prr_bit()
154 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; in qcom_adreno_smmu_set_prr_bit()
232 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; in qcom_adreno_smmu_set_ttbr0_cfg()
320 int cbndx = smmu_domain->cfg.cbndx; in qcom_adreno_smmu_init_context()
349 priv->cookie = smmu_domain; in qcom_adreno_smmu_init_context()
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A Darm-smmu-qcom-debug.c129 struct arm_smmu_device *smmu = smmu_domain->smmu; in qcom_tbu_halt()
130 int ret = 0, idx = smmu_domain->cfg.cbndx; in qcom_tbu_halt()
266 struct arm_smmu_device *smmu = smmu_domain->smmu; in qcom_iova_to_phys()
268 int idx = smmu_domain->cfg.cbndx; in qcom_iova_to_phys()
288 ret = qcom_tbu_halt(tbu, smmu_domain); in qcom_iova_to_phys()
350 struct arm_smmu_device *smmu = smmu_domain->smmu; in qcom_smmu_iova_to_phys_hard()
351 int idx = smmu_domain->cfg.cbndx; in qcom_smmu_iova_to_phys_hard()
358 return qcom_iova_to_phys(smmu_domain, iova, sid); in qcom_smmu_iova_to_phys_hard()
364 struct arm_smmu_device *smmu = smmu_domain->smmu; in qcom_smmu_verify_fault()
383 struct arm_smmu_domain *smmu_domain = dev; in qcom_smmu_context_fault() local
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A Darm-smmu-impl.c71 static int cavium_init_context(struct arm_smmu_domain *smmu_domain, in cavium_init_context() argument
74 struct cavium_smmu *cs = container_of(smmu_domain->smmu, in cavium_init_context()
77 if (smmu_domain->stage == ARM_SMMU_DOMAIN_S2) in cavium_init_context()
78 smmu_domain->cfg.vmid += cs->id_base; in cavium_init_context()
80 smmu_domain->cfg.asid += cs->id_base; in cavium_init_context()
A Darm-smmu-nvidia.c224 struct arm_smmu_domain *smmu_domain = dev; in nvidia_smmu_context_fault() local
227 smmu = smmu_domain->smmu; in nvidia_smmu_context_fault()
259 static int nvidia_smmu_init_context(struct arm_smmu_domain *smmu_domain, in nvidia_smmu_init_context() argument
263 struct arm_smmu_device *smmu = smmu_domain->smmu; in nvidia_smmu_init_context()
A Darm-smmu.h444 int (*init_context)(struct arm_smmu_domain *smmu_domain,
452 int (*alloc_context_bank)(struct arm_smmu_domain *smmu_domain,

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