| /drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| A D | aldebaran_ppt.c | 364 dpm_table = &dpm_context->dpm_tables.soc_table; in aldebaran_get_dpm_ultimate_freq() 408 dpm_table = &dpm_context->dpm_tables.soc_table; in aldebaran_set_default_dpm_table() 600 struct smu_13_0_dpm_table *soc_table = in aldebaran_populate_umd_state_clk() local 601 &dpm_context->dpm_tables.soc_table; in aldebaran_populate_umd_state_clk() 615 pstate_table->socclk_pstate.min = soc_table->min; in aldebaran_populate_umd_state_clk() 616 pstate_table->socclk_pstate.peak = soc_table->max; in aldebaran_populate_umd_state_clk() 617 pstate_table->socclk_pstate.curr.min = soc_table->min; in aldebaran_populate_umd_state_clk() 618 pstate_table->socclk_pstate.curr.max = soc_table->max; in aldebaran_populate_umd_state_clk() 622 soc_table->count > ALDEBARAN_UMD_PSTATE_SOCCLK_LEVEL) { in aldebaran_populate_umd_state_clk() 628 soc_table->dpm_levels[ALDEBARAN_UMD_PSTATE_SOCCLK_LEVEL].value; in aldebaran_populate_umd_state_clk() [all …]
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| A D | aldebaran_ppt.h | 60 struct aldebaran_single_dpm_table soc_table; member
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| A D | smu_v13_0_7_ppt.c | 585 dpm_table = &dpm_context->dpm_tables.soc_table; in smu_v13_0_7_set_default_dpm_table() 883 dpm_table = &dpm_context->dpm_tables.soc_table; in smu_v13_0_7_get_dpm_ultimate_freq() 1206 single_dpm_table = &(dpm_context->dpm_tables.soc_table); in smu_v13_0_7_print_clk_levels() 1998 single_dpm_table = &(dpm_context->dpm_tables.soc_table); in smu_v13_0_7_force_clk_levels() 2295 struct smu_13_0_dpm_table *soc_table = in smu_v13_0_7_populate_umd_state_clk() local 2296 &dpm_context->dpm_tables.soc_table; in smu_v13_0_7_populate_umd_state_clk() 2320 pstate_table->socclk_pstate.min = soc_table->min; in smu_v13_0_7_populate_umd_state_clk() 2321 pstate_table->socclk_pstate.peak = soc_table->max; in smu_v13_0_7_populate_umd_state_clk() 2338 pstate_table->socclk_pstate.standard = soc_table->min; in smu_v13_0_7_populate_umd_state_clk()
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| A D | smu_v13_0_6_ppt.c | 904 dpm_table = &dpm_context->dpm_tables.soc_table; in smu_v13_0_6_get_dpm_ultimate_freq() 998 &dpm_context->dpm_tables.soc_table, in smu_v13_0_6_set_default_dpm_table() 1110 struct smu_13_0_dpm_table *soc_table = in smu_v13_0_6_populate_umd_state_clk() local 1111 &dpm_context->dpm_tables.soc_table; in smu_v13_0_6_populate_umd_state_clk() 1124 pstate_table->socclk_pstate.min = soc_table->min; in smu_v13_0_6_populate_umd_state_clk() 1125 pstate_table->socclk_pstate.peak = soc_table->max; in smu_v13_0_6_populate_umd_state_clk() 1126 pstate_table->socclk_pstate.curr.min = soc_table->min; in smu_v13_0_6_populate_umd_state_clk() 1127 pstate_table->socclk_pstate.curr.max = soc_table->max; in smu_v13_0_6_populate_umd_state_clk() 1131 soc_table->count > SMU_13_0_6_UMD_PSTATE_SOCCLK_LEVEL) { in smu_v13_0_6_populate_umd_state_clk() 1137 soc_table->dpm_levels[SMU_13_0_6_UMD_PSTATE_SOCCLK_LEVEL].value; in smu_v13_0_6_populate_umd_state_clk() [all …]
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| A D | smu_v13_0_0_ppt.c | 578 dpm_table = &dpm_context->dpm_tables.soc_table; in smu_v13_0_0_set_default_dpm_table() 894 dpm_table = &dpm_context->dpm_tables.soc_table; in smu_v13_0_0_get_dpm_ultimate_freq() 1217 single_dpm_table = &(dpm_context->dpm_tables.soc_table); in smu_v13_0_0_print_clk_levels() 2009 single_dpm_table = &(dpm_context->dpm_tables.soc_table); in smu_v13_0_0_force_clk_levels() 2309 struct smu_13_0_dpm_table *soc_table = in smu_v13_0_0_populate_umd_state_clk() local 2310 &dpm_context->dpm_tables.soc_table; in smu_v13_0_0_populate_umd_state_clk() 2334 pstate_table->socclk_pstate.min = soc_table->min; in smu_v13_0_0_populate_umd_state_clk() 2335 pstate_table->socclk_pstate.peak = soc_table->max; in smu_v13_0_0_populate_umd_state_clk() 2352 pstate_table->socclk_pstate.standard = soc_table->min; in smu_v13_0_0_populate_umd_state_clk()
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| A D | smu_v13_0.c | 1591 struct smu_13_0_dpm_table *soc_table = in smu_v13_0_set_performance_level() local 1592 &dpm_context->dpm_tables.soc_table; in smu_v13_0_set_performance_level() 1615 socclk_min = socclk_max = soc_table->max; in smu_v13_0_set_performance_level() 1623 socclk_min = socclk_max = soc_table->min; in smu_v13_0_set_performance_level() 1633 socclk_min = soc_table->min; in smu_v13_0_set_performance_level() 1634 socclk_max = soc_table->max; in smu_v13_0_set_performance_level()
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| /drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| A D | vega20_hwmgr.c | 653 dpm_table = &(data->dpm_table.soc_table); in vega20_setup_default_dpm_tables() 2412 data->dpm_table.soc_table.dpm_state.soft_min_level = in vega20_force_dpm_highest() 2413 data->dpm_table.soc_table.dpm_state.soft_max_level = in vega20_force_dpm_highest() 2454 data->dpm_table.soc_table.dpm_state.soft_min_level = in vega20_force_dpm_lowest() 2455 data->dpm_table.soc_table.dpm_state.soft_max_level = in vega20_force_dpm_lowest() 2511 data->dpm_table.soc_table.dpm_state.soft_min_level = in vega20_unforce_dpm_levels() 2513 data->dpm_table.soc_table.dpm_state.soft_max_level = in vega20_unforce_dpm_levels() 2636 data->dpm_table.soc_table.count - 1); in vega20_force_clock_level() 2640 data->dpm_table.soc_table.dpm_state.soft_min_level = in vega20_force_clock_level() 2642 data->dpm_table.soc_table.dpm_state.soft_max_level = in vega20_force_clock_level() [all …]
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| A D | vega12_hwmgr.c | 654 dpm_table = &(data->dpm_table.soc_table); in vega12_setup_default_dpm_tables() 1225 min_freq = data->dpm_table.soc_table.dpm_state.soft_min_level; in vega12_upload_dpm_min_level() 1309 max_freq = data->dpm_table.soc_table.dpm_state.soft_max_level; in vega12_upload_dpm_max_level() 1955 dpm_table = &(data->dpm_table.soc_table); in vega12_get_socclocks() 2078 if (soft_max_level >= data->dpm_table.soc_table.count) { in vega12_force_clock_level() 2081 data->dpm_table.soc_table.count - 1); in vega12_force_clock_level() 2085 data->dpm_table.soc_table.dpm_state.soft_min_level = in vega12_force_clock_level() 2086 data->dpm_table.soc_table.dpm_levels[soft_min_level].value; in vega12_force_clock_level() 2087 data->dpm_table.soc_table.dpm_state.soft_max_level = in vega12_force_clock_level() 2088 data->dpm_table.soc_table.dpm_levels[soft_max_level].value; in vega12_force_clock_level() [all …]
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| A D | vega10_hwmgr.c | 1354 dpm_table = &(data->dpm_table.soc_table); in vega10_setup_default_dpm_tables() 1760 dpm_table = &(data->dpm_table.soc_table); in vega10_populate_all_graphic_levels() 3574 &(data->dpm_table.soc_table), in vega10_trim_dpm_states() 4688 struct vega10_single_dpm_table *soc_table = &(data->dpm_table.soc_table); in vega10_emit_clock_levels() local 4737 for (i = 0; i < soc_table->count; i++) in vega10_emit_clock_levels() 4739 i, soc_table->dpm_levels[i].value / 100, in vega10_emit_clock_levels() 4834 struct vega10_single_dpm_table *soc_table = &(data->dpm_table.soc_table); in vega10_print_clock_levels() local 4882 for (i = 0; i < soc_table->count; i++) in vega10_print_clock_levels() 4884 i, soc_table->dpm_levels[i].value / 100, in vega10_print_clock_levels() 5465 &data->dpm_table.soc_table; in vega10_odn_update_power_state() [all …]
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| A D | vega10_hwmgr.h | 147 struct vega10_single_dpm_table soc_table; member
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| A D | vega12_hwmgr.h | 125 struct vega12_single_dpm_table soc_table; member
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| A D | vega20_hwmgr.h | 178 struct vega20_single_dpm_table soc_table; member
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| /drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| A D | arcturus_ppt.h | 60 struct arcturus_single_dpm_table soc_table; member
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| A D | arcturus_ppt.c | 369 dpm_table = &dpm_context->dpm_tables.soc_table; in arcturus_set_default_dpm_table() 579 struct smu_11_0_dpm_table *soc_table = in arcturus_populate_umd_state_clk() local 580 &dpm_context->dpm_tables.soc_table; in arcturus_populate_umd_state_clk() 590 pstate_table->socclk_pstate.min = soc_table->min; in arcturus_populate_umd_state_clk() 591 pstate_table->socclk_pstate.peak = soc_table->max; in arcturus_populate_umd_state_clk() 595 soc_table->count > ARCTURUS_UMD_PSTATE_SOCCLK_LEVEL) { in arcturus_populate_umd_state_clk() 601 soc_table->dpm_levels[ARCTURUS_UMD_PSTATE_SOCCLK_LEVEL].value; in arcturus_populate_umd_state_clk() 853 single_dpm_table = &(dpm_context->dpm_tables.soc_table); in arcturus_emit_clk_levels() 987 freq = dpm_context->dpm_tables.soc_table.dpm_levels[level].value; in arcturus_upload_dpm_level()
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| A D | smu_v11_0.c | 1861 struct smu_11_0_dpm_table *soc_table = in smu_v11_0_set_performance_level() local 1862 &dpm_context->dpm_tables.soc_table; in smu_v11_0_set_performance_level() 1876 socclk_min = socclk_max = soc_table->max; in smu_v11_0_set_performance_level() 1881 socclk_min = socclk_max = soc_table->min; in smu_v11_0_set_performance_level() 1888 socclk_min = soc_table->min; in smu_v11_0_set_performance_level() 1889 socclk_max = soc_table->max; in smu_v11_0_set_performance_level()
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| A D | navi10_ppt.c | 974 dpm_table = &dpm_context->dpm_tables.soc_table; in navi10_set_default_dpm_table() 1717 struct smu_11_0_dpm_table *soc_table = in navi10_populate_umd_state_clk() local 1718 &dpm_context->dpm_tables.soc_table; in navi10_populate_umd_state_clk() 1776 pstate_table->socclk_pstate.min = soc_table->min; in navi10_populate_umd_state_clk() 1777 pstate_table->socclk_pstate.peak = soc_table->max; in navi10_populate_umd_state_clk() 1781 soc_table->max > NAVI10_UMD_PSTATE_PROFILING_SOCCLK) { in navi10_populate_umd_state_clk()
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| A D | sienna_cichlid_ppt.c | 963 dpm_table = &dpm_context->dpm_tables.soc_table; in sienna_cichlid_set_default_dpm_table() 1493 struct smu_11_0_dpm_table *soc_table = in sienna_cichlid_populate_umd_state_clk() local 1494 &dpm_context->dpm_tables.soc_table; in sienna_cichlid_populate_umd_state_clk() 1505 pstate_table->socclk_pstate.min = soc_table->min; in sienna_cichlid_populate_umd_state_clk() 1506 pstate_table->socclk_pstate.peak = soc_table->max; in sienna_cichlid_populate_umd_state_clk()
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| /drivers/gpu/drm/amd/pm/swsmu/smu14/ |
| A D | smu_v14_0_2_ppt.c | 508 dpm_table = &dpm_context->dpm_tables.soc_table; in smu_v14_0_2_set_default_dpm_table() 812 dpm_table = &dpm_context->dpm_tables.soc_table; in smu_v14_0_2_get_dpm_ultimate_freq() 1078 single_dpm_table = &(dpm_context->dpm_tables.soc_table); in smu_v14_0_2_print_clk_levels() 1404 single_dpm_table = &(dpm_context->dpm_tables.soc_table); in smu_v14_0_2_force_clk_levels() 1589 struct smu_14_0_dpm_table *soc_table = in smu_v14_0_2_populate_umd_state_clk() local 1590 &dpm_context->dpm_tables.soc_table; in smu_v14_0_2_populate_umd_state_clk() 1614 pstate_table->socclk_pstate.min = soc_table->min; in smu_v14_0_2_populate_umd_state_clk() 1615 pstate_table->socclk_pstate.peak = soc_table->max; in smu_v14_0_2_populate_umd_state_clk() 1632 pstate_table->socclk_pstate.standard = soc_table->min; in smu_v14_0_2_populate_umd_state_clk()
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| A D | smu_v14_0.c | 1254 struct smu_14_0_dpm_table *soc_table = in smu_v14_0_set_performance_level() local 1255 &dpm_context->dpm_tables.soc_table; in smu_v14_0_set_performance_level() 1278 socclk_min = socclk_max = soc_table->max; in smu_v14_0_set_performance_level() 1286 socclk_min = socclk_max = soc_table->min; in smu_v14_0_set_performance_level() 1296 socclk_min = soc_table->min; in smu_v14_0_set_performance_level() 1297 socclk_max = soc_table->max; in smu_v14_0_set_performance_level()
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| /drivers/gpu/drm/amd/pm/swsmu/inc/ |
| A D | smu_v14_0.h | 91 struct smu_14_0_dpm_table soc_table; member
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| A D | smu_v11_0.h | 102 struct smu_11_0_dpm_table soc_table; member
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| A D | smu_v13_0.h | 96 struct smu_13_0_dpm_table soc_table; member
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