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Searched refs:sor (Results 1 – 25 of 36) sorted by relevance

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/drivers/gpu/drm/tegra/
A Dsor.c545 struct tegra_sor *sor = pad->sor; in tegra_clk_sor_pad_set_parent() local
569 struct tegra_sor *sor = pad->sor; in tegra_clk_sor_pad_get_parent() local
607 pad->sor = sor; in tegra_clk_sor_pad_register()
1699 sor->debugfs_files[i].data = sor; in tegra_sor_late_register()
3070 sor->link.aux = sor->aux; in tegra_sor_init()
3073 sor->output.dev = sor->dev; in tegra_sor_init()
3700 sor->ops->audio_enable(sor); in tegra_sor_irq()
3703 sor->ops->audio_disable(sor); in tegra_sor_irq()
3777 if (sor->ops && sor->ops->probe) { in tegra_sor_probe()
3778 err = sor->ops->probe(sor); in tegra_sor_probe()
[all …]
A DMakefile21 sor.o \
/drivers/gpu/drm/nouveau/nvkm/engine/disp/
A Dg94.c37 const u32 loff = nv50_sor_link(sor); in g94_sor_dp_watermark()
47 const u32 loff = nv50_sor_link(sor); in g94_sor_dp_activesym()
57 const u32 soff = nv50_ior_base(sor); in g94_sor_dp_audio_sym()
130 if (sor->dp.ef) in g94_sor_dp_links()
132 if (sor->dp.bw > 0x06) in g94_sor_dp_links()
158 if (sor->asy.proto == TMDS) { in g94_sor_war_needed()
201 g94_sor_war_3(struct nvkm_ior *sor) in g94_sor_war_3() argument
207 if (!g94_sor_war_needed(sor)) in g94_sor_war_3()
242 g94_sor_war_2(struct nvkm_ior *sor) in g94_sor_war_2() argument
247 if (!g94_sor_war_needed(sor)) in g94_sor_war_2()
[all …]
A Dga102.c36 const u32 soff = nv50_ior_base(sor); in ga102_sor_dp_links()
37 const u32 loff = nv50_sor_link(sor); in ga102_sor_dp_links()
41 switch (sor->dp.bw) { in ga102_sor_dp_links()
55 dpctrl |= ((1 << sor->dp.nr) - 1) << 16; in ga102_sor_dp_links()
56 if (sor->dp.mst) in ga102_sor_dp_links()
58 if (sor->dp.ef) in ga102_sor_dp_links()
86 ga102_sor_clock(struct nvkm_ior *sor) in ga102_sor_clock() argument
91 if (sor->asy.proto == TMDS) { in ga102_sor_clock()
92 if (sor->tmds.high_speed) in ga102_sor_clock()
97 nvkm_wr32(device, 0x00ec04 + (sor->id * 0x10), div2); in ga102_sor_clock()
[all …]
A Dgm200.c36 struct nvkm_device *device = sor->disp->engine.subdev.device; in gm200_sor_dp_drive()
37 const u32 loff = nv50_sor_link(sor); in gm200_sor_dp_drive()
38 const u32 shift = sor->func->dp->lanes[ln] * 8; in gm200_sor_dp_drive()
103 const u32 sor = ior ? ior->id + 1 : 0; in gm200_sor_route_set() local
107 nvkm_mask(device, 0x612308 + moff, 0x0000001f, link << 4 | sor); in gm200_sor_route_set()
120 int lnk[2], sor[2], m, s; in gm200_sor_route_get() local
126 sor[s] = (data & 0x0000000f); in gm200_sor_route_get()
127 if (!sor[s]) in gm200_sor_route_get()
134 if (sor[0] != sor[1] || WARN_ON(lnk[0] || !lnk[1])) in gm200_sor_route_get()
138 return ((sublinks & 1) ? sor[0] : sor[1]) - 1; in gm200_sor_route_get()
[all …]
A Dtu102.c36 struct nvkm_device *device = sor->disp->engine.subdev.device; in tu102_sor_dp_vcpi()
44 tu102_sor_dp_links(struct nvkm_ior *sor, struct nvkm_i2c_aux *aux) in tu102_sor_dp_links() argument
46 struct nvkm_device *device = sor->disp->engine.subdev.device; in tu102_sor_dp_links()
47 const u32 soff = nv50_ior_base(sor); in tu102_sor_dp_links()
48 const u32 loff = nv50_sor_link(sor); in tu102_sor_dp_links()
52 clksor |= sor->dp.bw << 18; in tu102_sor_dp_links()
53 dpctrl |= ((1 << sor->dp.nr) - 1) << 16; in tu102_sor_dp_links()
54 if (sor->dp.mst) in tu102_sor_dp_links()
56 if (sor->dp.ef) in tu102_sor_dp_links()
130 for (i = 0; i < disp->sor.nr; i++) { in tu102_disp_init()
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A Dgf119.c154 const u32 soff = nv50_ior_base(sor); in gf119_sor_dp_pattern()
174 const u32 soff = nv50_ior_base(sor); in gf119_sor_dp_links()
175 const u32 loff = nv50_sor_link(sor); in gf119_sor_dp_links()
179 clksor |= sor->dp.bw << 18; in gf119_sor_dp_links()
181 if (sor->dp.mst) in gf119_sor_dp_links()
183 if (sor->dp.ef) in gf119_sor_dp_links()
290 u32 div1 = sor->asy.link == 3; in gf119_sor_clock()
291 u32 div2 = sor->asy.link == 3; in gf119_sor_clock()
293 if (sor->asy.proto == TMDS) { in gf119_sor_clock()
296 if (sor->tmds.high_speed) in gf119_sor_clock()
[all …]
A Dgm107.c32 gm107_sor_dp_pattern(struct nvkm_ior *sor, int pattern) in gm107_sor_dp_pattern() argument
34 struct nvkm_device *device = sor->disp->engine.subdev.device; in gm107_sor_dp_pattern()
35 const u32 soff = nv50_ior_base(sor); in gm107_sor_dp_pattern()
49 if (sor->asy.link & 1) in gm107_sor_dp_pattern()
96 .sor = { .cnt = gf119_sor_cnt, .new = gm107_sor_new },
A Dnv50.c193 nv50_sor_clock(struct nvkm_ior *sor) in nv50_sor_clock() argument
196 const int div = sor->asy.link == 3; in nv50_sor_clock()
197 const u32 soff = nv50_ior_base(sor); in nv50_sor_clock()
215 const u32 soff = nv50_ior_base(sor); in nv50_sor_power()
234 const u32 coff = sor->id * 8 + (state == &sor->arm) * 4; in nv50_sor_state()
1549 for (i = 0; i < disp->sor.nr; i++) { in nv50_disp_init()
1629 disp->sor.nr = func->sor.cnt(disp, &disp->sor.mask); in nv50_disp_oneinit()
1630 nvkm_debug(subdev, " SOR(s): %d (%02lx)\n", disp->sor.nr, disp->sor.mask); in nv50_disp_oneinit()
1631 for_each_set_bit(i, &disp->sor.mask, disp->sor.nr) { in nv50_disp_oneinit()
1632 ret = func->sor.new(disp, i); in nv50_disp_oneinit()
[all …]
A Dgv100.c54 gv100_sor_dp_watermark(struct nvkm_ior *sor, int head, u8 watermark) in gv100_sor_dp_watermark() argument
56 struct nvkm_device *device = sor->disp->engine.subdev.device; in gv100_sor_dp_watermark()
63 gv100_sor_dp_audio_sym(struct nvkm_ior *sor, int head, u16 h, u32 v) in gv100_sor_dp_audio_sym() argument
65 struct nvkm_device *device = sor->disp->engine.subdev.device; in gv100_sor_dp_audio_sym()
73 gv100_sor_dp_audio(struct nvkm_ior *sor, int head, bool enable) in gv100_sor_dp_audio() argument
75 struct nvkm_device *device = sor->disp->engine.subdev.device; in gv100_sor_dp_audio()
184 gv100_sor_state(struct nvkm_ior *sor, struct nvkm_ior_state *state) in gv100_sor_state() argument
186 struct nvkm_device *device = sor->disp->engine.subdev.device; in gv100_sor_state()
187 const u32 coff = (state == &sor->arm) * 0x8000 + sor->id * 0x20; in gv100_sor_state()
1147 for (i = 0; i < disp->sor.nr; i++) { in gv100_disp_init()
[all …]
A Dgt215.c68 gt215_sor_dp_audio(struct nvkm_ior *sor, int head, bool enable) in gt215_sor_dp_audio() argument
70 struct nvkm_device *device = sor->disp->engine.subdev.device; in gt215_sor_dp_audio()
71 const u32 soff = nv50_ior_base(sor); in gt215_sor_dp_audio()
249 .sor = { .cnt = g94_sor_cnt, .new = gt215_sor_new },
A Dgk110.c42 .sor = { .cnt = gf119_sor_cnt, .new = gk104_sor_new },
A Dgt200.c91 .sor = { .cnt = nv50_sor_cnt, .new = g84_sor_new },
A Dmcp77.c55 .sor = { .cnt = g94_sor_cnt, .new = mcp77_sor_new },
A Dgp100.c68 .sor = { .cnt = gf119_sor_cnt, .new = gp100_sor_new },
A Dmcp89.c69 .sor = { .cnt = g94_sor_cnt, .new = mcp89_sor_new },
A Dpriv.h35 } wndw, head, dac, sor, pior; member
/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/
A Ddisp.c292 struct nvkm_disp *disp = sor->disp; in r535_sor_bl_set()
301 struct nvkm_disp *disp = sor->disp; in r535_sor_bl_get()
416 ctrl->sorIndex = sor->id; in r535_sor_dp_vcpi()
417 ctrl->dpLink = sor->asy.link == 2; in r535_sor_dp_vcpi()
449 ctrl->sorIndex = sor->id; in r535_sor_dp_sst()
450 ctrl->dpLink = sor->asy.link == 2; in r535_sor_dp_sst()
1672 disp->sor.nr = disp->func->sor.cnt(disp, &disp->sor.mask); in r535_disp_oneinit()
1673 nvkm_debug(&disp->engine.subdev, " SOR(s): %d (%02lx)\n", disp->sor.nr, disp->sor.mask); in r535_disp_oneinit()
1674 for_each_set_bit(i, &disp->sor.mask, disp->sor.nr) { in r535_disp_oneinit()
1745 rm->sor.cnt = r535_sor_cnt; in r535_disp_new()
[all …]
/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
A Ddcb.h38 struct sor_conf sor; member
47 struct sor_conf sor; member
52 struct sor_conf sor; member
/drivers/gpu/drm/nouveau/dispnv50/
A Dcore827d.c34 .sor = &sor507d,
A Dcore917d.c37 .sor = &sor907d,
A Dcore907d.c71 .sor = &sor907d,
A Dcorec57d.c72 .sor = &sorc37d,
A Dcore.h43 } *dac, *pior, *sor; member
/drivers/gpu/drm/nouveau/include/nvkm/engine/
A Ddisp.h53 } wndw, head, dac, sor; member

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