Home
last modified time | relevance | path

Searched refs:speed_grade (Results 1 – 4 of 4) sorted by relevance

/drivers/cpufreq/
A Dimx-cpufreq-dt.c87 int speed_grade, mkt_segment; in imx_cpufreq_dt_probe() local
122 speed_grade = (cell_value & IMX8MN_OCOTP_CFG3_SPEED_GRADE_MASK) in imx_cpufreq_dt_probe()
125 speed_grade = (cell_value & OCOTP_CFG3_SPEED_GRADE_MASK) in imx_cpufreq_dt_probe()
142 if (mkt_segment == 0 && speed_grade == 0) { in imx_cpufreq_dt_probe()
145 speed_grade = 1; in imx_cpufreq_dt_probe()
148 speed_grade = 0xb; in imx_cpufreq_dt_probe()
151 supported_hw[0] = BIT(speed_grade); in imx_cpufreq_dt_probe()
154 speed_grade, mkt_segment, supported_hw[0], supported_hw[1]); in imx_cpufreq_dt_probe()
/drivers/clk/
A Dclk-axi-clkgen.c509 unsigned int tech, family, speed_grade, reg_value; in axi_clkgen_setup_limits() local
514 speed_grade = ADI_AXI_INFO_FPGA_SPEED_GRADE(reg_value); in axi_clkgen_setup_limits()
519 switch (speed_grade) { in axi_clkgen_setup_limits()
542 speed_grade); in axi_clkgen_setup_limits()
/drivers/clk/xilinx/
A Dclk-xlnx-clock-wizard.c142 unsigned int speed_grade; member
931 max = clk_wzrd_max_freq[clk_wzrd->speed_grade - 1]; in clk_wzrd_clk_notifier()
1177 ret = of_property_read_u32(np, "xlnx,speed-grade", &clk_wzrd->speed_grade); in clk_wzrd_probe()
1179 if (clk_wzrd->speed_grade < 1 || clk_wzrd->speed_grade > 3) { in clk_wzrd_probe()
1181 clk_wzrd->speed_grade); in clk_wzrd_probe()
1182 clk_wzrd->speed_grade = 0; in clk_wzrd_probe()
1203 if (clk_wzrd->speed_grade) { in clk_wzrd_probe()
/drivers/misc/genwqe/
A Dcard_utils.c1017 static const int speed_grade[] = { 250, 200, 166, 175 }; in genwqe_base_clock_frequency() local
1020 if (speed >= ARRAY_SIZE(speed_grade)) in genwqe_base_clock_frequency()
1023 return speed_grade[speed]; in genwqe_base_clock_frequency()

Completed in 16 milliseconds