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Searched refs:sps (Results 1 – 25 of 34) sorted by relevance

12

/drivers/media/platform/allegro-dvt/
A Dnal-h264.c202 if (!sps) { in nal_h264_rbsp_sps()
219 if (sps->profile_idc == 100 || sps->profile_idc == 110 || in nal_h264_rbsp_sps()
220 sps->profile_idc == 122 || sps->profile_idc == 244 || in nal_h264_rbsp_sps()
221 sps->profile_idc == 44 || sps->profile_idc == 83 || in nal_h264_rbsp_sps()
222 sps->profile_idc == 86 || sps->profile_idc == 118 || in nal_h264_rbsp_sps()
223 sps->profile_idc == 128 || sps->profile_idc == 138 || in nal_h264_rbsp_sps()
224 sps->profile_idc == 139 || sps->profile_idc == 134 || in nal_h264_rbsp_sps()
225 sps->profile_idc == 135) { in nal_h264_rbsp_sps()
265 if (!sps->frame_mbs_only_flag) in nal_h264_rbsp_sps()
372 nal_h264_rbsp_sps(&rbsp, sps); in nal_h264_write_sps()
[all …]
A Dnal-hevc.c351 if (sps->chroma_format_idc == 3) in nal_hevc_rbsp_sps()
356 if (sps->conformance_window_flag) { in nal_hevc_rbsp_sps()
368 for (i = (sps->sub_layer_ordering_info_present_flag ? 0 : sps->max_sub_layers_minus1); in nal_hevc_rbsp_sps()
388 if (sps->pcm_enabled_flag) { in nal_hevc_rbsp_sps()
411 if (sps->extension_present_flag) { in nal_hevc_rbsp_sps()
418 if (sps->sps_range_extension_flag) in nal_hevc_rbsp_sps()
422 if (sps->sps_3d_extension_flag) in nal_hevc_rbsp_sps()
424 if (sps->sps_scc_extension_flag) in nal_hevc_rbsp_sps()
426 if (sps->sps_extension_4bits) in nal_hevc_rbsp_sps()
636 nal_hevc_rbsp_sps(&rbsp, sps); in nal_hevc_write_sps()
[all …]
A Dallegro-core.c1574 struct nal_h264_sps *sps; in allegro_h264_write_sps() local
1585 sps = kzalloc(sizeof(*sps), GFP_KERNEL); in allegro_h264_write_sps()
1586 if (!sps) in allegro_h264_write_sps()
1616 sps->crop_left = 0; in allegro_h264_write_sps()
1618 sps->crop_top = 0; in allegro_h264_write_sps()
1670 kfree(sps); in allegro_h264_write_sps()
1775 sps = kzalloc(sizeof(*sps), GFP_KERNEL); in allegro_hevc_write_sps()
1776 if (!sps) in allegro_hevc_write_sps()
1798 sps->conf_win_right_offset || sps->conf_win_bottom_offset; in allegro_hevc_write_sps()
1823 vui = &sps->vui; in allegro_hevc_write_sps()
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A Dnal-h264.h390 void *dest, size_t n, struct nal_h264_sps *sps);
392 struct nal_h264_sps *sps, void *src, size_t n);
393 void nal_h264_print_sps(const struct device *dev, struct nal_h264_sps *sps);
/drivers/media/platform/chips-media/coda/
A Dcoda-h264.c259 struct rbsp sps; in coda_h264_sps_fixup() local
267 sps.size = *size - 5; in coda_h264_sps_fixup()
269 profile_idc = sps.buf[0]; in coda_h264_sps_fixup()
272 sps.pos = 24; in coda_h264_sps_fixup()
308 ret = rbsp_read_bit(&sps); in coda_h264_sps_fixup()
320 ret = rbsp_read_uev(&sps, in coda_h264_sps_fixup()
338 ret = rbsp_read_bit(&sps); in coda_h264_sps_fixup()
357 ret = rbsp_read_bit(&sps); in coda_h264_sps_fixup()
362 pos = sps.pos; in coda_h264_sps_fixup()
401 sps.size = max_size - 5; in coda_h264_sps_fixup()
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/drivers/pmdomain/actions/
A Dowl-sps.c46 struct owl_sps *sps; member
86 pd->sps = sps; in owl_sps_init_domain()
102 struct owl_sps *sps; in owl_sps_probe() local
111 sps = devm_kzalloc(&pdev->dev, in owl_sps_probe()
114 if (!sps) in owl_sps_probe()
118 if (IS_ERR(sps->base)) { in owl_sps_probe()
120 return PTR_ERR(sps->base); in owl_sps_probe()
123 sps->dev = &pdev->dev; in owl_sps_probe()
124 sps->info = sps_info; in owl_sps_probe()
125 sps->genpd_data.domains = sps->domains; in owl_sps_probe()
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A DMakefile2 obj-$(CONFIG_OWL_PM_DOMAINS_HELPER) += owl-sps-helper.o
3 obj-$(CONFIG_OWL_PM_DOMAINS) += owl-sps.o
/drivers/media/platform/verisilicon/
A Dhantro_g2_hevc_dec.c16 const struct v4l2_ctrl_hevc_sps *sps = ctrls->sps; in prepare_tile_info_buffer() local
31 sps->log2_diff_max_min_luma_coding_block_size; in prepare_tile_info_buffer()
32 pic_width_in_ctbs = (sps->pic_width_in_luma_samples + in prepare_tile_info_buffer()
110 const struct v4l2_ctrl_hevc_sps *sps = ctrls->sps; in compute_header_skip_length() local
132 else if (sps->num_short_term_ref_pic_sets > 1) in compute_header_skip_length()
144 const struct v4l2_ctrl_hevc_sps *sps = ctrls->sps; in set_params() local
187 sps->max_transform_hierarchy_depth_inter); in set_params()
189 sps->max_transform_hierarchy_depth_intra); in set_params()
251 sps->pcm_sample_bit_depth_luma_minus1 + 1); in set_params()
253 sps->pcm_sample_bit_depth_chroma_minus1 + 1); in set_params()
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A Dhantro_g1_h264_dec.c26 const struct v4l2_ctrl_h264_sps *sps = ctrls->sps; in set_params() local
33 if (sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD) in set_params()
35 if (sps->profile_idc > 66) { in set_params()
41 if (!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY) && in set_params()
42 (sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD || in set_params()
54 G1_REG_DEC_CTRL1_REF_FRAMES(sps->max_num_ref_frames); in set_params()
63 if (!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY)) in set_params()
79 if (sps->flags & V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE) in set_params()
81 if (sps->profile_idc >= 100 && sps->chroma_format_idc == 0) in set_params()
230 if (ctrls->sps->profile_idc >= 100 && in set_buffers()
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A Dhantro_g2.c63 const struct v4l2_ctrl_hevc_sps *sps = ctrls->sps; in hantro_g2_mv_size() local
67 max_log2_ctb_size = sps->log2_min_luma_coding_block_size_minus3 + 3 + in hantro_g2_mv_size()
68 sps->log2_diff_max_min_luma_coding_block_size; in hantro_g2_mv_size()
69 pic_width_in_ctbs = (sps->pic_width_in_luma_samples + in hantro_g2_mv_size()
71 pic_height_in_ctbs = (sps->pic_height_in_luma_samples + (1 << max_log2_ctb_size) - 1) in hantro_g2_mv_size()
A Drockchip_vpu2_hw_h264_dec.c197 const struct v4l2_ctrl_h264_sps *sps = ctrls->sps; in set_params() local
239 (sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD || in set_params()
243 VDPU_REG_WRITE_MVS_E((sps->profile_idc > 66) && dec_param->nal_ref_idc) | in set_params()
245 VDPU_REG_PICORD_COUNT_E(sps->profile_idc > 66) | in set_params()
268 VDPU_REG_REF_FRAMES(sps->max_num_ref_frames); in set_params()
273 VDPU_REG_FRAMENUM_LEN(sps->log2_max_frame_num_minus4 + 4) | in set_params()
289 VDPU_REG_BLACKWHITE_E(sps->profile_idc >= 100 && sps->chroma_format_idc == 0) | in set_params()
295 VDPU_REG_FIELDPIC_FLAG_E(!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY)); in set_params()
443 if (ctrls->sps->profile_idc > 66 && ctrls->decode->nal_ref_idc) { in set_buffers()
447 if (ctrls->sps->profile_idc >= 100 && in set_buffers()
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A Dhantro_hevc.c81 const struct v4l2_ctrl_hevc_sps *sps = ctrls->sps; in tile_buffer_reallocate() local
83 unsigned int height64 = (sps->pic_height_in_luma_samples + 63) & ~63; in tile_buffer_reallocate()
157 static int hantro_hevc_validate_sps(struct hantro_ctx *ctx, const struct v4l2_ctrl_hevc_sps *sps) in hantro_hevc_validate_sps() argument
165 ALIGN(sps->pic_width_in_luma_samples, ctx->vpu_dst_fmt->frmsize.step_width)) in hantro_hevc_validate_sps()
169 ALIGN(sps->pic_height_in_luma_samples, ctx->vpu_dst_fmt->frmsize.step_height)) in hantro_hevc_validate_sps()
194 ctrls->sps = in hantro_hevc_dec_prepare_run()
196 if (WARN_ON(!ctrls->sps)) in hantro_hevc_dec_prepare_run()
199 ret = hantro_hevc_validate_sps(ctx, ctrls->sps); in hantro_hevc_dec_prepare_run()
A Dhantro_h264.c236 const struct v4l2_ctrl_h264_sps *sps = ctrls->sps; in prepare_table() local
279 !(sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD)) { in prepare_table()
456 ctrls->sps = in hantro_h264_dec_prepare_run()
458 if (WARN_ON(!ctrls->sps)) in hantro_h264_dec_prepare_run()
471 ctrls->sps, ctx->h264_dec.dpb); in hantro_h264_dec_prepare_run()
A Dhantro_drv.c258 const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps; in hantro_try_ctrl() local
260 if (sps->chroma_format_idc > 1) in hantro_try_ctrl()
263 if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8) in hantro_try_ctrl()
266 if (sps->bit_depth_luma_minus8 != 0) in hantro_try_ctrl()
270 const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps; in hantro_try_ctrl() local
272 if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2) in hantro_try_ctrl()
343 const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps; in hantro_hevc_s_ctrl() local
344 int bit_depth = sps->bit_depth_luma_minus8 + 8; in hantro_hevc_s_ctrl()
/drivers/media/platform/rockchip/rkvdec/
A Drkvdec-h264.c109 const struct v4l2_ctrl_h264_sps *sps; member
637 const struct v4l2_ctrl_h264_sps *sps = run->sps; in assemble_hw_pps() local
889 const struct v4l2_ctrl_h264_sps *sps = run->sps; in config_registers() local
917 if (sps->chroma_format_idc == 0) in config_registers()
919 else if (sps->chroma_format_idc == 1) in config_registers()
921 else if (sps->chroma_format_idc == 2) in config_registers()
1039 if (sps->chroma_format_idc == 2) in rkvdec_h264_get_image_fmt()
1044 if (sps->chroma_format_idc == 2) in rkvdec_h264_get_image_fmt()
1058 if (sps->chroma_format_idc > 2) in rkvdec_h264_validate_sps()
1061 if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8) in rkvdec_h264_validate_sps()
[all …]
/drivers/staging/media/sunxi/cedrus/
A Dcedrus_h265.c420 const struct v4l2_ctrl_hevc_sps *sps; in cedrus_h265_setup() local
439 sps = run->h265.sps; in cedrus_h265_setup()
457 sps->log2_min_luma_coding_block_size_minus3 + 3 + in cedrus_h265_setup()
458 sps->log2_diff_max_min_luma_coding_block_size; in cedrus_h265_setup()
580 sps->flags); in cedrus_h265_setup()
584 sps->flags); in cedrus_h265_setup()
588 sps->flags); in cedrus_h265_setup()
591 V4L2_HEVC_SPS_FLAG_AMP_ENABLED, sps->flags); in cedrus_h265_setup()
595 sps->flags); in cedrus_h265_setup()
605 V4L2_HEVC_SPS_FLAG_PCM_ENABLED, sps->flags); in cedrus_h265_setup()
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A Dcedrus_h264.c91 const struct v4l2_ctrl_h264_sps *sps = run->h264.sps; in cedrus_write_frame_list() local
143 const struct v4l2_ctrl_h264_sps *sps = run->h264.sps; in cedrus_write_frame_list() local
148 if (!(sps->flags & V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE)) in cedrus_write_frame_list()
150 if (!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY)) in cedrus_write_frame_list()
347 const struct v4l2_ctrl_h264_sps *sps = run->h264.sps; in cedrus_set_params() local
423 reg |= (sps->chroma_format_idc & 0x7) << 19; in cedrus_set_params()
424 reg |= (sps->pic_width_in_mbs_minus1 & 0xff) << 8; in cedrus_set_params()
425 reg |= sps->pic_height_in_map_units_minus1 & 0xff; in cedrus_set_params()
426 if (sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY) in cedrus_set_params()
430 if (sps->flags & V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE) in cedrus_set_params()
[all …]
A Dcedrus.c34 const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps; in cedrus_try_ctrl() local
36 if (sps->chroma_format_idc != 1) in cedrus_try_ctrl()
39 if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8) in cedrus_try_ctrl()
42 if (sps->bit_depth_luma_minus8 != 0) in cedrus_try_ctrl()
46 const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps; in cedrus_try_ctrl() local
51 if (sps->chroma_format_idc != 1) in cedrus_try_ctrl()
55 bit_depth = max(sps->bit_depth_luma_minus8, in cedrus_try_ctrl()
56 sps->bit_depth_chroma_minus8) + 8; in cedrus_try_ctrl()
A Dcedrus_dec.c61 run.h264.sps = cedrus_find_control_data(ctx, in cedrus_device_run()
68 run.h265.sps = cedrus_find_control_data(ctx, in cedrus_device_run()
/drivers/media/platform/mediatek/vcodec/decoder/vdec/
A Dvdec_h264_req_if.c20 struct mtk_h264_sps_param sps; member
99 const struct v4l2_ctrl_h264_sps *sps; in get_vdec_decode_parameters() local
116 sps = mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_SPS); in get_vdec_decode_parameters()
117 if (IS_ERR(sps)) in get_vdec_decode_parameters()
118 return PTR_ERR(sps); in get_vdec_decode_parameters()
131 mtk_vdec_h264_copy_sps_params(&slice_param->sps, sps); in get_vdec_decode_parameters()
140 v4l2_h264_init_reflist_builder(&reflist_builder, dec_params, sps, in get_vdec_decode_parameters()
A Dvdec_h264_req_multi_if.c43 struct mtk_h264_sps_param sps; member
123 struct v4l2_ctrl_h264_sps sps; member
274 const struct v4l2_ctrl_h264_sps *sps; in vdec_h264_slice_fill_decode_parameters() local
288 if (IS_ERR(sps)) in vdec_h264_slice_fill_decode_parameters()
289 return PTR_ERR(sps); in vdec_h264_slice_fill_decode_parameters()
301 mtk_vdec_h264_copy_sps_params(&slice_param->sps, sps); in vdec_h264_slice_fill_decode_parameters()
305 memcpy(&share_info->sps, sps, sizeof(*sps)); in vdec_h264_slice_fill_decode_parameters()
332 if (IS_ERR(sps)) in get_vdec_sig_decode_parameters()
333 return PTR_ERR(sps); in get_vdec_sig_decode_parameters()
346 mtk_vdec_h264_copy_sps_params(&slice_param->sps, sps); in get_vdec_sig_decode_parameters()
[all …]
A Dvdec_hevc_req_multi_if.c245 struct mtk_hevc_sps_param sps; member
336 struct v4l2_ctrl_hevc_sps sps; member
594 const struct v4l2_ctrl_hevc_sps *sps; in vdec_hevc_slice_fill_decode_parameters() local
607 sps = vdec_hevc_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_HEVC_SPS); in vdec_hevc_slice_fill_decode_parameters()
608 if (IS_ERR(sps)) in vdec_hevc_slice_fill_decode_parameters()
609 return PTR_ERR(sps); in vdec_hevc_slice_fill_decode_parameters()
615 vdec_hevc_copy_sps_params(&slice_param->sps, sps); in vdec_hevc_slice_fill_decode_parameters()
619 memcpy(&share_info->sps, sps, sizeof(*sps)); in vdec_hevc_slice_fill_decode_parameters()
/drivers/iio/imu/
A Dadis16400.c326 int sps, ret; in adis16400_get_freq() local
334 sps /= (t & ADIS16400_SMPL_PRD_DIV_MASK) + 1; in adis16400_get_freq()
336 return sps; in adis16400_get_freq()
382 if (sps / adis16400_3db_divisors[i] >= val) in __adis16400_set_filter()
477 int sps; in adis16400_write_raw() local
492 sps = st->variant->get_freq(st); in adis16400_write_raw()
493 if (sps < 0) in adis16400_write_raw()
494 return sps; in adis16400_write_raw()
501 sps = val * 1000 + val2 / 1000; in adis16400_write_raw()
503 if (sps <= 0) in adis16400_write_raw()
[all …]
/drivers/media/test-drivers/visl/
A Dvisl-dec.h32 const struct v4l2_ctrl_h264_sps *sps; member
41 const struct v4l2_ctrl_hevc_sps *sps; member
/drivers/media/platform/nvidia/tegra-vde/
A Dh264.c797 v4l2_h264_init_reflist_builder(&b, h->decode_params, h->sps, dpb); in tegra_vde_h264_setup_frames()
882 if (h->sps->profile_idc == 66) in tegra_vde_h264_setup_context()
885 if (h->sps->flags & V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE) in tegra_vde_h264_setup_context()
897 h264->level_idc = to_tegra_vde_h264_level_idc(h->sps->level_idc); in tegra_vde_h264_setup_context()
898 h264->log2_max_pic_order_cnt_lsb = h->sps->log2_max_pic_order_cnt_lsb_minus4 + 4; in tegra_vde_h264_setup_context()
899 h264->log2_max_frame_num = h->sps->log2_max_frame_num_minus4 + 4; in tegra_vde_h264_setup_context()
900 h264->pic_order_cnt_type = h->sps->pic_order_cnt_type; in tegra_vde_h264_setup_context()
901 h264->pic_width_in_mbs = h->sps->pic_width_in_mbs_minus1 + 1; in tegra_vde_h264_setup_context()
902 h264->pic_height_in_mbs = h->sps->pic_height_in_map_units_minus1 + 1; in tegra_vde_h264_setup_context()

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