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Searched refs:sr_enter_plus_exit_time_us (Results 1 – 25 of 32) sorted by relevance

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/drivers/gpu/drm/amd/display/dc/dml/dcn301/
A Ddcn301_fpu.c176 .sr_enter_plus_exit_time_us = 11.0,
225 .sr_enter_plus_exit_time_us = 7.14,
233 .sr_enter_plus_exit_time_us = 11.48,
241 .sr_enter_plus_exit_time_us = 11.48,
249 .sr_enter_plus_exit_time_us = 11.48,
262 .sr_enter_plus_exit_time_us = 16.5,
270 .sr_enter_plus_exit_time_us = 16.5,
278 .sr_enter_plus_exit_time_us = 16.5,
286 .sr_enter_plus_exit_time_us = 16.5,
309 dml->soc.sr_enter_plus_exit_time_us = table_entry->sr_enter_plus_exit_time_us; in calculate_wm_set_for_vlevel()
[all …]
/drivers/gpu/drm/amd/display/dc/dml/dcn30/
A Ddcn30_fpu.c140 .sr_enter_plus_exit_time_us = 20,
298 …xt->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].… in dcn30_fpu_update_soc_for_wm_a()
367 …xt->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].… in dcn30_fpu_calculate_wm_and_dlg()
436 …xt->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_C].… in dcn30_fpu_calculate_wm_and_dlg()
663 double sr_enter_plus_exit_time_us = base->ctx->dc->dml.soc.sr_enter_plus_exit_time_us; in dcn3_fpu_build_wm_range_table() local
672 …->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_enter_plus_exit_time_us = sr_enter_plus_exit_t… in dcn3_fpu_build_wm_range_table()
694 …->bw_params->wm_table.nv_entries[WM_C].dml_input.sr_enter_plus_exit_time_us = sr_enter_plus_exit_t… in dcn3_fpu_build_wm_range_table()
713 base->bw_params->wm_table.nv_entries[WM_D].dml_input.sr_enter_plus_exit_time_us = 4; in dcn3_fpu_build_wm_range_table()
733 dcn3_0_soc.sr_enter_plus_exit_time_us = bb_info.dram_sr_enter_exit_latency_100ns * 10; in patch_dcn30_soc_bounding_box()
/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddcn20_fpu.c294 .sr_enter_plus_exit_time_us = 10.9,
405 .sr_enter_plus_exit_time_us = 13.9,
516 .sr_enter_plus_exit_time_us = 4.4,
731 .sr_enter_plus_exit_time_us = 17.0,
775 .sr_enter_plus_exit_time_us = 8.14,
783 .sr_enter_plus_exit_time_us = 11.48,
812 .sr_enter_plus_exit_time_us = 6.38,
849 .sr_enter_plus_exit_time_us = 9.38,
960 .sr_enter_plus_exit_time_us = 8.38,
1994 bb->sr_enter_plus_exit_time_us = in dcn20_patch_bounding_box()
[all …]
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
A Ddcn316_clk_mgr.c277 .sr_enter_plus_exit_time_us = 7.14,
285 .sr_enter_plus_exit_time_us = 11.48,
293 .sr_enter_plus_exit_time_us = 11.48,
301 .sr_enter_plus_exit_time_us = 11.48,
314 .sr_enter_plus_exit_time_us = 14.5,
322 .sr_enter_plus_exit_time_us = 14.5,
330 .sr_enter_plus_exit_time_us = 14.5,
338 .sr_enter_plus_exit_time_us = 14.5,
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
A Ddcn315_clk_mgr.c312 .sr_enter_plus_exit_time_us = 14.5,
320 .sr_enter_plus_exit_time_us = 14.5,
328 .sr_enter_plus_exit_time_us = 14.5,
336 .sr_enter_plus_exit_time_us = 14.5,
349 .sr_enter_plus_exit_time_us = 14.5,
357 .sr_enter_plus_exit_time_us = 14.5,
365 .sr_enter_plus_exit_time_us = 14.5,
373 .sr_enter_plus_exit_time_us = 14.5,
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
A Ddcn31_clk_mgr.c351 .sr_enter_plus_exit_time_us = 11,
359 .sr_enter_plus_exit_time_us = 11,
367 .sr_enter_plus_exit_time_us = 11,
375 .sr_enter_plus_exit_time_us = 11,
388 .sr_enter_plus_exit_time_us = 14.5,
396 .sr_enter_plus_exit_time_us = 14.5,
404 .sr_enter_plus_exit_time_us = 14.5,
412 .sr_enter_plus_exit_time_us = 14.5,
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
A Ddcn314_clk_mgr.c410 .sr_enter_plus_exit_time_us = 14.5,
418 .sr_enter_plus_exit_time_us = 14.5,
426 .sr_enter_plus_exit_time_us = 14.5,
434 .sr_enter_plus_exit_time_us = 14.5,
447 .sr_enter_plus_exit_time_us = 32.0,
455 .sr_enter_plus_exit_time_us = 32.0,
463 .sr_enter_plus_exit_time_us = 32.0,
471 .sr_enter_plus_exit_time_us = 32.0,
/drivers/gpu/drm/amd/display/dc/dml/dcn31/
A Ddcn31_fpu.c171 .sr_enter_plus_exit_time_us = 11.0,
267 .sr_enter_plus_exit_time_us = 11.0,
415 .sr_enter_plus_exit_time_us = 11.0,
460 …context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A… in dcn31_update_soc_for_wm_a()
475 context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = in dcn315_update_soc_for_wm_a()
476 dc->clk_mgr->bw_params->wm_table.entries[WM_A].sr_enter_plus_exit_time_us; in dcn315_update_soc_for_wm_a()
/drivers/gpu/drm/amd/display/dc/inc/hw/
A Dclk_mgr.h153 double sr_enter_plus_exit_time_us; member
171 double sr_enter_plus_exit_time_us; member
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
A Ddcn35_clk_mgr.c653 .sr_enter_plus_exit_time_us = 30.0,
661 .sr_enter_plus_exit_time_us = 30.0,
669 .sr_enter_plus_exit_time_us = 30.0,
677 .sr_enter_plus_exit_time_us = 30.0,
690 .sr_enter_plus_exit_time_us = 30.0,
698 .sr_enter_plus_exit_time_us = 30.0,
706 .sr_enter_plus_exit_time_us = 30.0,
714 .sr_enter_plus_exit_time_us = 30.0,
/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_socbb.h40 uint32_t sr_enter_plus_exit_time_us; member
/drivers/gpu/drm/amd/display/dc/dml/dcn302/
A Ddcn302_fpu.c128 .sr_enter_plus_exit_time_us = 31,
359 dcn3_02_soc.sr_enter_plus_exit_time_us = in dcn302_fpu_init_soc_bounding_box()
/drivers/gpu/drm/amd/display/dc/dml/dcn32/
A Ddcn32_fpu.c145 .sr_enter_plus_exit_time_us = 49.94,
192 double sr_enter_plus_exit_time_us = clk_mgr->base.ctx->dc->dml.soc.sr_enter_plus_exit_time_us; in dcn32_build_wm_range_table_fpu() local
215 …e.bw_params->wm_table.nv_entries[WM_A].dml_input.sr_enter_plus_exit_time_us = sr_enter_plus_exit_t… in dcn32_build_wm_range_table_fpu()
227 …e.bw_params->wm_table.nv_entries[WM_B].dml_input.sr_enter_plus_exit_time_us = sr_enter_plus_exit_t… in dcn32_build_wm_range_table_fpu()
240 …e.bw_params->wm_table.nv_entries[WM_C].dml_input.sr_enter_plus_exit_time_us = sr_enter_plus_exit_t… in dcn32_build_wm_range_table_fpu()
261 …e.bw_params->wm_table.nv_entries[WM_D].dml_input.sr_enter_plus_exit_time_us = sr_enter_plus_exit_t… in dcn32_build_wm_range_table_fpu()
2442 …xt->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].… in dcn32_calculate_wm_and_dlg_fpu()
2537 …xt->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_C].… in dcn32_calculate_wm_and_dlg_fpu()
2577 …xt->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].… in dcn32_calculate_wm_and_dlg_fpu()
3069 dcn3_2_soc.sr_enter_plus_exit_time_us = in dcn32_update_bw_bounding_box_fpu()
[all …]
/drivers/gpu/drm/amd/display/dc/dml/dcn10/
A Ddcn10_fpu.c107 .sr_enter_plus_exit_time_us = 11.0,
/drivers/gpu/drm/amd/display/dc/dml/dcn351/
A Ddcn351_fpu.c206 .sr_enter_plus_exit_time_us = 30.0,
372 dcn3_51_soc.sr_enter_plus_exit_time_us = in dcn351_update_bw_bounding_box_fpu()
428 …dml2_options.bbox_overrides.sr_enter_plus_exit_latency_us = dcn3_51_soc.sr_enter_plus_exit_time_us; in dcn351_update_bw_bounding_box_fpu()
/drivers/gpu/drm/amd/display/dc/dml/dcn35/
A Ddcn35_fpu.c168 .sr_enter_plus_exit_time_us = 30.0,
338 dcn3_5_soc.sr_enter_plus_exit_time_us = in dcn35_update_bw_bounding_box_fpu()
395 …>dml2_options.bbox_overrides.sr_enter_plus_exit_latency_us = dcn3_5_soc.sr_enter_plus_exit_time_us; in dcn35_update_bw_bounding_box_fpu()
/drivers/gpu/drm/amd/display/dc/dml/dcn303/
A Ddcn303_fpu.c127 .sr_enter_plus_exit_time_us = 40,
376 dcn3_03_soc.sr_enter_plus_exit_time_us = bb_info.dram_sr_enter_exit_latency_100ns * 10; in dcn303_fpu_init_soc_bounding_box()
/drivers/gpu/drm/amd/display/dc/dml/dcn321/
A Ddcn321_fpu.c124 .sr_enter_plus_exit_time_us = 24.36,
623 if ((int)(dcn3_21_soc.sr_enter_plus_exit_time_us * 1000) in dcn321_update_bw_bounding_box_fpu()
627 dcn3_21_soc.sr_enter_plus_exit_time_us = in dcn321_update_bw_bounding_box_fpu()
673 dcn3_21_soc.sr_enter_plus_exit_time_us = in dcn321_update_bw_bounding_box_fpu()
/drivers/gpu/drm/amd/display/dc/dml2/
A Ddml2_translation_helper.c382 p->in_states->state_array[0].sr_enter_plus_exit_time_us = 49.94; in dml2_init_soc_states()
418 p->in_states->state_array[0].sr_enter_plus_exit_time_us = 24.36; in dml2_init_soc_states()
453 p->in_states->state_array[0].sr_enter_plus_exit_time_us = 20.20; //49.94; in dml2_init_soc_states()
472 p->in_states->state_array[i].sr_enter_plus_exit_time_us = in dml2_init_soc_states()
730 out->state_array[i].sr_enter_plus_exit_time_us = dc->dml.soc.sr_enter_plus_exit_time_us; in dml2_translate_soc_states()
A Ddisplay_mode_util.c641 dml_print("DML: state_bbox: sr_enter_plus_exit_time_us = %f\n", state->sr_enter_plus_exit_time_us); in dml_print_soc_state_bounding_box()
/drivers/gpu/drm/amd/display/dc/dml/
A Ddisplay_mode_structs.h189 double sr_enter_plus_exit_time_us; member
A Ddml1_display_rq_dlg_calc.c1304 line_wait = dml_max(mode_lib->soc.sr_enter_plus_exit_time_us, line_wait); in dml1_rq_dlg_get_dlg_params()
1319 (double) mode_lib->soc.sr_enter_plus_exit_time_us); in dml1_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/display/dc/dml/dcn314/
A Ddcn314_fpu.c152 .sr_enter_plus_exit_time_us = 18.5,
/drivers/gpu/drm/amd/display/dc/dml/calcs/
A Ddcn_calcs.c1078 context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = v->sr_enter_plus_exit_time; in dcn_validate_bandwidth()
1294 context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = in dcn_validate_bandwidth()
1569 dc->dml.soc.sr_enter_plus_exit_time_us = dc->dcn_soc->sr_enter_plus_exit_time; in dcn_bw_sync_calcs_and_dml()
/drivers/gpu/drm/amd/display/dc/resource/dcn201/
A Ddcn201_resource.c199 .sr_enter_plus_exit_time_us = 11.0,

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