Home
last modified time | relevance | path

Searched refs:src_format (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/imx/dcss/
A Ddcss-scaler.c477 u32 src_format, u32 dst_format, in dcss_scaler_fractions_set() argument
493 if (src_format == BUF_FMT_YUV420) { in dcss_scaler_fractions_set()
529 if (src_format == BUF_FMT_YUV420) { in dcss_scaler_fractions_set()
532 } else if (src_format == BUF_FMT_YUV422) { in dcss_scaler_fractions_set()
645 enum buffer_format src_format, in dcss_scaler_yuv_coef_set() argument
654 src_format == BUF_FMT_ARGB8888_YUV444); in dcss_scaler_yuv_coef_set()
673 if (src_format != BUF_FMT_ARGB8888_YUV444) in dcss_scaler_yuv_coef_set()
675 if (src_format == BUF_FMT_YUV420) in dcss_scaler_yuv_coef_set()
787 src_format = BUF_FMT_YUV420; in dcss_scaler_setup()
792 src_format = BUF_FMT_YUV422; in dcss_scaler_setup()
[all …]
/drivers/gpu/drm/msm/disp/dpu1/
A Ddpu_hw_sspp.c215 u32 chroma_samp, unpack, src_format; in dpu_hw_sspp_setup_format() local
252 src_format = (chroma_samp << 23) | (fmt->fetch_type << 19) | in dpu_hw_sspp_setup_format()
257 src_format |= BIT(11); /* ROT90 */ in dpu_hw_sspp_setup_format()
260 src_format |= BIT(8); /* SRCC3_EN */ in dpu_hw_sspp_setup_format()
263 src_format |= BIT(22); in dpu_hw_sspp_setup_format()
267 src_format |= ((fmt->unpack_count - 1) << 12) | in dpu_hw_sspp_setup_format()
275 src_format |= (fmt->fetch_mode & 3) << 30; /*FRAME_FORMAT */ in dpu_hw_sspp_setup_format()
309 src_format |= BIT(15); in dpu_hw_sspp_setup_format()
312 src_format |= BIT(14); in dpu_hw_sspp_setup_format()
323 DPU_REG_WRITE(c, format_off, src_format); in dpu_hw_sspp_setup_format()
/drivers/media/platform/renesas/rzg2l-cru/
A Drzg2l-ip.c208 struct v4l2_mbus_framefmt *src_format; in rzg2l_cru_ip_set_format() local
211 src_format = v4l2_subdev_state_get_format(state, RZG2L_CRU_IP_SOURCE); in rzg2l_cru_ip_set_format()
213 fmt->format = *src_format; in rzg2l_cru_ip_set_format()
237 *src_format = *sink_format; in rzg2l_cru_ip_set_format()
A Drzg2l-csi2.c634 struct v4l2_mbus_framefmt *src_format; in rzg2l_csi2_set_format() local
637 src_format = v4l2_subdev_state_get_format(state, RZG2L_CSI2_SOURCE); in rzg2l_csi2_set_format()
639 fmt->format = *src_format; in rzg2l_csi2_set_format()
662 *src_format = *sink_format; in rzg2l_csi2_set_format()
/drivers/media/platform/cadence/
A Dcdns-csi2tx.c207 const struct v4l2_mbus_framefmt *src_format = &fmt->format; in csi2tx_set_pad_format() local
215 src_format = &fmt_default; in csi2tx_set_pad_format()
221 *dst_format = *src_format; in csi2tx_set_pad_format()
/drivers/media/platform/chips-media/wave5/
A Dwave5-hw.c2217 switch (p_open_param->src_format) { in wave5_vpu_encode()
2228 src_stride_c = (p_open_param->src_format == FORMAT_422) ? src_stride_c * 2 : in wave5_vpu_encode()
2241 src_stride_c = (p_open_param->src_format == in wave5_vpu_encode()
2254 src_stride_c = (p_open_param->src_format == in wave5_vpu_encode()
2267 src_stride_c = (p_open_param->src_format == in wave5_vpu_encode()
2280 src_stride_c = (p_open_param->src_format == in wave5_vpu_encode()
A Dwave5-vpuapi.h584 enum frame_buffer_format src_format; member
A Dwave5-vpu-enc.c1153 open_param->src_format = FORMAT_422; in wave5_set_enc_openparam()
1155 open_param->src_format = FORMAT_420; in wave5_set_enc_openparam()

Completed in 40 milliseconds