| /drivers/mmc/host/ |
| A D | meson-mx-sdhc-clkc.c | 16 struct clk_mux src_sel; member
104 clkc_data->src_sel.reg = base + MESON_SDHC_CLKC; in meson_mx_sdhc_register_clkc()
105 clkc_data->src_sel.mask = 0x3; in meson_mx_sdhc_register_clkc()
106 clkc_data->src_sel.shift = 16; in meson_mx_sdhc_register_clkc()
110 &clkc_data->src_sel.hw); in meson_mx_sdhc_register_clkc()
118 div_parent.hw = &clkc_data->src_sel.hw; in meson_mx_sdhc_register_clkc()
|
| /drivers/clk/qcom/ |
| A D | clk-rcg.h | 74 struct src_sel { struct
98 struct src_sel s; argument
137 struct src_sel s[2];
|
| A D | clk-rcg.c | 18 static u32 ns_to_src(struct src_sel *s, u32 ns) in ns_to_src()
25 static u32 src_to_ns(struct src_sel *s, u8 src, u32 ns) in src_to_ns()
71 struct src_sel *s; in clk_dyn_rcg_get_parent()
204 struct src_sel *s; in configure_bank()
450 struct src_sel *s; in clk_dyn_rcg_determine_rate()
|
| /drivers/gpu/drm/msm/disp/dpu1/ |
| A D | dpu_hw_lm.c | 231 u32 src_sel[PIPES_PER_STAGE]; in _set_staged_sspp() local
241 src_sel[i] = LM_BG_SRC_SEL_V12_RESET_VALUE; in _set_staged_sspp()
269 src_sel[i] = (((pipe_type & 0x3) << 6) | ((rec_id & 0x3) << 4) | (pipe_id & 0xf)); in _set_staged_sspp()
275 *value |= src_sel[i] << (i * 8); in _set_staged_sspp()
|
| /drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_audio.c | 1072 uint32_t src_sel; in dce_aud_wall_dto_setup() local
1101 src_sel = pll_info->dto_source - DTO_SOURCE_ID0; in dce_aud_wall_dto_setup()
1103 DCCG_AUDIO_DTO0_SOURCE_SEL, src_sel, in dce_aud_wall_dto_setup()
1164 uint32_t src_sel; in dce60_aud_wall_dto_setup() local
1193 src_sel = pll_info->dto_source - DTO_SOURCE_ID0; in dce60_aud_wall_dto_setup()
1195 DCCG_AUDIO_DTO0_SOURCE_SEL, src_sel, in dce60_aud_wall_dto_setup()
|
| /drivers/gpu/drm/amd/display/dc/dccg/dcn35/ |
| A D | dcn35_dccg.c | 557 uint32_t src_sel; in dccg35_is_symclk32_se_src_functional_le_new() local
561 REG_GET_2(SYMCLK32_SE_CNTL, SYMCLK32_SE3_SRC_SEL, &src_sel, SYMCLK32_SE3_EN, &en); in dccg35_is_symclk32_se_src_functional_le_new()
563 if (en == 1 && src_sel == symclk_32_le_inst) in dccg35_is_symclk32_se_src_functional_le_new()
782 uint32_t src_sel = 0; in dccg35_is_symclk_fe_src_functional_be() local
788 REG_GET_2(SYMCLKA_CLOCK_ENABLE, SYMCLKA_FE_SRC_SEL, &src_sel, SYMCLKA_FE_EN, &en); in dccg35_is_symclk_fe_src_functional_be()
791 REG_GET_2(SYMCLKB_CLOCK_ENABLE, SYMCLKB_FE_SRC_SEL, &src_sel, SYMCLKB_FE_EN, &en); in dccg35_is_symclk_fe_src_functional_be()
794 REG_GET_2(SYMCLKC_CLOCK_ENABLE, SYMCLKC_FE_SRC_SEL, &src_sel, SYMCLKC_FE_EN, &en); in dccg35_is_symclk_fe_src_functional_be()
797 REG_GET_2(SYMCLKD_CLOCK_ENABLE, SYMCLKD_FE_SRC_SEL, &src_sel, SYMCLKD_FE_EN, &en); in dccg35_is_symclk_fe_src_functional_be()
800 REG_GET_2(SYMCLKE_CLOCK_ENABLE, SYMCLKE_FE_SRC_SEL, &src_sel, SYMCLKE_FE_EN, &en); in dccg35_is_symclk_fe_src_functional_be()
804 if (en == 1 && src_sel == symclk_be_inst) in dccg35_is_symclk_fe_src_functional_be()
|
| /drivers/usb/typec/ |
| A D | rt1719.c | 435 int snk_sel, src_sel = -1; in rt1719_usbpd_request_voltage() local
476 src_sel = i; in rt1719_usbpd_request_voltage()
481 if (src_sel == -1) in rt1719_usbpd_request_voltage()
486 RT1719_EVALMODE_MASK | (src_sel + 1)); in rt1719_usbpd_request_voltage()
|
| /drivers/net/ethernet/intel/ice/ |
| A D | ice_common.h | 293 u8 src_sel, u32 freq, s32 phase_delay);
296 u8 *src_sel, u32 *freq, u32 *src_freq);
|
| A D | ice_common.c | 5347 u8 src_sel, u32 freq, s32 phase_delay) in ice_aq_set_output_pin_cfg() argument
5356 cmd->src_sel = src_sel; in ice_aq_set_output_pin_cfg()
5377 u8 *src_sel, u32 *freq, u32 *src_freq) in ice_aq_get_output_pin_cfg() argument
5391 if (src_sel) in ice_aq_get_output_pin_cfg()
5392 *src_sel = cmd->src_sel; in ice_aq_get_output_pin_cfg()
|
| A D | ice_adminq_cmd.h | 2259 u8 src_sel; member
2275 u8 src_sel; member
|
| /drivers/net/wireless/realtek/rtw89/ |
| A D | rtw8851b.c | 814 u8 src_sel) in rtw8851b_set_bb_gpio() argument
832 rtw89_phy_write32_mask(rtwdev, addr, mask, src_sel); in rtw8851b_set_bb_gpio()
|