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Searched refs:src_w (Results 1 – 25 of 93) sorted by relevance

1234

/drivers/media/platform/ti/vpe/
A Dsc.c61 void sc_set_hs_coeffs(struct sc_data *sc, void *addr, unsigned int src_w, in sc_set_hs_coeffs() argument
70 if (dst_w > src_w) { in sc_set_hs_coeffs()
73 if ((dst_w << 1) < src_w) in sc_set_hs_coeffs()
75 if ((dst_w << 1) < src_w) in sc_set_hs_coeffs()
78 if (dst_w == src_w) { in sc_set_hs_coeffs()
81 sixteenths = (dst_w << 4) / src_w; in sc_set_hs_coeffs()
148 u32 *sc_reg17, unsigned int src_w, unsigned int src_h, in sc_config_scaler() argument
178 if (src_w == dst_w && src_h == dst_h) { in sc_config_scaler()
190 dcm_x = src_w / dst_w; in sc_config_scaler()
207 src_w, dst_w, dcm_shift == 2 ? "4x" : in sc_config_scaler()
[all …]
/drivers/media/pci/ivtv/
A Divtv-yuv.c257 if (f->dst_w >= f->src_w) in ivtv_yuv_handle_horizontal()
263 if (f->dst_w < f->src_w) in ivtv_yuv_handle_horizontal()
286 if (f->dst_w > f->src_w) in ivtv_yuv_handle_horizontal()
287 reg_2870_base = ((f->dst_w - f->src_w)<<16) / (f->src_w <<14); in ivtv_yuv_handle_horizontal()
305 reg_2870 += (5 - (((f->src_w + f->src_w / 2) - 1) / f->dst_w)) << 16; in ivtv_yuv_handle_horizontal()
674 f->src_w = (f->src_w - osd_crop) & ~3; in ivtv_yuv_window_setup()
675 f->dst_w = f->src_w / 4; in ivtv_yuv_window_setup()
748 f->src_w += f->src_x & 1; in ivtv_yuv_window_setup()
751 f->src_w &= ~1; in ivtv_yuv_window_setup()
767 f->src_w &= ~3; in ivtv_yuv_window_setup()
[all …]
/drivers/gpu/drm/msm/disp/mdp4/
A Dmdp4_plane.c48 uint32_t src_w, uint32_t src_h);
122 new_state->src_w, new_state->src_h); in mdp4_plane_atomic_update()
193 uint32_t src_w, uint32_t src_h) in mdp4_plane_mode_set() argument
215 src_w = src_w >> 16; in mdp4_plane_mode_set()
224 if (src_w > (crtc_w * DOWN_SCALE_MAX)) { in mdp4_plane_mode_set()
234 if (crtc_w > (src_w * UP_SCALE_MAX)) { in mdp4_plane_mode_set()
244 if (src_w != crtc_w) { in mdp4_plane_mode_set()
249 if (crtc_w > src_w) in mdp4_plane_mode_set()
251 else if (crtc_w <= (src_w / 4)) in mdp4_plane_mode_set()
256 src_w, crtc_w); in mdp4_plane_mode_set()
[all …]
/drivers/gpu/drm/armada/
A Darmada_trace.h34 uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h),
35 TP_ARGS(plane, crtc, fb, crtc_x, crtc_y, crtc_w, crtc_h, src_x, src_y, src_w, src_h),
46 __field(u32, src_w)
59 __entry->src_w = src_w;
67 __entry->src_w >> 16, __entry->src_h >> 16)
/drivers/gpu/drm/msm/disp/mdp5/
A Dmdp5_plane.c186 if (state->src_w > max_width) { in mdp5_plane_atomic_check_with_state()
261 state->src_w >> 16, false); in mdp5_plane_atomic_check_with_state()
390 plane->state->src_w != new_plane_state->src_w || in mdp5_plane_atomic_async_check()
680 uint32_t roi_w = src_w; in mdp5_write_pixel_ext()
753 u32 src_w, u32 src_h) in mdp5_hwpipe_mode_set() argument
810 src_w, pe->left, pe->right, in mdp5_hwpipe_mode_set()
860 uint32_t src_w, src_h; in mdp5_plane_mode_set() local
875 src_w = drm_rect_width(src); in mdp5_plane_mode_set()
886 src_w = src_w >> 16; in mdp5_plane_mode_set()
904 src_w /= 2; in mdp5_plane_mode_set()
[all …]
/drivers/gpu/drm/imx/dcss/
A Ddcss-plane.c128 static bool dcss_plane_is_source_size_allowed(u16 src_w, u16 src_h, u32 pix_fmt) in dcss_plane_is_source_size_allowed() argument
130 if (src_w < 64 && in dcss_plane_is_source_size_allowed()
133 else if (src_w < 32 && in dcss_plane_is_source_size_allowed()
138 return src_w >= 16 && src_h >= 8; in dcss_plane_is_source_size_allowed()
168 if (!dcss_plane_is_source_size_allowed(new_plane_state->src_w >> 16, in dcss_plane_atomic_check()
260 state->src_w != old_state->src_w || in dcss_plane_needs_setup()
280 u32 src_w, src_h, dst_w, dst_h; in dcss_plane_atomic_update() local
303 src_w = drm_rect_width(&src) >> 16; in dcss_plane_atomic_update()
316 dcss_dpr_set_res(dcss->dpr, dcss_plane->ch_num, src_w, src_h); in dcss_plane_atomic_update()
330 is_rotation_90_or_270 ? src_h : src_w, in dcss_plane_atomic_update()
[all …]
/drivers/gpu/drm/sti/
A Dsti_hqvdp.c482 int src_w, src_h, dst_w, dst_h; in hqvdp_dbg_dump_cmd() local
536 if (dst_w > src_w) in hqvdp_dbg_dump_cmd()
736 int src_w, int src_h, in sti_hqvdp_check_hw_scaling() argument
1033 int src_x, src_y, src_w, src_h; in sti_hqvdp_atomic_check() local
1051 src_w = new_plane_state->src_w >> 16; in sti_hqvdp_atomic_check()
1055 src_w, src_h, in sti_hqvdp_atomic_check()
1073 if ((src_w > MAX_WIDTH) || (src_w < MIN_WIDTH) || in sti_hqvdp_atomic_check()
1078 src_w, src_h, in sti_hqvdp_atomic_check()
1129 int src_x, src_y, src_w, src_h; in sti_hqvdp_atomic_update() local
1145 (oldstate->src_w == newstate->src_w) && in sti_hqvdp_atomic_update()
[all …]
A Dsti_cursor.c196 int src_w, src_h; in sti_cursor_atomic_check() local
214 src_w = new_plane_state->src_w >> 16; in sti_cursor_atomic_check()
217 if (src_w < STI_CURS_MIN_SIZE || in sti_cursor_atomic_check()
219 src_w > STI_CURS_MAX_SIZE || in sti_cursor_atomic_check()
222 src_w, src_h); in sti_cursor_atomic_check()
228 (cursor->width != src_w) || in sti_cursor_atomic_check()
230 cursor->width = src_w; in sti_cursor_atomic_check()
A Dsti_gdp.c632 int src_x, src_y, src_w, src_h; in sti_gdp_atomic_check() local
652 src_w = clamp_val(new_plane_state->src_w >> 16, 0, in sti_gdp_atomic_check()
701 src_w, src_h, src_x, src_y); in sti_gdp_atomic_check()
719 int src_x, src_y, src_w, src_h; in sti_gdp_atomic_update() local
740 (oldstate->src_w == newstate->src_w) && in sti_gdp_atomic_update()
766 src_w = clamp_val(newstate->src_w >> 16, 0, GAM_GDP_SIZE_MAX_WIDTH); in sti_gdp_atomic_update()
797 dst_w = sti_gdp_get_dst(gdp->dev, dst_w, src_w); in sti_gdp_atomic_update()
807 src_w = dst_w; in sti_gdp_atomic_update()
809 top_field->gam_gdp_size = src_h << 16 | src_w; in sti_gdp_atomic_update()
/drivers/media/platform/rockchip/rga/
A Drga-hw.c158 unsigned int src_h, src_w, dst_h, dst_w; in rga_cmd_set_trans_info() local
169 src_w = ctx->in.crop.width; in rga_cmd_set_trans_info()
248 if (abs(src_w - dst_h) < 16) in rga_cmd_set_trans_info()
249 src_w -= 16; in rga_cmd_set_trans_info()
259 if (src_w == scale_dst_w) { in rga_cmd_set_trans_info()
262 } else if (src_w > scale_dst_w) { in rga_cmd_set_trans_info()
265 rga_get_scaling(src_w, scale_dst_w) + 1; in rga_cmd_set_trans_info()
293 src_act_info.data.act_width = src_w - 1; in rga_cmd_set_trans_info()
318 unsigned int src_h, src_w, src_x, src_y; in rga_cmd_set_src_info() local
321 src_w = ctx->in.crop.width; in rga_cmd_set_src_info()
[all …]
/drivers/gpu/drm/nouveau/dispnv04/
A Doverlay.c94 uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, in verify_scaling() argument
97 if (crtc_w < (src_w >> shift) || crtc_h < (src_h >> shift)) { in verify_scaling()
99 src_w, src_h, crtc_w, crtc_h); in verify_scaling()
117 uint32_t src_w, uint32_t src_h, in nv10_update_plane() argument
137 src_w >>= 16; in nv10_update_plane()
140 ret = verify_scaling(fb, shift, 0, 0, src_w, src_h, crtc_w, crtc_h); in nv10_update_plane()
156 nvif_wr32(dev, NV_PVIDEO_SIZE_IN(flip), src_h << 16 | src_w); in nv10_update_plane()
158 nvif_wr32(dev, NV_PVIDEO_DS_DX(flip), (src_w << 20) / crtc_w); in nv10_update_plane()
368 uint32_t src_w, uint32_t src_h, in nv04_update_plane() argument
383 src_w >>= 16; in nv04_update_plane()
[all …]
/drivers/gpu/drm/sun4i/
A Dsun8i_vi_layer.c57 u32 src_w, src_h, dst_w, dst_h; in sun8i_vi_layer_update_coord() local
73 src_w = drm_rect_width(&state->src) >> 16; in sun8i_vi_layer_update_coord()
87 src_w = (src_w + remainder) & ~mask; in sun8i_vi_layer_update_coord()
100 insize = SUN8I_MIXER_SIZE(src_w, src_h); in sun8i_vi_layer_update_coord()
107 DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h); in sun8i_vi_layer_update_coord()
134 do_div(ability, mode->vdisplay * fps * max(src_w, dst_w)); in sun8i_vi_layer_update_coord()
148 if (src_w > scanline) { in sun8i_vi_layer_update_coord()
150 hm = src_w; in sun8i_vi_layer_update_coord()
152 src_w = hn; in sun8i_vi_layer_update_coord()
155 hscale = (src_w << 16) / dst_w; in sun8i_vi_layer_update_coord()
[all …]
A Dsun8i_ui_layer.c54 u32 src_w, src_h, dst_w, dst_h; in sun8i_ui_layer_update_coord() local
67 src_w = drm_rect_width(&state->src) >> 16; in sun8i_ui_layer_update_coord()
75 insize = SUN8I_MIXER_SIZE(src_w, src_h); in sun8i_ui_layer_update_coord()
81 DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h); in sun8i_ui_layer_update_coord()
94 hscale = state->src_w / state->crtc_w; in sun8i_ui_layer_update_coord()
98 sun8i_vi_scaler_setup(mixer, channel, src_w, src_h, in sun8i_ui_layer_update_coord()
104 sun8i_ui_scaler_setup(mixer, channel, src_w, src_h, in sun8i_ui_layer_update_coord()
/drivers/gpu/drm/imx/dc/
A Ddc-plane.c55 int src_w = drm_rect_width(&state->src) >> 16; in dc_plane_check_max_source_resolution() local
57 if (src_w > DC_PLANE_MAX_PIX_CNT || src_h > DC_PLANE_MAX_PIX_CNT) { in dc_plane_check_max_source_resolution()
140 int src_w, src_h; in dc_plane_atomic_update() local
146 src_w = drm_rect_width(&new_state->src) >> 16; in dc_plane_atomic_update()
156 fu_ops->set_src_buf_dimensions(fu, DC_FETCHUNIT_FRAC0, src_w, src_h); in dc_plane_atomic_update()
158 fu_ops->set_framedimensions(fu, src_w, src_h); in dc_plane_atomic_update()
/drivers/gpu/drm/arm/
A Dmalidp_planes.c268 u32 src_w, src_h; in malidp_se_check_scaling() local
282 src_w = state->src_h >> 16; in malidp_se_check_scaling()
283 src_h = state->src_w >> 16; in malidp_se_check_scaling()
285 src_w = state->src_w >> 16; in malidp_se_check_scaling()
289 if ((state->crtc_w == src_w) && (state->crtc_h == src_h)) { in malidp_se_check_scaling()
742 u32 src_w, src_h, val = 0, src_x, src_y; in malidp_de_set_plane_afbc() local
757 src_w = plane->state->src_w >> 16; in malidp_de_set_plane_afbc()
792 u32 src_w, src_h, dest_w, dest_h, val; in malidp_de_plane_update() local
803 src_w = fb->width; in malidp_de_plane_update()
807 src_w = new_state->src_w >> 16; in malidp_de_plane_update()
[all …]
/drivers/gpu/drm/atmel-hlcdc/
A Datmel_hlcdc_plane.c54 uint32_t src_w; member
311 state->crtc_w < state->src_w ? in atmel_hlcdc_plane_setup_scaler()
324 xfactor = (1024 * state->src_w) / state->crtc_w; in atmel_hlcdc_plane_setup_scaler()
398 ATMEL_HLCDC_LAYER_SIZE(state->src_w, in atmel_hlcdc_plane_update_pos_and_size()
605 pixels = (plane_state->src_w * plane_state->src_h) - in atmel_hlcdc_plane_prepare_ahb_routing()
728 hstate->src_w = drm_rect_width(&s->src); in atmel_hlcdc_plane_atomic_check()
741 hstate->src_w >>= 16; in atmel_hlcdc_plane_atomic_check()
761 offset += ((hstate->src_x + hstate->src_w - 1) / in atmel_hlcdc_plane_atomic_check()
771 offset += ((hstate->src_x + hstate->src_w - 1) / in atmel_hlcdc_plane_atomic_check()
790 ((hstate->src_w / xdiv) * in atmel_hlcdc_plane_atomic_check()
[all …]
/drivers/gpu/drm/arm/display/komeda/
A Dkomeda_framebuffer.c210 u32 src_x, u32 src_y, u32 src_w, u32 src_h) in komeda_fb_check_src_coords() argument
217 if ((src_x + src_w > fb->width) || (src_y + src_h > fb->height)) { in komeda_fb_check_src_coords()
222 if ((src_x % info->hsub) || (src_w % info->hsub) || in komeda_fb_check_src_coords()
225 src_x, src_y, src_w, src_h, info->format); in komeda_fb_check_src_coords()
229 if ((src_x % block_w) || (src_w % block_w) || in komeda_fb_check_src_coords()
232 src_x, src_y, src_w, src_h, info->format); in komeda_fb_check_src_coords()
/drivers/gpu/drm/
A Ddrm_plane.c953 uint32_t src_w, uint32_t src_h) in __setplane_check() argument
1047 src_x, src_y, src_w, src_h); in __setplane_internal()
1054 src_x, src_y, src_w, src_h, ctx); in __setplane_internal()
1077 uint32_t src_w, uint32_t src_h, in __setplane_atomic() argument
1097 src_x, src_y, src_w, src_h); in __setplane_atomic()
1113 uint32_t src_w, uint32_t src_h) in setplane_internal() argument
1204 uint32_t src_w = 0, src_h = 0; in drm_mode_cursor_universal() local
1251 src_w = fb->width << 16; in drm_mode_cursor_universal()
1258 0, 0, src_w, src_h, ctx); in drm_mode_cursor_universal()
1262 0, 0, src_w, src_h, ctx); in drm_mode_cursor_universal()
[all …]
A Ddrm_plane_helper.c113 .src_w = drm_rect_width(src), in drm_plane_helper_check_update()
170 uint32_t src_w, uint32_t src_h, in drm_plane_helper_update_primary() argument
183 .x2 = src_x + src_w, in drm_plane_helper_update_primary()
/drivers/gpu/drm/i915/display/
A Dintel_sprite.c573 unsigned int src_w, dst_w, pixel_rate; in ivb_sprite_min_cdclk() local
588 if (src_w != dst_w) in ivb_sprite_min_cdclk()
594 dst_w = min(src_w, dst_w); in ivb_sprite_min_cdclk()
809 if (crtc_w != src_w || crtc_h != src_h) in ivb_sprite_update_noarm()
811 SPRITE_SRC_WIDTH(src_w - 1) | in ivb_sprite_update_noarm()
1161 if (crtc_w != src_w || crtc_h != src_h) in g4x_sprite_update_noarm()
1163 DVS_SRC_WIDTH(src_w - 1) | in g4x_sprite_update_noarm()
1292 int src_x, src_w, src_h, crtc_w, crtc_h; in g4x_sprite_check_scaling() local
1304 src_w = drm_rect_width(src) >> 16; in g4x_sprite_check_scaling()
1307 if (src_w == crtc_w && src_h == crtc_h) in g4x_sprite_check_scaling()
[all …]
/drivers/gpu/drm/vc4/
A Dvc4_plane.c537 vc4_state->src_w[1] = vc4_state->src_w[0] / h_subsample; in vc4_plane_setup_clipping_and_scaling()
541 vc4_get_scaling_mode(vc4_state->src_w[1], in vc4_plane_setup_clipping_and_scaling()
683 pix_per_line = vc4_state->src_w[0] >> 16; in __vc4_lbm_size()
759 width = state->src_w >> 16; in vc4_lbm_channel_size()
761 width = min(state->src_w >> 16, state->crtc_w); in vc4_lbm_channel_size()
1236 if (!vc4_state->src_w[0] || !vc4_state->src_h[0] || in vc4_plane_mode_set()
1243 width = vc4_state->src_w[0] >> 16; in vc4_plane_mode_set()
1775 width = vc4_state->src_w[0] >> 16; in vc6_plane_mode_set()
2284 plane->state->src_w = new_plane_state->src_w; in vc4_plane_atomic_async_update()
2306 memcpy(vc4_state->src_w, new_vc4_state->src_w, in vc4_plane_atomic_async_update()
[all …]
/drivers/gpu/drm/meson/
A Dmeson_plane.c148 int src_w, src_h, dst_w, dst_h; in meson_plane_atomic_update() local
264 src_w = fixed16_to_int(new_state->src_w); in meson_plane_atomic_update()
282 hf_phase_step = ((src_w << 18) / dst_w) << 6; in meson_plane_atomic_update()
293 if (src_h != dst_h || src_w != dst_w) { in meson_plane_atomic_update()
294 priv->viu.osd_sc_i_wh_m1 = SCI_WH_M1_W(src_w - 1) | in meson_plane_atomic_update()
332 if (src_w != dst_w) { in meson_plane_atomic_update()
/drivers/gpu/drm/virtio/
A Dvirtgpu_plane.c252 plane->state->src_w >> 16, in virtio_gpu_primary_plane_update()
267 plane->state->src_w != old_state->src_w || in virtio_gpu_primary_plane_update()
277 plane->state->src_w >> 16, in virtio_gpu_primary_plane_update()
286 plane->state->src_w >> 16, in virtio_gpu_primary_plane_update()
293 plane->state->src_w >> 16, in virtio_gpu_primary_plane_update()
555 plane->state->src_w >> 16, in virtio_panic_flush()
/drivers/gpu/drm/exynos/
A Dexynos_drm_plane.c66 unsigned int src_w, src_h; in exynos_plane_mode_set() local
83 src_w = state->src_w >> 16; in exynos_plane_mode_set()
87 exynos_state->h_ratio = (src_w << 16) / crtc_w; in exynos_plane_mode_set()
/drivers/gpu/drm/ingenic/
A Dingenic-ipu.c315 state->src_w != oldstate->src_w || in osd_changed()
391 stride = ((newstate->src_w >> 16) * finfo->cpp[2] / finfo->hsub) in ingenic_ipu_plane_atomic_update()
395 stride |= ((newstate->src_w >> 16) * finfo->cpp[1] / finfo->hsub) in ingenic_ipu_plane_atomic_update()
400 stride = ((newstate->src_w >> 16) * finfo->cpp[0]) << JZ_IPU_Y_STRIDE_Y_LSB; in ingenic_ipu_plane_atomic_update()
561 newstate->src_w >> 16, newstate->src_h >> 16, in ingenic_ipu_plane_atomic_update()
606 if ((new_plane_state->src_w >> 16) < 4 || (new_plane_state->src_h >> 16) < 4) in ingenic_ipu_plane_atomic_check()
610 if (((new_plane_state->src_w >> 16) & 1) || (new_plane_state->crtc_w & 1)) in ingenic_ipu_plane_atomic_check()
618 xres = new_plane_state->src_w >> 16; in ingenic_ipu_plane_atomic_check()

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