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Searched refs:start_offset (Results 1 – 25 of 57) sorted by relevance

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/drivers/infiniband/hw/mlx5/
A Ddm.c176 u64 start_offset; in copy_op_to_user() local
181 start_offset = op_entry->op_addr & ~PAGE_MASK; in copy_op_to_user()
189 &start_offset, sizeof(start_offset)); in copy_op_to_user()
280 u64 start_offset; in handle_alloc_dm_memic() local
323 start_offset = dm->base.dev_addr & ~PAGE_MASK; in handle_alloc_dm_memic()
326 &start_offset, sizeof(start_offset)); in handle_alloc_dm_memic()
512 u64 start_offset; in UVERBS_HANDLER() local
526 start_offset = memic->base.dev_addr & ~PAGE_MASK; in UVERBS_HANDLER()
528 &start_offset, sizeof(start_offset)); in UVERBS_HANDLER()
/drivers/infiniband/hw/hfi1/
A Deprom.c64 u32 start_offset; in read_length() local
82 start_offset = start & EP_PAGE_MASK; in read_length()
83 if (start_offset) { in read_length()
91 bytes = EP_PAGE_SIZE - start_offset; in read_length()
95 memcpy(dest, (u8 *)buffer + start_offset, len); in read_length()
99 memcpy(dest, (u8 *)buffer + start_offset, bytes); in read_length()
/drivers/slimbus/
A Dmessaging.c185 (msg->start_offset + msg->num_bytes) > 0xC00) in slim_val_inf_sanity()
209 msg->start_offset, mc); in slim_val_inf_sanity()
254 msg->start_offset, msg->num_bytes, mc, sl); in slim_xfer_msg()
256 txn->ec = ((sl | (1 << 3)) | ((msg->start_offset & 0xFFF) << 4)); in slim_xfer_msg()
279 msg->start_offset = addr; in slim_fill_msg()
/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/
A Ddr_ste_v3.c26 MLX5_SET(ste_double_action_insert_with_inline_v3, d_action, start_offset, in dr_ste_v3_set_push_vlan()
95 start_offset, offset / 2); in dr_ste_v3_set_insert_hdr()
117 start_offset, offset / 2); in dr_ste_v3_set_remove_hdr()
166 MLX5_SET(ste_double_action_insert_with_inline_v3, hw_action, start_offset, 0); in dr_ste_v3_set_action_decap_l3_list()
179 MLX5_SET(ste_single_action_remove_header_size_v3, hw_action, start_offset, 0); in dr_ste_v3_set_action_decap_l3_list()
A Dmlx5_ifc_dr_ste_v1.h40 u8 start_offset[0x7]; member
86 u8 start_offset[0x7]; member
96 u8 start_offset[0x7]; member
A Dmlx5_ifc_dr.h618 u8 start_offset[0x8]; member
627 u8 start_offset[0x8]; member
636 u8 start_offset[0x8]; member
/drivers/gpu/drm/vboxvideo/
A Dmodesetting.c30 s32 origin_x, s32 origin_y, u32 start_offset, in hgsmi_process_display_info() argument
44 p->start_offset = start_offset; in hgsmi_process_display_info()
A Dvboxvideo_guest.h51 s32 origin_x, s32 origin_y, u32 start_offset,
A Dvboxvideo.h274 u32 start_offset; member
/drivers/staging/media/tegra-video/
A Dtegra20.c301 chan->start_offset = 0; in tegra20_channel_queue_setup()
309 chan->start_offset += stride * (height - 1); in tegra20_channel_queue_setup()
311 chan->start_offset += stride - 1; in tegra20_channel_queue_setup()
327 chan->start_offset += stride * (height - 1); in tegra20_channel_queue_setup()
332 chan->start_offset += stride - 1; in tegra20_channel_queue_setup()
371 tegra20_vi_write(chan, TEGRA_VI_VB0_START_ADDRESS_FIRST, base + chan->start_offset); in tegra20_channel_vi_buffer_setup()
A Dvi.h207 unsigned int start_offset; member
/drivers/misc/ocxl/
A Dcore.c85 int start_offset, size; in reclaim_afu_actag() local
87 start_offset = afu->actag_base - fn->actag_base; in reclaim_afu_actag()
89 ocxl_actag_afu_free(afu->fn, start_offset, size); in reclaim_afu_actag()
124 int start_offset, size; in reclaim_afu_pasid() local
126 start_offset = afu->pasid_base - fn->pasid_base; in reclaim_afu_pasid()
128 ocxl_pasid_afu_free(afu->fn, start_offset, size); in reclaim_afu_pasid()
/drivers/media/platform/raspberrypi/rp1-cfe/
A Dpisp-fe.c194 unsigned int start_offset, unsigned int size) in pisp_fe_config_write() argument
201 start_offset = min(start_offset, max_offset); in pisp_fe_config_write()
202 end_offset = min(start_offset + size, max_offset); in pisp_fe_config_write()
204 cfg += start_offset >> 2; in pisp_fe_config_write()
205 for (unsigned int i = start_offset; i < end_offset; i += 4, cfg++) in pisp_fe_config_write()
/drivers/thunderbolt/
A Dproperty.c349 u32 *block, unsigned int start_offset, size_t block_len) in __tb_property_format_dir() argument
403 data_offset = start_offset + dir_len; in __tb_property_format_dir()
404 dir_end = start_offset + data_len + dir_len; in __tb_property_format_dir()
415 pe = (struct tb_property_dir_entry *)&block[start_offset]; in __tb_property_format_dir()
421 re = (struct tb_property_rootdir_entry *)&block[start_offset]; in __tb_property_format_dir()
/drivers/md/dm-vdo/indexer/
A Dindex-layout.c188 u64 start_offset; member
342 super->start_offset = 0; in generate_super_block_data()
667 sizeof(layout->super.start_offset)); in make_layout_region_table()
713 encode_u64_le(buffer, &offset, layout->super.start_offset); in write_layout_header()
1205 decode_u64_le(buffer, &offset, &super->start_offset); in read_super_block_data()
1208 super->start_offset = 0; in read_super_block_data()
1225 if (super->volume_offset < super->start_offset) { in read_super_block_data()
1228 (unsigned long long) super->start_offset, in read_super_block_data()
1383 first_block -= (super->volume_offset - super->start_offset); in load_super_block()
1601 offset = layout->super.volume_offset - layout->super.start_offset; in verify_uds_index_config()
[all …]
A Dio-factory.c247 int start_offset = reader->end - reader->start; in uds_verify_buffered_data() local
268 position_reader(reader, start_block_number, start_offset); in uds_verify_buffered_data()
/drivers/gpu/drm/imagination/
A Dpvr_fw_trace.c171 u32 start_offset; member
198 idx = (idx + trace_seq_data->start_offset) % ROGUE_FW_TRACE_BUF_DEFAULT_SIZE_IN_DWORDS; in read_fw_trace()
398 trace_seq_data->start_offset = READ_ONCE(tracebuf_space->trace_pointer); in fw_trace_open()
/drivers/net/ethernet/mellanox/mlx5/core/diag/
A Dfw_tracer.c296 MLX5_SET(mtrc_stdb, in, start_offset, offset); in mlx5_tracer_read_strings_db()
317 MLX5_SET(mtrc_stdb, in, start_offset, offset); in mlx5_tracer_read_strings_db()
696 u32 block_count, start_offset, prev_start_offset, prev_consumer_index; in mlx5_fw_tracer_handle_traces() local
710 start_offset = tracer->buff.consumer_index * TRACER_BLOCK_SIZE_BYTE; in mlx5_fw_tracer_handle_traces()
713 memcpy(tmp_trace_block, tracer->buff.log_buf + start_offset, in mlx5_fw_tracer_handle_traces()
759 start_offset = tracer->buff.consumer_index * TRACER_BLOCK_SIZE_BYTE; in mlx5_fw_tracer_handle_traces()
760 memcpy(tmp_trace_block, tracer->buff.log_buf + start_offset, in mlx5_fw_tracer_handle_traces()
/drivers/tty/vt/
A Dgen_ucs_fallback_table.py239 start_offset, fallback = entries[i]
254 compressed_entries.append((start_offset, RANGE_MARKER))
/drivers/net/ethernet/chelsio/cxgb4/
A Dcxgb4_cudbg.c119 entity_hdr->start_offset = dbg_buff->offset; in cxgb4_cudbg_collect_entity()
124 dbg_buff->offset = entity_hdr->start_offset; in cxgb4_cudbg_collect_entity()
A Dcudbg_lib_common.h37 u32 start_offset; member
/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_amdkfd.c96 size_t *start_offset) in amdgpu_doorbell_get_kfd_info() argument
111 *start_offset = 0; in amdgpu_doorbell_get_kfd_info()
116 *start_offset = adev->doorbell.num_kernel_doorbells * sizeof(u32); in amdgpu_doorbell_get_kfd_info()
120 *start_offset = 0; in amdgpu_doorbell_get_kfd_info()
/drivers/gpu/drm/amd/display/dc/inc/hw/
A Ddmcu.h62 unsigned int start_offset,
/drivers/gpu/drm/amd/display/dc/dce/
A Ddce_dmcu.c79 unsigned int start_offset, in dce_dmcu_load_iram() argument
93 REG_WRITE(DMCU_IRAM_WR_CTRL, start_offset); in dce_dmcu_load_iram()
475 unsigned int start_offset, in dcn10_dmcu_load_iram() argument
493 REG_WRITE(DMCU_IRAM_WR_CTRL, start_offset); in dcn10_dmcu_load_iram()
/drivers/scsi/mpi3mr/mpi/
A Dmpi30_image.h26 __le32 start_offset; member

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