| /drivers/gpu/drm/i915/gt/ |
| A D | intel_engine.h | 156 return READ_ONCE(engine->status_page.addr[reg]); in intel_read_status_page() 167 drm_clflush_virt_range(&engine->status_page.addr[reg], sizeof(value)); in intel_write_status_page() 168 WRITE_ONCE(engine->status_page.addr[reg], value); in intel_write_status_page() 169 drm_clflush_virt_range(&engine->status_page.addr[reg], sizeof(value)); in intel_write_status_page()
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| A D | intel_ring_submission.c | 63 static struct page *status_page(struct intel_engine_cs *engine) in status_page() function 65 struct drm_i915_gem_object *obj = engine->status_page.vma->obj; in status_page() 73 set_hws_pga(engine, PFN_PHYS(page_to_pfn(status_page(engine)))); in ring_setup_phys_status_page() 140 set_hwsp(engine, i915_ggtt_offset(engine->status_page.vma)); in ring_setup_status_page() 308 list_for_each_entry(tl, &engine->status_page.timelines, engine_link) in sanitize_hwsp() 324 memset(engine->status_page.addr, POISON_INUSE, PAGE_SIZE); in xcs_sanitize() 334 drm_clflush_virt_range(engine->status_page.addr, PAGE_SIZE); in xcs_sanitize() 1418 GEM_BUG_ON(timeline->hwsp_ggtt != engine->status_page.vma); in intel_ring_submission_setup()
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| A D | selftest_lrc.c | 82 i915_ggtt_offset(ce->engine->status_page.vma) + in emit_semaphore_signal() 568 i915_ggtt_offset(ce->engine->status_page.vma) + in __gpr_read() 619 u32 *slot = memset32(engine->status_page.addr + 1000, 0, 4); in __live_lrc_gpr() 741 i915_ggtt_offset(ce->engine->status_page.vma) + in create_timestamp() 800 u32 *slot = memset32(arg->engine->status_page.addr + 1000, 0, 4); in __lrc_timestamp() 1117 *cs++ = i915_ggtt_offset(ce->engine->status_page.vma) + in record_registers() 1250 *cs++ = i915_ggtt_offset(ce->engine->status_page.vma) + in poison_registers() 1412 u32 *sema = memset32(engine->status_page.addr + 1000, 0, 1); in __lrc_isolation()
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| A D | gen6_engine_cs.c | 377 GEM_BUG_ON(i915_request_active_timeline(rq)->hwsp_ggtt != rq->engine->status_page.vma); in gen6_emit_breadcrumb_xcs() 397 GEM_BUG_ON(i915_request_active_timeline(rq)->hwsp_ggtt != rq->engine->status_page.vma); in gen7_emit_breadcrumb_xcs()
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| A D | selftest_engine_pm.c | 77 u32 *sema = memset32(engine->status_page.addr + 1000, 0, 5); in __measure_timestamps() 78 u32 offset = i915_ggtt_offset(engine->status_page.vma); in __measure_timestamps()
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| A D | intel_timeline.c | 170 struct i915_vma *hwsp = engine->status_page.vma; in intel_timeline_create_from_engine() 179 list_add_tail(&tl->engine_link, &engine->status_page.timelines); in intel_timeline_create_from_engine()
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| A D | mock_engine.c | 363 engine->base.status_page.addr = (void *)(engine + 1); in mock_engine() 417 engine->status_page.vma = ce->timeline->hwsp_ggtt; in mock_engine_init()
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| A D | intel_engine_cs.c | 1031 vma = fetch_and_zero(&engine->status_page.vma); in cleanup_status_page() 1075 INIT_LIST_HEAD(&engine->status_page.timelines); in init_status_page() 1112 engine->status_page.addr = memset(vaddr, 0, PAGE_SIZE); in init_status_page() 1113 engine->status_page.vma = vma; in init_status_page() 1393 struct i915_vma *hwsp = engine->status_page.vma; in intel_engine_destroy_pinned_context() 2144 &engine->status_page.addr[I915_HWS_CSB_BUF0_INDEX]; in intel_engine_print_registers() 2430 hexdump(m, engine->status_page.addr, PAGE_SIZE); in intel_engine_dump()
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| A D | intel_engine_pm.c | 175 GEM_BUG_ON(ce->timeline->hwsp_ggtt != engine->status_page.vma); in switch_to_kernel_context()
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| A D | gen2_engine_cs.c | 147 GEM_BUG_ON(i915_request_active_timeline(rq)->hwsp_ggtt != rq->engine->status_page.vma); in __gen2_emit_breadcrumb()
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| A D | intel_engine_types.h | 498 struct intel_hw_status_page status_page; member
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| A D | intel_execlists_submission.c | 246 engine->status_page.addr[I915_GEM_HWS_PREEMPT] = state; in ring_set_paused() 2844 list_for_each_entry(tl, &engine->status_page.timelines, engine_link) in sanitize_hwsp() 2862 memset(engine->status_page.addr, POISON_INUSE, PAGE_SIZE); in execlists_sanitize() 2874 drm_clflush_virt_range(engine->status_page.addr, PAGE_SIZE); in execlists_sanitize() 2940 i915_ggtt_offset(engine->status_page.vma)); in enable_execlists() 3563 (u64 *)&engine->status_page.addr[I915_HWS_CSB_BUF0_INDEX]; in intel_execlists_submission_setup() 3566 &engine->status_page.addr[INTEL_HWS_CSB_WRITE_INDEX(i915)]; in intel_execlists_submission_setup()
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| A D | gen8_engine_cs.c | 418 return (i915_ggtt_offset(engine->status_page.vma) + in preempt_address()
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| A D | selftest_execlists.c | 1054 i915_ggtt_offset(ce->engine->status_page.vma) + in create_rewinder() 1153 slot = memset32(engine->status_page.addr + 1000, 0, 4); in live_timeslice_rewind()
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| /drivers/infiniband/hw/cxgb4/ |
| A D | device.c | 871 rdev->status_page = (struct t4_dev_status_page *) in c4iw_rdev_open() 873 if (!rdev->status_page) { in c4iw_rdev_open() 877 rdev->status_page->qp_start = rdev->lldi.vr->qp.start; in c4iw_rdev_open() 878 rdev->status_page->qp_size = rdev->lldi.vr->qp.size; in c4iw_rdev_open() 879 rdev->status_page->cq_start = rdev->lldi.vr->cq.start; in c4iw_rdev_open() 880 rdev->status_page->cq_size = rdev->lldi.vr->cq.size; in c4iw_rdev_open() 899 rdev->status_page->db_off = 0; in c4iw_rdev_open() 909 free_page((unsigned long)rdev->status_page); in c4iw_rdev_open() 925 free_page((unsigned long)rdev->status_page); in c4iw_rdev_close() 1281 ctx->dev->rdev.status_page->db_off = 1; in stop_queues() [all …]
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| A D | provider.c | 114 mm->addr = virt_to_phys(rhp->rdev.status_page); in c4iw_alloc_ucontext()
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| A D | iw_cxgb4.h | 187 struct t4_dev_status_page *status_page; member
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| A D | qp.c | 1251 if (!rhp->rdev.status_page->db_off) { in c4iw_post_send() 1331 if (!qhp->rhp->rdev.status_page->db_off) { in c4iw_post_receive()
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| /drivers/gpu/drm/i915/selftests/ |
| A D | i915_perf.c | 360 store = memset32(rq->engine->status_page.addr + 512, 0, 32); in live_noa_gpr() 378 *cs++ = i915_ggtt_offset(rq->engine->status_page.vma) + in live_noa_gpr()
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| A D | i915_request.c | 2006 return memset32(ce->engine->status_page.addr + 1000, 0, 21); in hwsp_scratch() 2011 return (i915_ggtt_offset(ce->engine->status_page.vma) + in hwsp_offset() 2241 i915_ggtt_offset(engine->status_page.vma) + in plug()
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| /drivers/crypto/ccp/ |
| A D | sev-dev.c | 2061 struct page *status_page; in sev_ioctl_do_snp_platform_status() local 2068 status_page = alloc_page(GFP_KERNEL_ACCOUNT); in sev_ioctl_do_snp_platform_status() 2069 if (!status_page) in sev_ioctl_do_snp_platform_status() 2072 data = page_address(status_page); in sev_ioctl_do_snp_platform_status() 2111 __free_pages(status_page, 0); in sev_ioctl_do_snp_platform_status()
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| /drivers/gpu/drm/i915/gt/uc/ |
| A D | intel_guc_submission.c | 4375 list_for_each_entry(tl, &engine->status_page.timelines, engine_link) in sanitize_hwsp() 4391 memset(engine->status_page.addr, POISON_INUSE, PAGE_SIZE); in guc_sanitize() 4401 drm_clflush_virt_range(engine->status_page.addr, PAGE_SIZE); in guc_sanitize() 4412 i915_ggtt_offset(engine->status_page.vma)); in setup_hwsp()
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| /drivers/gpu/drm/i915/ |
| A D | i915_gpu_error.c | 1615 add_vma_coredump(ee, engine->gt, engine->status_page.vma, in intel_engine_coredump_add_vma()
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