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Searched refs:status_reg (Results 1 – 25 of 114) sorted by relevance

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/drivers/usb/host/
A Dehci-hub.c539 u32 __iomem *status_reg; in set_owner() local
573 u32 __iomem *status_reg, in check_reset_complete() argument
742 u32 __iomem *status_reg, *hostpc_reg; in ehci_hub_control() local
782 temp = ehci_readl(ehci, status_reg); in ehci_hub_control()
871 temp = ehci_readl(ehci, status_reg); in ehci_hub_control()
933 ehci_writel(ehci, temp, status_reg); in ehci_hub_control()
942 temp = ehci_readl(ehci, status_reg); in ehci_hub_control()
951 status_reg); in ehci_hub_control()
965 ehci_readl(ehci, status_reg)); in ehci_hub_control()
973 ehci_writel(ehci, temp, status_reg); in ehci_hub_control()
[all …]
A Dxhci-pci-renesas.c62 u32 status_reg; in renesas_fw_download_image() local
65 status_reg = RENESAS_ROM_STATUS_MSB; in renesas_fw_download_image()
67 status_reg = RENESAS_FW_STATUS_MSB; in renesas_fw_download_image()
79 err = pci_read_config_byte(dev, status_reg, &fw_status); in renesas_fw_download_image()
111 err = pci_write_config_byte(dev, status_reg, BIT(data0_or_data1)); in renesas_fw_download_image()
/drivers/irqchip/
A Dspear-shirq.c43 u32 status_reg; member
93 .status_reg = SPEAR300_INT_STS_MASK_REG,
109 .status_reg = SPEAR310_INT_STS_MASK_REG,
117 .status_reg = SPEAR310_INT_STS_MASK_REG,
125 .status_reg = SPEAR310_INT_STS_MASK_REG,
133 .status_reg = SPEAR310_INT_STS_MASK_REG,
153 .status_reg = SPEAR320_INT_STS_MASK_REG,
161 .status_reg = SPEAR320_INT_STS_MASK_REG,
169 .status_reg = SPEAR320_INT_STS_MASK_REG,
177 .status_reg = SPEAR320_INT_STS_MASK_REG,
[all …]
/drivers/clk/qcom/
A Dhfpll.c25 .status_reg = 0x1c,
43 .status_reg = 0x1c,
60 .status_reg = 0x1c,
77 .status_reg = 0x1c,
A Dclk-hfpll.c79 if (hd->status_reg) in __clk_hfpll_enable()
84 regmap_read_poll_timeout(regmap, hd->status_reg, val, in __clk_hfpll_enable()
219 if (hd->status_reg) { in clk_hfpll_init()
220 regmap_read(regmap, hd->status_reg, &status); in clk_hfpll_init()
/drivers/iio/adc/
A Dsophgo-cv1800b-adc.c126 u32 status_reg = readl(saradc->regs + CV1800B_ADC_CYC_SET_REG); in cv1800b_adc_read_raw() local
127 unsigned int clk_div = (1 + FIELD_GET(CV1800B_MASK_CLKDIV, status_reg)); in cv1800b_adc_read_raw()
129 unsigned int nb_startup_cycle = 1 + FIELD_GET(CV1800B_MASK_STARTUP_CYCLE, status_reg); in cv1800b_adc_read_raw()
130 unsigned int nb_sample_cycle = 1 + FIELD_GET(CV1800B_MASK_SAMPLE_WINDOW, status_reg); in cv1800b_adc_read_raw()
131 unsigned int nb_compare_cycle = 1 + FIELD_GET(CV1800B_MASK_COMPARE_CYCLE, status_reg); in cv1800b_adc_read_raw()
/drivers/media/pci/saa7134/
A Dsaa7134-go7007.c180 u16 status_reg; in saa7134_go7007_write_interrupt() local
187 gpio_read(dev, HPI_ADDR_INTR_STATUS, &status_reg); in saa7134_go7007_write_interrupt()
188 if (!(status_reg & 0x0010)) in saa7134_go7007_write_interrupt()
194 status_reg); in saa7134_go7007_write_interrupt()
334 u16 status_reg; in saa7134_go7007_send_firmware() local
355 gpio_read(dev, HPI_ADDR_INTR_STATUS, &status_reg); in saa7134_go7007_send_firmware()
356 if (!(status_reg & 0x0002)) in saa7134_go7007_send_firmware()
361 status_reg); in saa7134_go7007_send_firmware()
/drivers/gpu/drm/i915/gvt/
A Dexeclist.c95 u32 status_reg = in emulate_execlist_status() local
98 status.ldw = vgpu_vreg(vgpu, status_reg); in emulate_execlist_status()
99 status.udw = vgpu_vreg(vgpu, status_reg + 4); in emulate_execlist_status()
117 vgpu_vreg(vgpu, status_reg) = status.ldw; in emulate_execlist_status()
118 vgpu_vreg(vgpu, status_reg + 4) = status.udw; in emulate_execlist_status()
121 vgpu->id, status_reg, status.ldw, status.udw); in emulate_execlist_status()
258 u32 status_reg = in get_next_execlist_slot() local
262 status.ldw = vgpu_vreg(vgpu, status_reg); in get_next_execlist_slot()
263 status.udw = vgpu_vreg(vgpu, status_reg + 4); in get_next_execlist_slot()
/drivers/usb/chipidea/
A Dhost.c252 u32 __iomem *status_reg; in ci_ehci_hub_control() local
268 status_reg = &ehci->regs->port_status[port_index]; in ci_ehci_hub_control()
285 temp = ehci_readl(ehci, status_reg); in ci_ehci_hub_control()
293 ehci_writel(ehci, temp | PORT_SUSPEND, status_reg); in ci_ehci_hub_control()
299 if (ehci_handshake(ehci, status_reg, PORT_SUSPEND, in ci_ehci_hub_control()
308 temp = ehci_readl(ehci, status_reg); in ci_ehci_hub_control()
310 ehci_writel(ehci, temp, status_reg); in ci_ehci_hub_control()
324 if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 25000)) in ci_ehci_hub_control()
/drivers/gpu/drm/amd/display/dc/dpp/dcn10/
A Ddcn10_dpp_cm.c707 uint32_t status_reg = 0; in dpp1_degamma_ram_inuse() local
711 &status_reg); in dpp1_degamma_ram_inuse()
713 if (status_reg == 9) { in dpp1_degamma_ram_inuse()
716 } else if (status_reg == 10) { in dpp1_degamma_ram_inuse()
799 uint32_t status_reg = 0; in dpp1_ingamma_ram_inuse() local
803 &status_reg); in dpp1_ingamma_ram_inuse()
806 if (status_reg == 1 || status_reg == 3 || status_reg == 4) { in dpp1_ingamma_ram_inuse()
810 } else if (status_reg == 2 || status_reg == 5 || status_reg == 6) { in dpp1_ingamma_ram_inuse()
/drivers/regulator/
A Dhi655x-regulator.c26 unsigned int status_reg; member
77 regmap_read(rdev->regmap, regulator->status_reg, &value); in hi655x_is_enabled()
125 .status_reg = HI655X_BUS_ADDR(sreg), \
147 .status_reg = HI655X_BUS_ADDR(sreg), \
A Dmt6358-regulator.c26 u32 status_reg; member
57 .status_reg = MT6358_BUCK_##vreg##_DBG1, \
86 .status_reg = MT6358_LDO_##vreg##_CON1, \
111 .status_reg = MT6358_LDO_##vreg##_DBG1, \
133 .status_reg = MT6358_LDO_##vreg##_CON1, \
158 .status_reg = MT6358_BUCK_##vreg##_DBG1, \
187 .status_reg = MT6358_LDO_##vreg##_CON1, \
212 .status_reg = MT6358_LDO_##vreg##_DBG1, \
234 .status_reg = MT6358_LDO_##vreg##_CON1, \
395 ret = regmap_read(rdev->regmap, info->status_reg, &regval); in mt6358_get_status()
/drivers/media/i2c/
A Dml86v7667.c179 int status_reg; in ml86v7667_g_input_status() local
181 status_reg = i2c_smbus_read_byte_data(client, STATUS_REG); in ml86v7667_g_input_status()
182 if (status_reg < 0) in ml86v7667_g_input_status()
183 return status_reg; in ml86v7667_g_input_status()
185 *status = status_reg & STATUS_HLOCK_DETECT ? 0 : V4L2_IN_ST_NO_SIGNAL; in ml86v7667_g_input_status()
/drivers/memory/tegra/
A Dmc.c590 u32 status_reg, addr_reg; in tegra30_mc_handle_irq() local
603 status_reg = MC_ERR_VPR_STATUS; in tegra30_mc_handle_irq()
608 status_reg = MC_ERR_SEC_STATUS; in tegra30_mc_handle_irq()
613 status_reg = MC_ERR_MTS_STATUS; in tegra30_mc_handle_irq()
618 status_reg = MC_ERR_GENERALIZED_CARVEOUT_STATUS; in tegra30_mc_handle_irq()
623 status_reg = MC_ERR_ROUTE_SANITY_STATUS; in tegra30_mc_handle_irq()
628 status_reg = MC_ERR_STATUS; in tegra30_mc_handle_irq()
639 value = mc_ch_readl(mc, channel, status_reg); in tegra30_mc_handle_irq()
641 value = mc_readl(mc, status_reg); in tegra30_mc_handle_irq()
/drivers/rtc/
A Drtc-rk808.c46 unsigned int status_reg; member
311 ret = regmap_write(rk808_rtc->regmap, rk808_rtc->creg->status_reg, in rk808_alarm_irq()
364 .status_reg = RK808_RTC_STATUS_REG,
372 .status_reg = RK817_RTC_STATUS_REG,
413 ret = regmap_write(rk808_rtc->regmap, rk808_rtc->creg->status_reg, in rk808_rtc_probe()
/drivers/clk/microchip/
A Dclk-core.h22 const u32 status_reg; member
52 const u32 status_reg; member
A Dclk-core.c583 void __iomem *status_reg; member
718 err = readl_poll_timeout_atomic(pll->status_reg, v, in spll_clk_set_rate()
745 spll->status_reg = data->status_reg + core->iobase; in pic32_spll_clk_register()
955 void __iomem *status_reg; member
973 return readl_poll_timeout_atomic(sosc->status_reg, v, in sosc_clk_enable()
992 ready = readl(sosc->status_reg) & sosc->status_mask; in sosc_clk_is_enabled()
1025 sosc->status_reg = data->status_reg + core->iobase; in pic32_sosc_clk_register()
/drivers/gpu/drm/amd/display/dc/irq/dce110/
A Dirq_service_dce110.c45 uint32_t addr = info->status_reg; in hpd_ack()
100 .status_reg = mmHPD ## reg_num ## _DC_HPD_INT_STATUS,\
114 .status_reg = mmHPD ## reg_num ## _DC_HPD_INT_STATUS,\
128 .status_reg = mmDCP ## reg_num ##_GRPH_INTERRUPT_STATUS,\
/drivers/mtd/lpddr/
A Dlpddr2_nvm.c170 u_long i, status_reg, prg_buff_ofs; in lpddr2_nvm_do_op() local
219 status_reg = sr.x[0]; in lpddr2_nvm_do_op()
223 status_reg += sr.x[0] << 16; in lpddr2_nvm_do_op()
225 } while ((status_reg & sr_ok_datamask) != sr_ok_datamask); in lpddr2_nvm_do_op()
227 return (((status_reg & sr_ok_datamask) == sr_ok_datamask) ? 0 : -EIO); in lpddr2_nvm_do_op()
/drivers/gpu/drm/amd/display/dc/irq/dce80/
A Dirq_service_dce80.c76 .status_reg = mmDC_HPD ## reg_num ## _INT_STATUS,\
90 .status_reg = mmDC_HPD ## reg_num ## _INT_STATUS,\
105 .status_reg = mmDCP ## reg_num ##_GRPH_INTERRUPT_STATUS,\
/drivers/net/dsa/hirschmann/
A Dhellcreek_hwtstamp.c211 unsigned int status_reg, data_reg; in hellcreek_txtstamp_work() local
221 status_reg = PR_TS_TX_P1_STATUS_C; in hellcreek_txtstamp_work()
225 status_reg = PR_TS_TX_P2_STATUS_C; in hellcreek_txtstamp_work()
233 ts_status = hellcreek_ptp_hwtstamp_available(hellcreek, status_reg); in hellcreek_txtstamp_work()
/drivers/spi/
A Dspi-tegra20-sflash.c126 u32 status_reg; member
363 if (tsd->tx_status || tsd->rx_status || (tsd->status_reg & SPI_BSY)) { in handle_cpu_based_xfer()
365 "CpuXfer ERROR bit set 0x%x\n", tsd->status_reg); in handle_cpu_based_xfer()
400 tsd->status_reg = tegra_sflash_readl(tsd, SPI_STATUS); in tegra_sflash_isr()
402 tsd->tx_status = tsd->status_reg & SPI_TX_OVF; in tegra_sflash_isr()
405 tsd->rx_status = tsd->status_reg & SPI_RX_UNF; in tegra_sflash_isr()
/drivers/gpu/drm/amd/display/dc/irq/dce120/
A Dirq_service_dce120.c95 .status_reg = SRI(DC_HPD_INT_STATUS, HPD, reg_num),\
104 .status_reg = SRI(DC_HPD_INT_STATUS, HPD, reg_num),\
112 .status_reg = SRI(GRPH_INTERRUPT_STATUS, DCP, reg_num),\
/drivers/hsi/controllers/
A Domap_ssi_core.c217 u32 status_reg; in ssi_gdd_tasklet() local
227 status_reg = readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG); in ssi_gdd_tasklet()
229 if (status_reg & SSI_GDD_LCH(lch)) in ssi_gdd_tasklet()
232 writel_relaxed(status_reg, sys + SSI_GDD_MPU_IRQ_STATUS_REG); in ssi_gdd_tasklet()
233 status_reg = readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG); in ssi_gdd_tasklet()
237 if (status_reg) in ssi_gdd_tasklet()
/drivers/hwmon/
A Dtps23861.c395 static char *port_detect_status_string(uint8_t status_reg) in port_detect_status_string() argument
397 switch (FIELD_GET(PORT_STATUS_DETECT_MASK, status_reg)) { in port_detect_status_string()
427 static char *port_class_status_string(uint8_t status_reg) in port_class_status_string() argument
429 switch (FIELD_GET(PORT_STATUS_CLASS_MASK, status_reg)) { in port_class_status_string()

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